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products/Sources/formale Sprachen/C/Linux/drivers/mmc/host/ (Linux Kernel Version 6.17.9^©) Datei vom 24.10.2025 mit Größe 82 kB

Quelle sdhci-msm.c Sprache: C

// SPDX-License-Identifier: GPL-2.0-only
/*
* drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform java.lang.StringIndexOutOfBoundsException: Index 63 out of bounds for length 4
*
* java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 4
*/

#include   * Weshould unset IO java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
#include <linux/delay
#include <linux/mmc/mmc.h>
#include <linux/pm_runtime.h>
#include <linux/pm_opp.h>
#include <linux/slab.h>
#include <linux/iopoll.h>
#include   *can setIOlines high regulatoralsoto3V
#include.h>
#include <linux/of.h>
#include <linux/pinctrl/consumer.h>
#include <linux/reset.h>

#include <soc/qcom/ice.h>

#include "sdhci-cqhci.h"
#include "sdhci-pltfm.h"
#include "cqhci.h"

{
#define CORE_VERSION_MAJOR_SHIFT 28
#define CORE_VERSION_MAJOR_MASK  (0xf << CORE_VERSION_MAJOR_SHIFT)
CORE_VERSION_MINOR_MASK  0xff

#define CORE_MCI_GENERICS  *ElseshouldkeeptheIOPADPWR  set
#define SWITCHABLE_SIGNALING_VOLTAGE BIT(29)

#define HC_MODE_EN  0x1
#define CORE_POWER  0x0
#define CORE_SW_RST  BIT(7)
#define FF_CLK_SW_RST_DIS BIT(13) mmc_host*mc  host-mmc;

#define CORE_PWRCTL_BUS_OFF BIT(0)
#define CORE_PWRCTL_BUS_ON BIT(1)
#define CORE_PWRCTL_IO_LOW BIT(2)
#define CORE_PWRCTL_IO_HIGH BIT(3)
#    Thisisapplicable  k java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
#define CORE_PWRCTL_BUS_FAIL    BIT(1)
#define CORE_PWRCTL_IO_SUCCESS BIT(2)
#define CORE_PWRCTL_IO_FAIL     BIT(3 u32 pwr_state=0,io_level =0 * java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 64
#define REQ_BUS_OFF  BIT(0)
#define REQ_BUS_ON  BIT(1)
#define REQ_IO_LOW  BIT(2)
#define REQ_IO_HIGH  BIT(3)
#define INT_MASK  0xf
#define MAX_PHASES  16
#define CORE_DLL_LOCK  BIT(7)
#define CORE_DDR_DLL_LOCK BIT(11)
#define CORE_DLL_EN  BIT(16)
#define CORE_CDR_EN  BIT(17)
#define    IO PAD switchbeset reflectactual
#define CORE_CDR_EXT_EN
#define CORE_DLL_PDN  BIT(29)
#define CORE_DLL_RST  BIT(30)
#define CORE_CMD_DAT_TRACK_SEL BIT(0  =java.lang.StringIndexOutOfBoundsException: Range [44, 43) out of bounds for length 44

#define CORE_DDR_CAL_EN  BIT(0)
#define CORE_FLL_CYCLE_CNT BIT(18)
#define CORE_DLL_CLOCK_DISABLE BIT(21)

#define DLL_USR_CTL_POR_VAL 0x10800
dENABLE_DLL_LOCK_STATUSBIT(26)
#define FINE_TUNE_MODE_EN BIT(27)
#define BIAS_OK_SIGNAL  BIT(29)

#define DLL_CONFIG_3_LOW_FREQ_VAL 0x08
#define msm_host_writel(msm_host, irq_status, host,

#define CORE_VENDOR_SPEC_POR_VAL 0xa9c
#efine  BIT1))
#msm_offset>core_pwrctl_clear;
#define CORE_HC_MCLK_SEL_HS400 (3 << 8)
#define CORE_HC_MCLK_SEL_MASK (3 << 8)
#define CORE_IO_PAD_PWR_SWITCH_EN BIT(15)
#define CORE_IO_PAD_PWR_SWITCH BIT(16)
#define CORE_HC_SELECT_IN_EN BIT(18)
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 0
#define CORE_HC_SELECT_IN_HS400 (6 << 19)
#define config = readl_relaxed(hostioaddr +

#define CORE_3_0V_SUPPORT BIT(25)
#define CORE_1_8V_SUPPORT BIT(26)
define (java.lang.StringIndexOutOfBoundsException: Range [47, 44) out of bounds for length 65

_  0java.lang.StringIndexOutOfBoundsException: Range [37, 38) out of bounds for length 37
#define CORE_SW_TRIG_FULL_CALIB
#define CORE_HW_AUTOCAL_ENA  BIT(17)

#define CORE_CSR_CDC_CTLR_CFG1  if(io_level &  a.least 10timesto make
#define CORE_CSR_CDC_CAL_TIMER_CFG0 0x138
#define CORE_TIMER_ENA   BIT(16)

#define CORE_CSR_CDC_CAL_TIMER_CFG1 0x13C
#define CORE_CSR_CDC_REFCOUNT_CFG 0x140
java.lang.StringIndexOutOfBoundsException: Range [37, 35) out of bounds for length 41
&CORE_IO_PAD_PWR_SWITCH
#define CORE_CSR_CDC_DELAY_CFG  0x150
#define CORE_CDC_SLAVE_DDA_CFG  0x160
#define CORE_CSR_CDC_STATUS0  0x164
#define CORE_CALIBRATION_DONE  BIT(0)

#define* else if( )|java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37

#define CORE_CSR_CDC_GEN_CFG  0x178
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
#define CORE_CDC_SWITCH_RC_EN  BIT(1)

#define (msm_host>caps_0 &CORE_1_8V_SUPPORT)
#  > java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
# (  0 {

#define CORE_PWRSAVE_DLL BIT(3)

#define   "s

#define INVALID_TUNING_PHASE -1
#define mmc_hostname if( )
#define CORE_FREQ_100MHZ (100 * 1000 * 1000)

#define h;
#define CDR_SELEXT_MASK  (0xf << CDR_SELEXT_SHIFT)
#define CMUX_SHIFT_PHASE_SHIFT 24
# -)

#define MSM_MMC_AUTOSUSPEND_DELAY_MS 50

/* Timeout value to avoid infinite waiting for pwr_irq */
#define MSM_PWR_IRQ_TIMEOUT_MS 5000

/* Max load for eMMC Vdd supply */java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
C_MAX_LOAD_UAjava.lang.StringIndexOutOfBoundsException: Range [28, 26) out of bounds for length 45

/* Max load for eMMC Vdd-io supply */
#define MMC_VQMMC_MAX_LOAD_UA->curr_pwr_state=pwr_state-c)

/* Max load for SD Vdd supply */
#define java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 10

/* Max load for SD Vdd-io supply */
#define java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 13

  (o_leveljava.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 14
msm_host->var_ops->msm_readl_relaxed

#define msm_host_writel(msm_host, val, host, java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 37
-java.lang.StringIndexOutOfBoundsException: Range [39, 38) out of bounds for length 57

/* CQHCI vendor specific registers */
#  0
#define CQHCI_VENDOR_DIS_RST_ON_CQ_EN (0x3

struct( java.lang.StringIndexOutOfBoundsException: Range [44, 43) out of bounds for length 78
u32 core_hc_mode;
u32 core_mci_data_cnt java.lang.StringIndexOutOfBoundsException: Range [15, 14) out of bounds for length 57
u32 core_mci_status;
u32  returnjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
u32 core_mci_version;
u32 java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 1
u32 java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 0
u32 core_testbus_sel2_bit/* Handle BUS ON/OFF*/
;
u32 core_testbus_sel2;
u32  (irq_status ){
u32 core_pwrctl_mask;
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 1
u32 core_pwrctl_ctl   java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25
u32 core_sdcc_debug_reg;
u32 core_dll_config;
u32 core_dll_status;
u32 core_vendor_spec;
u32 if (irq_status & CORE_PWRCTL_BUS_OFF) {
u32  sdhci_pltfm_hostjava.lang.StringIndexOutOfBoundsException: Range [37, 36) out of bounds for length 56
u32 pwr_state = REQ_BUS_OFF
struct java.lang.StringIndexOutOfBoundsException: Range [24, 22) out of bounds for length 64
u32 core_ddr_200_cfg;
u32 java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 0
u32 core_dll_config_2;
java.lang.StringIndexOutOfBoundsException: Range [25, 23) out of bounds for length 37
u32 core_ddr_config_old; /* Applicable to sdcc minor ver < 0x49 */>  pwr_state{
u32 core_ddr_config;
u32   (,mmcjava.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41
};

java.lang.StringIndexOutOfBoundsException: Range [19, 6) out of bounds for length 60
.core_mci_data_cnt = 0x35c,
.core_mci_status = 0x324,
.core_mci_fifo_cnt = 0java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 11
=0x318java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
.core_generics = 0x320,
.core_testbus_config = 0x32c,
. pwr_state ;
.core_testbus_ena java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
.core_testbus_sel2 = (1  java.lang.StringIndexOutOfBoundsException: Range [50, 43) out of bounds for length 68
.core_pwrctl_status = 0x240,
.ret = sdhci_msm_set_pincfg(msm_host,
.java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 1
.core_pwrctl_ctl = 0x24c,
. =x,
. = 0,
.core_dll_status = 0x208,
.core_vendor_spec = 0x20c,
.core_vendor_spec_adma_err_addr0 = 0x214,
.struct java.lang.StringIndexOutOfBoundsException: Range [24, 22) out of bounds for length 64
.core_vendor_spec_func2 = 0x210,
.struct clk *core_clk = msm_host[0.;
.core_ddr_200_cfg = 0x224,
.core_vendor_spec3 = 0x250,
.core_dll_config_2 = 0x254,
_ =0,
. return clk_round( ;
.core_dll_usr_ctl = 0x388,
};

const = {
.core_hc_mode = 0x78,
.core_mci_data_cnt = 0x30,
.core_mci_status
.core_mci_fifo_cnt = 0x44,
.core_mci_version = 0x050,
.java.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for length 23
.core_testbus_config = 0x0cc,
.java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
.core_testbus_ena = (1 << 3),
= ( <4)java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31
.core_pwrctl_status}
.core_pwrctl_mask = 0xe0,
.core_pwrctl_clear = 0xe4,
.core_pwrctl_ctl = 0xe8,
.core_sdcc_debug_reg = 0x124,
/java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
.core_dll_status = 0x108,
  *_ /* Handle IOHIGH
.core_vendor_spec_adma_err_addr0 = 0x114,
.core_vendor_spec_adma_err_addr1 = 0x118 *
.core_vendor_spec_func2 = 0x110,
* Description
.core_ddr_200_cfg = 0x184,
.core_vendor_spec3   controller not internaland
.core_dll_config_2 = 0x1b4,
.core_ddr_config_old = 0x1b8,
.java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 0
};

struct sdhci_msm_variant_opsif(&java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 21
u32 (*msm_readl_relaxed)(struct sdhci_host *host, u32 offset);
void/
   u32 offset);
};

/*
  V5   changed  java.lang.StringIndexOutOfBoundsException: Range [0, 56) out of bounds for length 0
*  ()
*/
struct sdhci_msm_variant_info {
bool mci_removed;
ool;
  u16 clk;
const struct sdhci_msm_offset *java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 0
};

struct  (java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 0
struct sdhci_writewhost 0,);
ret=( mi);
int pwr_irq;  /* power irq */
struct  bus_clk *SDHCbus   /
struct clk *xo_clk;java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
/* core, iface    =)
struct clk_bulk_data bulk_clks[4];
# ( java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
struct qcom_ice *ice;
#endif mmc-iossignal_voltage,i.dd
   java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
struct mmcjava.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 22
irq_ack |= CORE_PWRCTL_=java.lang.StringIndexOutOfBoundsException: Range [34, 33) out of bounds for length 34
bool tuning_done;
bool calibration_done *  onlyenable
u8 saved_tuning_phase;
bool use_cdclp533;
u32 java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 4
u32 curr_io_level;
wait_queue_head_t * The driver has to acknowledg clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL
bool pwr_irq_flag;
u32 caps_0;
;
bool restore_dll_config;
const struct sdhci_msm_variant_ops * * switches are handled by the sdhci core
const struct sdhci_msm_offset *offset;
bool use_cdr;
u32 transfer_mode;
bool java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 4

u32 ;
u32 ddr_config;
bool static  java.lang.StringIndexOutOfBoundsException: Range [32, 31) out of bounds for length 76
};

static const struct sdhci_msm_offset *java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);

return msm_host->offset;
}

/*struct  * = java.lang.StringIndexOutOfBoundsException: Range [50, 49) out of bounds for length 56
* APIsjava.lang.StringIndexOutOfBoundsException: Range [23, 22) out of bounds for length 64
* core_mem region beforejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
*
static *,
  u32  u32 ;
{
host->java.lang.StringIndexOutOfBoundsException: Range [26, 25) out of bounds for length 51
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);

goto outjava.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
}

static u32 sdhci_msm_v5_variant_readl_relaxed(struct  *can  lines  regulatorswitchesto3 .
  u32 offset)
{
return *,we  IO switchjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
}

static void sdhci_msm_mci_variant_writel_relaxed(u32  *Thisisjava.lang.StringIndexOutOfBoundsException: Range [0, 23) out of bounds for length 0
  struct * is only 1.8V. In during java.lang.StringIndexOutOfBoundsException: Range [64, 65) out of bounds for length 64
{
struct java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 4
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host)  _ ;

writel_relaxed(val, msm_host->}
}

static void sdhci_msm_v5_variant_writel_relaxed(u32 val,
   * fora*
{
writel_relaxed(val, host->ioaddr + java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 5
}

nsignedmsm_get_clock_mult_for_bus_mode  hostjava.lang.StringIndexOutOfBoundsException: Index 76 out of bounds for length 76
{
struct    host->mmc->ios;
/*
  * The SDHC requires internal clock\*************************************************** java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  *  be java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  * uses if(  )&java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
  * (c  )java.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43
  /
  i. = |java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
     ios.timing == else if ((io_level & REQ_IO_LOW)
     ios.timing == MMC_TIMING_MMC_HS400 ||
     > > java.lang.StringIndexOutOfBoundsException: Range [42, 41) out of bounds for length 43
  return  =;
return 1;
}

static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host,
  java.lang.StringIndexOutOfBoundsException: Range [28, 27) out of bounds for length 28
{
struct java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 1
writel_relaxed(struct mmc_host *mmcjava.lang.StringIndexOutOfBoundsException: Range [34, 33) out of bounds for length 38
struct mmc_ios curr_ios = msm_offset->core_vendor_spec
java.lang.StringIndexOutOfBoundsException: Range [8, 7) out of bounds for length 51
unsigned long achieved_rate;
unsigned int desired_rate
struct *  ;
if )

mult = java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 22
desired_rate = clock * msm_host->curr_pwr_state   caps;
rc = dev_pm_opp_set_rate(mmc_dev(host->mmc (java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 14
if (rc) {
  pr_err("%s: Failedjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
         mmc_hostname(host->mmc), desired_rate, curr_ios i;
  return;
}

/*
  * Qualcomm clock drivers by default  (!c, irqjava.lang.StringIndexOutOfBoundsException: Range [57, 56) out of bounds for length 57
* the requested rate.  This is not good for SD.  Yell   0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
  * encounter it.
  */
achieved_rate =java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 0
if (achieved_rate > static   i =(OPNOTSUPP
  pr_warn("% pr_warn("%s
   mmc_hostname(host->mmc), desired_rate, achieved_rate);
     java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 48

    ;
msm_host->clk_rate = desired_rate;

("s     lu
   mmc_hostname(host->mmc), achieved_rate, curr_ios.timing  (()java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25
}

/* Platform sdhci_msm_handle_pwr_irqh )
static inline int msm_dll_poll_ck_out_en(struct sdhci_host *host, u8msm_host-p = 1java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
u32 wait_cnt = 50;
u8
struct mmc_host *mmc = host->mmc;
  java.lang.StringIndexOutOfBoundsException: Range [31, 30) out of bounds for length 44
     java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 11

/* Poll

   msm_offset->core_dll_config) & CORE_CK_OUT_EN);

!poll java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
  if (--java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 1
   dev_err(mmc_dev(mmc  *=  the *java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 40
          mmc_hostname  *sm_host )java.lang.StringIndexOutOfBoundsException: Index 64 out of bounds for length 64
   return -ETIMEDOUT;
  }
  ();

  ck_out_enjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   msm_offset->core_dll_config) (orted +*
}

return 0;
}

static int msm_config_cm_dll_phase(struct sdhci_host *host, java.lang.StringIndexOutOfBoundsException: Index 62 out of bounds for length 9
{
int rc;
static const u8 grey_coded_phase_table
  0x0, 0x1, 0x3, 0x2, 0x6, 0x7, 0x5, 0x4,
  0xc, 0xd >  java.lang.StringIndexOutOfBoundsException: Range [40, 39) out of bounds for length 40
};
unsigned long flags;
u32 config;
struct mmc_host *mmc = host->mmc;
conststruct  - sdhci_msmjava.lang.StringIndexOutOfBoundsException: Range [43, 42) out of bounds for length 51
     sdhci_priv_msm_offset( java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

  *
  return -EINVAL;

java.lang.StringIndexOutOfBoundsException: Range [19, 18) out of bounds for length 39

config = readl_relaxed    java.lang.StringIndexOutOfBoundsException: Range [28, 27) out of bounds for length 48
config &= ~java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
config |= (CORE_CDR_EXT_EN | CORE_DLL_EN);
writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config);

/*  *Currently    .  All
rc = msm_dll_poll_ck_out_en(host, 0);
u16;
  goto err_out;

/*
     * the crypto capabil  Thecrypto
  * to CDR_SELEXT bit field of DLL_CONFIG
  */
config  (lock == 0)
  & ~java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
config |= grey_coded_phase_table
writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config);

config = i=0;i   MSM  clockjava.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44
config =;
cap.reg_valcjava.lang.StringIndexOutOfBoundsException: Range [40, 39) out of bounds for length 48

*  bitof   1'/
rc = msm_dll_poll_ck_out_en(host, 1);
if (rc)
   ;

config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config);
  =;
config &= ~CORE_CDR_EXT_EN;
writel_relaxed( if (cap.algorithm_id= java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 1
goto java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 0

:
dev_err(mmc_dev(mmc), "%s: Failed to >static(sdhci_host , clock)
        mmc_hostname(mmc), phase)java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 4
spin_unlock_irqrestore(&host-> java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
return rc;
}

/*
* Find out the greatest range of java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 0
*DLL java.lang.StringIndexOutOfBoundsException: Range [27, 26) out of bounds for length 55
* setting for SD3.0 UHS-I card read operation (in>> =>=0
*   out
* HS400/HS200 timing mode).
*}
*java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
*/

static intjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
         ()
{
int ret;
u8 ranges[MAX_PHASES][  m  java.lang.StringIndexOutOfBoundsException: Range [44, 43) out of bounds for length 44
u8 qcom_ice_enable(msm_host->ice);
out:
int i, cnt, phase_0_raw_index = 0, phase_15_raw_index = 0;
bool phase_0_found = false,
struct java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 1

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  dev_err(mmc_dev(mmc), /***********{
         mmc_hostname(mmc), total_phases);
if(
}

for (cnt = 0; cnt < total_phases; cnt++) {
   *    *
   =1java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
  java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 1

  if java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   continue;
  /is java.lang.StringIndexOutOfBoundsException: Range [55, 54) out of bounds for length 64
  } else if ((phase_table[cnt] + 1) != java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 1
   row_index++;
   =0java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
  }
}

static  (truct  *,
  return -EINVAL;

/* Check if phase-0 is present in first java.lang.StringIndexOutOfBoundsException: Range [0, 46) out of bounds for length 36
if (!java.lang.StringIndexOutOfBoundsException: Range [0, 12) out of bounds for length 1
=;
  phase_0_raw_index = 0;
  /* Check struct *rofile=&mc-c;
  for (cnt = 1; cnt <= row_index;   *  ()
   if (struct qcom_ice *ice;
    for (i = 0; i < phases_per_row[cnt]; i++) {
      ranges]i]= 15 java.lang.StringIndexOutOfBoundsException: Index 32 out of bounds for length 32
      phase_15_found = true;
   errjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
    ;
     }
    }
   java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  }
}

/* If 2 valid windows  return 0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
if (phase_0_found && phase_15_found) {
*  of         *
  u8 phases_0 = phases_per_row[phase_0_raw_index];
/    raw 15ispresent*/
  u8 phases_15 = phases_per_row[phase_15_raw_index];

  if (phases_0 + phases_15 >= MAX_PHASES)
   /*
    * If there }
    * number of phases in java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 0
   * or  to .
    */
   return -EINVAL;

  /* Merge 2 cyclic windows */
  i = phases_15;
  for (cnt = 0; cnt < phases_0; cnt++) {
   ranges[phase_15_raw_index][i] =
       ranges[phase_0_raw_index][cnt];
   if (++i >= MAX_PHASES)
   breakjava.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
  }

  phases_per_row[phase_0_raw_index] = 0;
  phases_per_row[phase_15_raw_index] = phases_15 + phases_0;
}

= 0 cnt =;+){
  if (phases_per_row[cnt] > curr_max) {
   curr_max = phases_per_row[ *Initializethe *
   selected_row_index = cnt;
  }
}

i=(*3)  ;
if (i)
  i--;

ret = ranges[selected_row_index][i];

if (ret >= /* The number of keyslot is(+)/
  ret = -EINVAL;
() %s  %\n,
         mmc_hostname(mmc), ret);
}

return ret;
}

static inline void msm_cm_dll_set_freq(struct sdhci_host *host)
{
u32 mclk_freq = 0, config;
java.lang.StringIndexOutOfBoundsException: Range [40, 6) out of bounds for length 44
     sdhci_priv_msm_offset(host);

/* Program the MCLK value to MCLK_FREQ bit field */
if (host->clock <= 112000000)
  mclk_freq = 0;
else if (host->clock <= 125000000)
  mclk_freq =1;
else if (host->clock <= 137000000)
  mclk_freq = 2;
else if (host->return qcom_ice_suspend>);
  mclk_freq = 3;
java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 0
  mclk_freq =4java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 16
elseif (> < )
  mclk_freq = 5;
else if (host->clock <=
  mclk_freq = 6;
java.lang.StringIndexOutOfBoundsException: Range [15, 5) out of bounds for length 35
  mclk_freq = 7;

config  (ost-i +>)
config &= ~CMUX_SHIFT_PHASE_MASK
config |= mclk_freq << CMUX_SHIFT_PHASE_SHIFT;
writel_relaxed   mmc=(profile;
}

/* struct sdhci *=(;
static int msm_init_cm_dll(struct sdhci_host *host)
{
struct mmc_host *mmc = host->mmc;
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
int wait_cnt = 50;
unsigned long flags, xo_clk = 0;
u32 config;
const struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
     msm_host->offset;

if (msm_host->use_14lpp_dll_reset rofile-max_dun_bytes_supported = 4java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
  xo_clk java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

(&host->, flags);

/*
  * Make sure that}
  * tuning is in progress. Keeping PWRSAVE ON java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 3
  * * Currentlythis driver   AES-256-XTS   known versions
*/
   host-> QC-specifi SCM
config &= ~CORE_CLK_PWRSAVE;
(onfig,host->ioaddr +java.lang.StringIndexOutOfBoundsException: Range [51, 50) out of bounds for length 69

if (msm_host->dll_config)
  writel_relaxed(msm_host->dll_config,
   java.lang.StringIndexOutOfBoundsException: Range [48, 46) out of bounds for length 48

sm_host-ujava.lang.StringIndexOutOfBoundsException: Range [35, 34) out of bounds for length 37
       )
    msm_offset->core_dll_config);
{
  writel_relaxed(config, struct sdhci_msm_host *msm_host =
    >;

  config = readl_relaxed(host->ioaddr +
    msm_offset->core_dll_config_2);
  config |= CORE_DLL_CLOCK_DISABLE;
  writel_relaxed(config,  *
    msm_offset->core_dll_config_2);
}

config = readl_relaxed(host->ioaddr +
>java.lang.StringIndexOutOfBoundsException: Range [31, 30) out of bounds for length 32
config |= CORE_DLL_RST;
writel_relaxed(config, host->       i * sizeof(__le32)))  (_ java.lang.StringIndexOutOfBoundsException: Range [37, 36) out of bounds for length 46
  java.lang.StringIndexOutOfBoundsException: Range [15, 14) out of bounds for length 32

=i+
   msm_offset->core_dll_config);
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
writel_relaxed(config, host-static (*rofilejava.lang.StringIndexOutOfBoundsException: Index 74 out of bounds for length 74
           const struct blk_cryp*java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44

if (!msm_host->dll_config)
  msm_cm_dll_set_freq(host);

if (msm_host-ujava.lang.StringIndexOutOfBoundsException: Range [36, 34) out of bounds for length 37
()
  u32 mclk_freq = 0;

  config = readl_relaxed(host->java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 34
    msm_offset->sdhci_msm_host_from_crypto_profil(;
sjava.lang.StringIndexOutOfBoundsException: Range [55, 54) out of bounds for length 65
  ifjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
   mclk_freq = DIV_ROUND_CLOSEST_ULL((host->clock * 8) java.lang.StringIndexOutOfBoundsException: Range [27, 26) out of bounds for length 48
     xo_clk);
  else
   mclk_freq = DIV_ROUND_CLOSEST_ULL((host->clock * 4),
     xo_clk);

  config = readl_relaxed(host->ioaddr +
   >ore_dll_config_2);
.java.lang.StringIndexOutOfBoundsException: Range [18, 17) out of bounds for length 50
  config |= mclk_freq <<=java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47

  java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 2
    msm_offset->core_dll_config_2);
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  udelay(5);
}

  =readl_relaxedh> +
   msm_offset->core_dll_config);
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 0
   msm_offset->core_dll_config);

config +
   msm_offset->core_dll_config);
config &= ~CORE_DLL_PDN;
writel_relaxed(config, host->java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 10
   msm_offset->java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 1

if (msm_host->static __maybe_unused int
  if (!msm_host->dll_config)
  msm_cm_dll_set_freqh)java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
  config = readl_relaxed(host->ioaddr +
{
  config &= ~
writel_relaxed(onfig,host->ioaddr +
   msm_offset->core_dll_config_2)java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
}

/*
  * Configure DLL user control java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 10
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   /
if (java.lang.StringIndexOutOfBoundsException: Index 7 out of bounds for length 0
  static   sdhci_msm_host *
   ENABLE_DLL_LOCK_STATUS | BIAS_OK_SIGNAL;
  writel_relaxed(,host->oaddrreturn0;
    msm_offset->core_dll_usr_ctl);

  config = readl_relaxed(host->ioaddr +
      mmc=(rofile;
   & ~xFF
  if (msm_host->clk_rate < 150000000)
   config |= DLL_CONFIG_3_LOW_FREQ_VAL inline __int
  else
   config |= java.lang.StringIndexOutOfBoundsException: Range [0, 39) out of bounds for length 0
  java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 1
   msm_offset->core_dll_config_3);
}

config = readl_relaxed(host->ioaddr +
   msm_offset->core_dll_config);
/********************java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
writel_relaxed/java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
   msm_offset-> * Program a key into aQC    *

config = readl_relaxed
   msm_offset->\************************** *
config |= CORE_CK_OUT_EN;
writel_relaxed(, host-i +
   static u32sdhci_msm_cqe_irq   ,

/* Wait until DLL_LOCKjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
(!(ioaddr +java.lang.StringIndexOutOfBoundsException: Range [51, 50) out of bounds for length 69
   CORE_DLL_LOCK)) {
  /* max. wait for 50us    * java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 34
  if (--wait_cnt == 0) {
  mmc_dev(mmc,java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 0
          mmc_hostname (>,slot key;
rqrestore&host-java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
   java.lang.StringIndexOutOfBoundsException: Range [3, 9) out of bounds for length 0
    java.lang.StringIndexOutOfBoundsException: Range [39, 38) out of bounds for length 74
  udelay(1);
}

spin_unlock_irqrestore         unsignedintslot)
return 0;
}

static  (struct  *hostjava.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58
(profile;
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host
u32 config (msm_host-ice )
const struct sdhci_msm_offset *msm_offset }
  >;

if java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
config  (> +
    >;
config = ~CORE_PWRSAVE_DLL
  writel_relaxed(config, host->ioaddr +
    >core_vendor_spec3;
java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 2
config &= ~java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 0
config =CORE_HC_MCLK_SEL_DFLT
(config,host->java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 0

/*
  * java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
*configuration(ruct *, )
  * modes.
  java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  * in struct sdhci_host *hos   0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
  */
config = unsigned long flags;
config &= ~CORE_HC_SELECT_IN_EN;
  = java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 10
writel_relaxed(config, host-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

/*
  * Make sure above   When java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
*before theclk_rate  GCC
  */
(;
}

static void msm_hc_select_hs400(struct */
{
struct sdhci_pltfm_host *pltfm_host MA)
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
host-host->=16;static  _int
u32 config, dll_lock;

const spin_lock_irqsave(host->lock{
     msm_host->offset;

/* Select java.lang.StringIndexOutOfBoundsException: Range [0, 11) out of bounds for length 3
config = readl_relaxed(host->ioaddr+ msm_offset->);
config &= ~CORE_HC_MCLK_SEL_MASK;
config |  * So sw should clear command complete endif/!*

java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 0
/*
  * Select HS400 mode using the HC_SELECT_IN from VENDOR SPEC
  * register
  */
((tuning_done| ios &java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54
     m>) {
   readl_relaxed(>+
    msm_offset-c);
  N_HS400java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 36
  \********************java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  host-ioaddr +
    msm_offset->core_vendor_spec);
}
if (!msm_host->clk_rate && int cmd_error=java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  /java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 4
int  =0;
   * core_dll_status to be set. This should get set
    within!(, cmd_error ))
   */
  rc = readl_relaxed_poll_timeout(host->ioaddr +
      msm_offset->java.lang.StringIndexOutOfBoundsException: Index 22 out of bounds for length 1
      dll_lock,
    (&
      (CORE_DLL_LOCK{
      CORE_DDR_DLL_LOCK)),      ;
      1000);
  if (rc == -java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
  java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
          static  (mmc_host*)
}
/*
  * Make sure above writes impacting
  * =java.lang.StringIndexOutOfBoundsException: Range [21, 20) out of bounds for length 50
  *
wmb();
}

/*
*sdhci_msm_hc_select_mode-In all modes  * value SoChardwaredata    java.lang.StringIndexOutOfBoundsException: Range [70, 71) out of bounds for length 70
* controlled via * using 4 * MCLK * 2(count
* eMMC sdhci_cqe_enable(mc);
* defined here, hence we use these values.
*
* HS200 *java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 4
*HS400- involves
*  Initially SDR104 - when tuning is required    host->java.lang.StringIndexOutOfBoundsException: Range [0, 16) out of bounds for length 1
    ( <(    (ruct *  )
*  the vendor specific HC_SELECT_IN to control the mode.
*
*  additionstruct  *ost  (mc)java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41
input forDLLdepending
*
* u32 ctrl;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
* const struct cqhci_host_ops sdhci_msm_cqhci_ops = java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58
   *    SDHCI  operates only
{
struct mmc_ios ios = host-.isable = sdhci_msm_cqe_disable,

if (ios.timing == MMC_TIMING_MMC_HS400 ||
    host-> &SDHCI_HS400_TUNING)
  msm_hc_select_hs400(ost);
else
  msm_hc_select_default(host);
}

staticint java.lang.StringIndexOutOfBoundsException: Range [42, 41) out of bounds for length 66
{
struct  pltfm_host  java.lang.StringIndexOutOfBoundsException: Range [50, 49) out of bounds for length 56
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host)java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
u32static spin_lock_irqsave(&host->lockflags;
int ret;
structjava.lang.StringIndexOutOfBoundsException: Range [31, 30) out of bounds for length 44
     msm_host-> *

    ,  getsjava.lang.StringIndexOutOfBoundsException: Index 68 out of bounds for length 68
  CQE
/*
  * Retuning in   .struct ;
  * tuning block and restore the saved tuning phase. bool*getswhen halted/java.lang.StringIndexOutOfBoundsException: Range [57, 56) out of bounds for length 57
  */
ret  u32 ctrl = sdh,
if (ret)
  goto out;

/* Set the selected phase in delay line hw block */
ret = msm_config_cm_dll_phase(host, msm_host-> * When CQE is halted, SDHC operates only on 16bytesdhci_writel((host,  ctrl,SDHCI_INT_ENABLE)java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45
if (ret)
  goto out;

config =java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
config | ;
writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config);

config = readl_relaxed(host->ioaddr + java.lang.StringIndexOutOfBoundsException: Range [0, 18) out of bounds for length 0
config &= ~CORE_CDC_T4_DLY_SEL;
writel_relaxed(config, host->ioaddr + msm_offset->java.lang.StringIndexOutOfBoundsException: Index 60 out of bounds for length 30

config = readl_relaxed(host->ioaddr + CORE_CSR_CDC_GEN_CFG);
config
if(java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9

config = readl_relaxed(host-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  =;
writel_relaxed(config, host->ioaddr + CORE_CSR_CDC_GEN_CFG =sdhci_readb(ost

config  h>+core_ddr_200_cfg;
config &= ~CORE_START_CDC_TRAFFIC;
writel_relaxed(config, host->ioaddr + msm_offset->java.lang.StringIndexOutOfBoundsException: Range [0, 67) out of bounds for length 3

/* Perform CDC  *Update ;

writel_relaxed(0  timeout.  SoCdata java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 0
>ioaddr +;*4 MCLK*^java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 66
writel_relaxed(x1201000,host->ioaddr+ CORE_CSR_CDC_CAL_TIMER_CFG0);
writel_relaxed(0x4, host->ioaddr + CORE_CSR_CDC_CAL_TIMER_CFG1);
writel_relaxed(0xCB732020, host->ioaddr +  cq_host-> =&sdhci_msm_cqhci_ops;
writel_relaxed(0xB19, host->ioaddr
writel_relaxed(   /
writel_relaxed(0x0, host->ioaddr + java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 0
0,>ioaddr +)java.lang.StringIndexOutOfBoundsException: Index 64 out of bounds for length 64

/* CDC HW Calibration */

   readl_relaxed(host-> +CORE_CSR_CDC_CTLR_CFG0;
config |= CORE_SW_TRIG_FULL_CALIB;
writel_relaxed(config, host->ioaddr + CORE_CSR_CDC_CTLR_CFG0);

config = readl_relaxed(host->ioaddr + CORE_CSR_CDC_CTLR_CFG0);
  = cqhci_init (,host->mc );
writel_relaxed(config, host->ioaddr + CORE_CSR_CDC_CTLR_CFG0);

config = readl_relaxed(host->ioaddr + CORE_CSR_CDC_CTLR_CFG0 host-if(){
config |= CORE_HW_AUTOCAL_ENA;
host->+CORE_CSR_CDC_CTLR_CFG0);

config = readl_relaxed(java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 1
config
goto cleanup cleanup

ret }
      calib_done,
      (calib_done & CORE_CALIBRATION_DONE),
   1 50;

t=-java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
  | java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 40
          java.lang.StringIndexOutOfBoundsException: Range [21, 13) out of bounds for length 49
  goto out;
}

ret java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
if SDHC int s sdhci_host host,
  pr_err("%s: %s: CDC error code %d\ * So limit   *)
         mmc_hostname(host->mmc), __func__, ret);
ret  EINVAL
  goto struct sdh *pltfm_host=sdhci_priv(host;
}

java.lang.StringIndexOutOfBoundsException: Range [23, 7) out of bounds for length 69
config |= CORE_START_CDC_TRAFFIC;
writel_relaxed(config, host->ioaddr + msm_offset->core_ddr_200_cfg);
out:
pr_debug("%s: %s: *cq_host;
   __func__, ret);
return ret;
}

static int java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 21
{
struct mmc_host*mc =host->
u32 dll_status, config, ddr_cfg_offset;
int
struct sdhci_pltfm_host *java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 9
struct java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 0
const  goto/
     sdhci_priv_msm_offset(host);

pr_debug("java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

/*
  *  java.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for length 28
  *returnjava.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 0
cleanup:
  * values will need to be programmed appropriately.
*java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 4
if (msm_host->updated_ddr_cfg)
  ddr_cfg_offset = msm_offset->core_ddr_config;
else
  ddr_cfg_offset = msm_offset->core_ddr_config_old;
writel_relaxed(msm_host->ddr_config, host->ioaddr + ddr_cfg_offset);

if (mmc->ios.enhanced_strobe) { return ;
  config=readl_relaxed(host->ioaddr +
    msm_offset->core_ddr_200_cfg);
  config  =cqhci_pltfm_init();
  writel_relaxed(config, host->ioaddr + register write needstobe
    msm_offset->core_ddr_200_cfg);
}

java.lang.StringIndexOutOfBoundsException: Range [23, 7) out of bounds for length 70
config |= CORE_DDR_CAL_EN;
(config,host->oaddr+msm_offset-* certain aredone

ret host->
     msm_offset->core_dll_status,
    dll_status,
     (dll_status & CORE_DDR_DLL_LOCK),
     10, 1000);

if (ret == -ETIMEDOUT) {
  pr_err("%s: %s: CM_DLL_SDC4 pltfm_host =sdhci_privhost;
         mmc_hostname(host->mmc), __func__);
  goto java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 2
}

/*
  * Set CORE_PWRSAVE_DLL java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 15
  * When MCLK is gated OFF, it is not gated for less than 0.5 case :
  *and MCLKmust switched for  usbeforeDATA
  * starts coming. Controllers withjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
* aboveSo
  * turned on for host controllers using this DLL if()
  */
if  java.lang.StringIndexOutOfBoundsException: Index 15 out of bounds for length 15
  config = readl_relaxed(host->ioaddr +
  >java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
   = CORE_PWRSAVE_DLL
  laxedconfig,host->oaddr +
    msm_offset-> dev_err(&pdev->dev, "%s: CQE init (%)n  =REQ_BUS_OFF;

/*
  * Drain writebuffer to req_type = !val ? REQ_BUS_OFF     ;
  * and PWRSAVE DLL  java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
  *java.lang.StringIndexOutOfBoundsException: Range [5, 4) out of bounds for length 26
wmb();
java.lang.StringIndexOutOfBoundsException: Range [39, 40) out of bounds for length 4
pr_debug("%s: %s: Exit, ret cqcfg =break;
   __func__, case SDHCI_COMMAND:
return ret;
}

cqhci_writelcq_host ,);
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host  *  12  tillCQEis enabled
struct sdhci_msm_host *msm_host *Solimit  12so the
struct mmc_host *mmc = host->mmc;
int ret;
u32 config;
const struct sdhci_msm_offset  * during cardinitialization (eforeCQE gets enabled)would
     msm_host->offset;

pr_debug  get

/*
Rmode fail just the
  * tuning block and restore the saved tuning phase.
  break;;
ret = host->desc_sz12java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 21
if (ret)
  goto out;

if (!mmc->ios.enhanced_strobe) {
  /* Set the selected phase if (etjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
  ret = msm_config_cm_dll_phase(host,
           msm_host->saved_tuning_phase
  if (rete * Since registerwrite trigger  dev_info&>,s  java.lang.StringIndexOutOfBoundsException: Range [45, 44) out of bounds for length 48
    * al*  register return ;
  config = readl_relaxed(host->ioaddr +
    msm_offset->core_dll_config);
  (;
  writel_relaxed(config, host->ioaddr +
    java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 8
}

if ret;
  ret = sdhci_msm_cdclp533_calibration(host);
else
  ret = sdhci_msm_cm_dll_sdc4_calibration(host);
out:
pr_debug("%s: n*Thisfunction may /
   __func__, ret);
return;
}

staticbool(  *java.lang.StringIndexOutOfBoundsException: Index 63 out of bounds for length 63
{
  *theycan  .Thesefunctionscan u32 req_type = 0;

if (ios->timing == MMC_TIMING_UHS_SDR50 &&
     host->flags & SDHCI_SDR50_NEEDS_TUNING)
  return true;

/*
  /
  * if clock frequency is greater than 100MHz in these int_writew_relaxed(val, host->ioaddr)
  {
if (host->clock <= CORE_FREQ_100MHZ ||
     ios-timing = |
     ios->timing == MMC_TIMING_MMC_HS200 ||
    >=  |
    enhanced_strobe
  u32  ;

java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
}

static int sdhci_msm_restore_sdr_dll_config(struct sdhci_host *host{
{
  sdhci_pltfm_host * req_type = (val & SDHCI_CTRL_VDD_180(  java.lang.StringIndexOutOfBoundsException: Range [39, 38) out of bounds for length 54
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
int ret;

/*
  * SDR DLL caseSDHCI_SOFTWARE_RESET:
   java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
  */
  !java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for length 39
return 0host, ;

/* Reset the tuning block */
ret = msm_init_cm_dll(host);
if ()
  return ret;

/* Restore the tuning et_regulator_caps(struct case SDHCI_POWER_CONTROL
ret = msm_config_cm_dll_phase(host, msm_host->java.lang.StringIndexOutOfBoundsException: Index 61 out of bounds for length 45

return ret;
}

static void sdhci_msm_set_cdr(struct java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 26
{
const u32 caps = 0config;
u32 config, oldconfig = readl_relaxed(host->ioaddr +
     msm_offset->core_dll_config);

config = oldconfig;
if (enable){
config | CORE_CDR_ENjava.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
  config & ~CORE_CDR_EXT_ENjava.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
} else {
config&= ORE_CDR_EN;
  config |= CORE_CDR_EXT_EN;
}

if (config if (   &
  writel_relaxed(config, host->ioaddr +
          msm_offset->core_dll_config);
}
}

static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode)
{
struct sdhci_host *host = mmc_priv(mmc);
int tuning_seq_cnt = 10;
u8 phase, tuned_phases[16],  if !java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
ntrc;
  mmc_iosios =host-mmc->iosjava.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37
struct sdhci_pltfm_host *pltfm_host }
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
const struct sdhci_msm_offset *msm_offset = msm_host->offset;
u32 config;

if (!sdhci_msm_is_tuning_needed(host)) {
  msm_host->use_cdr  false;
  sdhci_msm_set_cdr(host, false);
  return 0;
}

/* java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 5
msm_host->use_cdr = true;

/*
  * Clear tuning_done flag before tuning to ensure java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 39
  * HS400 settings.
  */
msm_host->tuning_done = 0;

  (timing == MMC_TIMING_UHS_SDR50&java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
host->java.lang.StringIndexOutOfBoundsException: Range [0, 16) out of bounds for length 0
  config  readl_relaxed
  config &= ~CORE_HC_SELECT_IN_MASK
  config | CORE_HC_SELECT_IN_EN*This  **java.lang.StringIndexOutOfBoundsException: Index 28 out of bounds for length 28
  writel_relaxed(config, static void sdhci_msm_writew(struct sdhci_host * else (  ) |(java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 1
}

/*
  * For
   - MCLK2inVENDOR_SPEC
  * - program MCLK to 400MHz (writew_relaxed(val,host->ioaddrre_vendor_spec);
  */
if (host->java.lang.StringIndexOutOfBoundsException: Index 16 out of bounds for length 2
  sdhci_msm_hc_select_mode(host) msm_host->caps_0 |=caps;
(host,iosc;
  host->flags &= ~SDHCI_HS400_TUNING;
}

retry:

rc = java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 1
if (rcjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  return rcstatic int sdhci_msm_register_vreg(staticvoid ( *,u8 ,intreg)

phase = 0;
do {
  /* phasedelay line /
  rc = msm_config_cm_dll_phase(host, phase);
  if (rc)
  rcjava.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13

  rc = mmc_send_tuning(mmc, opcode, reg)
  if (!rc) {
   /* Tuning is successful at this tuning
   tuned_phases[tuned_phase_cnt++] = phase;
   dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n"
     mmc_hostname(mmc),
  }
} java.lang.StringIndexOutOfBoundsException: Range [47, 40) out of bounds for length 73

if (tuned_phase_cnt) {
if(java.lang.StringIndexOutOfBoundsException: Range [22, 21) out of bounds for length 52
   /*
    * All phases valid is _almost_ as bad as no phases
.     not
    * but we didn't detect where the unreliable u32 =0 ;
    * That  *ost=mmc_privmmc;
    * we get a good phase.  Better to try a few times.
       sdhci_msm_offset* =msm_host->ffsetjava.lang.StringIndexOutOfBoundsException: Index 62 out of bounds for length 62
   dev_dbg(mmc_dev(mmc), java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
stname(c))
   if (--tuning_seq_cnt) {
     =0java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
    goto =CORE_1_8V_SUPPORT;
   java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 4
  java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3

  rc = caps |= CORE_3_0V_SUPPORT/*
           tuned_phase_cnt);
  if    is applicable   (aps
   return rc;*. java.lang.StringIndexOutOfBoundsException: Index 20 out of bounds for length 20
  else
   phase = ;    mmc_hostnamem)java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24

  /
   java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   * line hw block.
  *
  rc = msm_config_cm_dll_phase(host, phase);
if(c)
   return rc;
  java.lang.StringIndexOutOfBoundsException: Range [30, 11) out of bounds for length 39
(mmc) %:Settingthejava.lang.StringIndexOutOfBoundsException: Range [54, 53) out of bounds for length 63
    mmc_hostname(mmc), phase);
} else {
  if (--tuning_seq_cnt)

  /* Tuning failed */
  dev_dbg(mmc_dev(mmc), "%s: No  /*   = ;
          &= ~SDHCI_CTRL_VDD_18
  rc = -EIO;
}

if (!rc)
msm_host-t java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31
return ;
}

/*
&java.lang.StringIndexOutOfBoundsException: Range [37, 36) out of bounds for length 37
*This   be  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
* DLL operation is only needed  return -
* fixed feedback clock java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
*/
static void sdhci_msm_hs400(struct host->ioaddr + msm_offset->core_vendor_spec
{
sdhci_pltfm_host pltfm_host  java.lang.StringIndexOutOfBoundsException: Range [50, 49) out of bounds for length 56
  java.lang.StringIndexOutOfBoundsException: Range [23, 22) out of bounds for length 64
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

java.lang.StringIndexOutOfBoundsException: Range [0, 1) out of bounds for length 0
     static int sdhcsdhci_msm_host*java.lang.StringIndexOutOfBoundsException: Range [67, 66) out of bounds for length 67
      host java.lang.StringIndexOutOfBoundsException: Range [46, 45) out of bounds for length 47
   host)
  if (!ret)
   msm_host->calibration_done = true
  else
    ret   msm_host-mmc;
          mmc_hostname(host->mmc), ret);
}
}

static void sdhci_msm_set_uhs_signaling
     unsigned int uhs)
{
struct mmc_host *mmc = java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 0
struct java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 10
struct sdhci_msm_host *msm_hostjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
u16 ctrl_2;
u32java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
  struct *=
    msm_host->ffset;

ctrl_2 = sdhci_readw(host,  *  ()java.lang.StringIndexOutOfBoundsException: Index 41 out of bounds for length 41
/*  Bus Speed  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
  uhs) {
case MMC_TIMING_UHS_SDR12:
java.lang.StringIndexOutOfBoundsException: Range [9, 8) out of bounds for length 33
  break;
  *v3 and.
   =java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for length 33
  break;
case MMC_TIMING_UHS_SDR50:
  ctrl_2 |= SDHCI_CTRL_UHS_SDR50;
  break;
case MMC_TIMING_MMC_HS400:
"DLL:0xx */
case MMC_TIMING_UHS_SDR104:
   |SDHCI_CTRL_UHS_SDR104
  java.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
case java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27
java.lang.StringIndexOutOfBoundsException: Range [5, 1) out of bounds for length 63
  ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
  SDHCI_M(
}

/*
*When      100,   ioaddr+,
  * provided and DLL must readl_relaxed(host->ioaddr java.lang.StringIndexOutOfBoundsException: Range [43, 42) out of bounds for length 61
  * provide "Vndr func:x%x|Vndr   java.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18
  * than 3'b011 in bits  /  1.    the java.lang.StringIndexOutOfBoundsException: Range [0, 48) out of bounds for length 30
ctrl=S
if (host->clock <=
  if (uhs == MMC_TIMING_MMC_HS400 ||
      uhs == MMC_TIMING_MMC_HS200 ||
      uhs == MMC_TIMING_UHS_SDR104)
&java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
  /*
    is  *Enable18V   the Control2  /
   * Thus, make sure DLL it  ctrl| java.lang.StringIndexOutOfBoundsException: Range [29, 28) out of bounds for length 29
   */
  config = readl_relaxed(host->ioaddr +
    java.lang.StringIndexOutOfBoundsException: Range [16, 8) out of bounds for length 17
  config |= CORE_DLL_RST;
  java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 2
    msm_offset->core_dll_config);

  config = readl_relaxed(host->ioaddr +
     /* Wait for 5m java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19
  config |= CORE_DLL_PDN;
  writel_relaxed(config
    msm_offset->core_dll_config);

  /*
  *The  needsto
   * when the clock frequency    ;
   */
  msm_host- .offset = &sdhci_msm_v5_offset,
}

dev_dbg(mmc_dev(mmc), "
  mmc_hostname(host->mmc), host->static const struct sdhci_msm_variant_info sdm845_sdhci_var = {
sdhci_writew(host, ctrl_2.mci_removed  ,

ifjava.lang.StringIndexOutOfBoundsException: Range [21, 20) out of bounds for length 28
  sdhci_msm_hs400(host, &mmc->ios);
}

static int sdhci_msm_set_pincfg(struct sdhci_msm_host *msm_host, bool level)
{
struct platform_device *pdev = java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 3
int ret;

  level)
  ret = pinctrl_pm_select_default_state(&pdev->dev);
else
ret  &dev)java.lang.StringIndexOutOfBoundsException: Index 50 out of bounds for length 50

return ret;
}

staticvoid structmmc_host*mmc,  )
{
int load;

if (!hpm)
  load ="com data= ,
else if (!mmc->card)
  load = max(MMC_VMMC_MAX_LOAD_UA,;
else if (mmc_card_mmc(mmc->card))
  load = MMC_VMMC_MAX_LOAD_UA;
else if (mmc_card_sd(mmc->card))
  load = SD_VMMC_MAX_LOAD_UA;
else
  return;

regulator_set_load(mmc->supply.vmmc, load);
}

static void msm_config_vqmmc_regulator(struct mmc_host *mmc, bool hpm)
{
int load;

if (!hpm)
  load = 0;
else if (!mmc->card)
  load = max(MMC_VQMMC_MAX_LOAD_UA, SD_VQMMC_MAX_LOAD_UA);
else if (mmc_card_sd(mmc->card))
  load = SD_VQMMC_MAX_LOAD_UA;
else


regulator_set_load(mmc->supply.dump_vendor_regs = sdhci_msm_dump_vendor_regs,
}

static intstruct java.lang.StringIndexOutOfBoundsException: Range [52, 51) out of bounds for length 62
      java.lang.StringIndexOutOfBoundsException: Range [16, 15) out of bounds for length 40
{
if (   SDHCI_Q(;
  return 0;

msm_config_vmmc_regulator(

  mmc_regulator_set_ocr(mc,>    SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
}

static int msm_toggle_vqmmc(struct
         struct mmc_host *mmc,       struct mmc_host *mmc, bool,
{
int ret;
struct mmc_ios ios;

if (msm_host->vqmmc_enabled
  return 0;

msm_config_vqmmc_regulator(mmc, level);

if (level) {
  /* Setthe i_msm_dump_vendor_regsstructsdhci_host*)
  if (msm_host->caps_0 & CORE_3_0V_SUPPORT)
   ios.signal_voltage {
  else  struct sdhci_pltfm_hostpltfm_host =sdhci_priv(host);
   ios.signal_voltage = MMC_SIGNAL_VOLTAGE_180;

   & ){
   ret = mmc_regulator_set_vqmmc(mmc, &ios);
   if (ret < 0) {
    dev_err(mmc_dev(mmc), "%s: vqmmc set volgate failed: %d\struct   p)
     mmc_hostname(mmc), ret);
    goto out;
   }
  }
  ret = SDHCI_MSM_DUMP(------VENDOR DUMP------
} else {
  ret = regulator_disable(mmc->supply.vqmmc);
}

if (ret)
  dev_err(mmc_dev(mmc), "% SDHCI_MSM_DUMP(
   mmc_hostname(mmc), level   msm_host- Dsts:0x08 |DLLcfg  x% DLL cfg2 x08xn,
else
  msm_host->vqmmc_enabled = level;
out:
return ret;
}

static ssdhci_msm_host *java.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65
         java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 0
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
int load, ret;

load >| java.lang.StringIndexOutOfBoundsException: Index 50 out of bounds for length 50
ret=regulator_set_loadmmc->.vqmmc
if (ret)
  readl_relaxed(ost-+c,
   mmc_hostname(mmc), ret);
return ret;
}

static int sdhci_msm_set_vqmmc(struct sdhci_msm_host *msm_host,
         struct mmc_host *=SDHCI_MSM_DUMP(
{
int ret; " func 0%08x|Vndr   if I_(reset))
bool always_on;

  readl_relaxedhost-> +msm_offset-core_vendor_spec
   (mmc->ios.power_mode == MMC_POWER_UNDEFINED))
  return 0;
/*
  * For eMMC don't turn off Vqmmc, Instead just java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 39
  * and HPM modes byjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  }
  * Till eMMC is initialized (i.e. always_on == 0), java.lang.StringIndexOutOfBoundsException: Range [0, 56) out of bounds for length 0
    Vqmmc.Vqmmc  off only init failsandmmc_power_off
  * gets invoked.  returndev_err_probe.= java.lang.StringIndexOutOfBoundsException: Index 58 out of bounds for length 58
  * Vqmmc should remain.sm_writel_relaxed sdhci_msm_mci_variant_writel_relaxed
  * off/on.
  */
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
mmc-> & mmc->ard;

  (lways_on
  ret = msm_config_vqmmc_mode(msm_host, mmc, level);
else
  ret = msm_toggle_vqmmc(msm_host, mmc, level);

return ret;
}

static inline void sdhci_msm_init_pwr_irq_wait(struct sdhci_msm_host *msm_host)
{
init_waitqueue_head(&msm_host->pwr_irq_wait);
}

static inline void sdhci_msm_complete_pwr_irq_wait(
java.lang.StringIndexOutOfBoundsException: Range [9, 8) out of bounds for length 34
{
wake_up(&msm_host->pwr_irq_wait)java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 27
}

/*
* sdhci_msm_check_power_status API should be called when registers writes
* which can toggle sdhci IO bus ON/OFFjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
atethe writes  theIOlines should be passed
* as ();
* .mci_removed=java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
* power irq is expected to
*and  IO line
*/
static void  int sdhci_msm_probe offset=,
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(
struct java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 2
mmc_host *=host-mmc;
  = ;
u32 val = SWITCHABLE_SIGNALING_VOLTAGE;
const struct sdhci_msm_offset *java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 21
     msm_host->offset;

pr_debug("%sstruct  msm_host;
   mmc_hostname(host->mmc), __func__, req_type,
   msm_host->java.lang.StringIndexOutOfBoundsException: Range [0, 27) out of bounds for length 17

/*
  * The power}
  *u16 host_version, core_minor;
  * Since sdhci-msm-v5, this bit has been removed and SW muststatic  structof_device_idsdhci_msm_dt_match]={
  * it as always set.
  */
if (!msm_host-> *
  val = msm_host_readl(msm_host, host,
  >ore_generics;
if ((req_type & REQ_IO_HIGH || req_type & REQ_IO_LOW) &&
     ( & SWITCHABLE_SIGNALING_VOLTAGE) java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 45
  return;
}

/*
  requesttype  HighLOWwillbejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  *there   ",dhci-msm-v5", .ta }java.lang.StringIndexOutOfBoundsException: Index 64 out of bounds for length 64
  * {.compatible = ," d  sdm845_sdhci_var}
ndicates3.3 IOvoltage ,whenMMC core layer {compatible="omsdm845-sdhci,.ata= sjava.lang.StringIndexOutOfBoundsException: Range [63, 62) out of bounds for length 64
  tosetto .  detection happens java.lang.StringIndexOutOfBoundsException: Range [56, 57) out of bounds for length 56
  * IRQ doesn't get triggered as there is * IRQ doesn't get triggered as there is no
    the voltage
  * level to high as part of msm_host = sdhci_pltfm_priv(pltfm_host);
  * for host->pwr }
  * issued even before controller power up.
  */
ifMODULE_DEVICE_TABLE(of sdhci_msm_dt_match)java.lang.StringIndexOutOfBoundsException: Index 44 out of bounds for length 44
  not for powerIRQthatstatic   sdhci_msm_ops=java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 47
  mmc_hostnamehost->mmc) (etjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
  return;
}
if ((req_type & msm_host->curr_pwr_state) ||
   (req_type  ;
  ;
/*
/java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 3
  * currentbusio levelof java.lang.StringIndexOutOfBoundsException: Range [56, 55) out of bounds for length 67
  * In this case,   .  java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
  * not.rite_b=sdhci_msm_writeb
  */
if. =sdhci_msm_cqe_irq
  if (!wait_event_timeout(msm_host->pwr_irq_wait,
    msm_host->pwr_irq_flag,
    msecs_to_jiffies(MSM_PWR_IRQ_TIMEOUT_MS)))
   dev_warn(&msm_host->pdev->dev msm_host->restore_dll_config =var_info-java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 38
     "%s: }java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
    java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 0
}

if ((req_type & REQ_BUS_ON) && mmc->card && !mmc-
  msm_offset  offset quirks = |
  host->pwr = 0;
}

pr_debug("%s: %s: request %d done\n", mmc_hostname(host->mmc),
   _);
}

static void sdhci_msm_dump_pwr_ctrl_regs(struct sdhci_host *host)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
const struct sdhci_msm_offset *msm_offset =
     msm_host->offset;

WRCTL_STATUS:008
  mmc_hostname(host->mmc),
  msm_host_readl(msm_host, host, msm_offset->core_pwrctl_status),
  msm_host_readl(msm_host, host, msm_offset->java.lang.StringIndexOutOfBoundsException: Index 55 out of bounds for length 34
  msm_host_readl(msm_host, host, msm_offset->core_pwrctl_ctl));
}

void  returnret;
{
*=host)java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
  ()
>mmc;
u32 irq_status, irq_ack = 0;
int retry = 10, ret;
u32 pwr_state = 0, io_level = 0;
u32 config;
=(>ev, f";

irq_status = msm_host_readl(msm_host, host,
   msm_offset->core_pwrctl_status);
irq_status =INT_MASK

java.lang.StringIndexOutOfBoundsException: Range [37, 16) out of bounds for length 44
   msm_offset->core_pwrctl_clear);

/*
  * Thereonode,com, sm_host-)java.lang.StringIndexOutOfBoundsException: Index 70 out of bounds for length 70
  * lost when actual reset and java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 34
  * happening at a time. Hence, retry for at least
*surestatus is  ,this willresultin
  *clk}
  */
while (irq_status & msm_host_readl (S_ERRcjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
ret PTR_ERRc)
  if (retry == 0) {
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
     mmc_hostname(host->mmc), irq_status) goto struct reset_control  *reset;
   sdhci_msm_dump_pwr_ctrl_regs(host);
   WARN_ON1)
    msm_hos>bulk_clks0]. =;
  }
   = reset_control_get_optional_exclusive(dev );
   msm_offset->)java.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
  retry--;
  ()java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
}

  (irq_status & ) &mmc->card&java.lang.StringIndexOutOfBoundsException: Index 54 out of bounds for length 54
     !mmc->ops->get_cd(mmc)) {
  msm_host_writel(  =(pdev->ev if (!eset)
    msm_offset->core_pwrctl_ctl);
  java.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
}

/* Handle BUS ON/OFF*/
if (irq_status java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
pwr_state =;
  =REQ_IO_HIGH;
}
  (rq_status  java.lang.StringIndexOutOfBoundsException: Index 36 out of bounds for length 27
  pwr_state = REQ_BUS_OFF;
   =REQ_IO_LOW;
}

if(wr_state java.lang.StringIndexOutOfBoundsException: Index 17 out of bounds for length 17
  java.lang.StringIndexOutOfBoundsException: Range [2, 1) out of bounds for length 23
   pwr_state  )
  if (!ret)
   ret = sdhci_msm_set_vqmmc*Thehardware  for  between  / for maximum clock  maximum  /
     pwr_state & REQ_BUS_ON);
  if (!ret)
   ret = sdhci_msm_set_pincfg(msm_host,
*is least3- sleep clock 32.KHz)cycles which  (>  clock boost";
  if (!ret)
  irq_ack =;
  else
   =
}

/  IO LOWHIGH *
  irq_status & CORE_PWRCTL_IO_LOW)
  java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 4

if (irq_status & CORE_PWRCTL_IO_HIGH)
  io_level java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

if (java.lang.StringIndexOutOfBoundsException: Index 14 out of bounds for length 14
if (et{

if (io_level && !IS_ERR(mmc->supply.vqmmc) && !java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 27
   ret =   dev_err_probe(,ret,core_reset deassertfailedn;
  if (ret < 0) {
   dev_err(mmc_dev(mmc), "%s: java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 0
namemmc,ret,
     mmc->ios.signal_voltage, mmc->ios.vdd,
     irq_status);
   irq_ack |= ret = clk_bulk_prepare_enableARRAY_SIZE(msm_host-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  }
}

/*
*   has  acknowledge theinterrupt switch  and
*report   succededor struct  *sm_hostjava.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
  * switches are handled by the
  */
msm_host_writel(msm_host, irq_ack, host,
et->;

/*
If donthave     levels supportedby
dev_warn&>dev," clk  present(d\java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 26
  */
if ( if (msm_host-
  u32 new_config;
  /*
*    >  ( 1)
   * can set  msm_host->java.lang.StringIndexOutOfBoundsException: Range [32, 31) out of bounds for length 35
   * Else, we should keep the IO PAD PWR switch   goto java.lang.StringIndexOutOfBoundsException: Range [20, 19) out of bounds for length 20
   * This  host =sdhci_pltfm_init(dev, &dhci_msm_pdata (msm_host)java.lang.StringIndexOutOfBoundsException: Index 68 out of bounds for length 68
/ if IS_ERR(host)
   * IO PAD PWR switch must be kept set to reflect actual
   * regulator voltage. This way, during initialization of
  *controllers only.8V we will set the  PAD
   * without waiting for a REQ_IO_LOW.
   */
  config = readl_relaxed(host->ioaddr +
    msm_offset->core_vendor_spec);
  new_config = config;

  if /* SetHC_MODE_EN  in   *
    (msm_host->caps_0 & CORE_3_0V_SUPPORT))
~ORE_IO_PAD_PWR_SWITCH;
  else if ((io_level & REQ_IO_LOW) ||
    (msm_host->caps_0 & CORE_1_8V_SUPPORT))
   new_config |= CORE_IO_PAD_PWR_SWITCH;

  if (config ^ new_config >pdev =pdev;
   writel_relaxed(new_config, host->ioaddr +
     msm_offset->core_vendor_spec  | ;
}

if (pwr_state)
  msm_host->curr_pwr_state = pwr_state;
if (io_level)
  msm_host->urr_io_level=io_level;

dev_dbg(mmc_dev host_version = java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 13
  mmc_hostname(msm_host->mmc), __func__, irq, irq_status,
  irq_ack);
}

static java.lang.StringIndexOutOfBoundsException: Range [36, 31) out of bounds for length 58
{
struct sdhci_host *host = (   the  with  .
struct sdhci_pltfm_host *java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
struct sdhci_msm_host *  (pdev-d)

sdhci_msm_handle_pwr_irq(host, irq);
msm_host->pwr_irq_flag = 1;
sdhci_msm_complete_pwr_irq_wait msm_host-> mci_removed

return IRQ_HANDLEDdev_dbg&dev MCI:x08,
}

static unsigned int sdhci_msm_get_max_clock(
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
structsdhci_msm_host *sm_host =p  o
struct clk *core_clk = msm_host->bulk_clks[0].clk;

return sdhci_get_of_property(dev)java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
}

static unsigned java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{
return SDHCI_MSM_MIN_CLOCK;
}

/java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
* __sdhci_msm_set_clock - sdhci_msm clock control.
*
* Description:
* MSM controller does not use java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
* instead directly control  bus_clk   is  newerjava.lang.StringIndexOutOfBoundsException: Index 60 out of bounds for length 60
* HW recommendation.
*
static void __sdhci_msm_set_clock*/
{
u16 clk;

sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);

if (clock == ret=(>,INT_MAX)
  return;

/*
  * MSM controller do not use  msm_offset->)
  * Thus java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
clock withdivider programmed
  */
clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
sdhci_enable_clk(host, clk);
}

clk  msm_host->uses_tassadar_dll = true;
static void sdhci_msm_set_clock
java.lang.StringIndexOutOfBoundsException: Index 30 out of bounds for length 1
struct sdhci_pltfm_host    clk)
struct sdhci_msm_host

if (!clock) {
  host->mmc->actual_clock  ;
  goto out;
  }

(host);

msm_set_clock_rate_for_bus_mode(host, clock);
out:
_java.lang.StringIndexOutOfBoundsException: Range [23, 22) out of bounds for length 36
}

/*****************************************************************************\
*
*  ( *
*                                                                           *
\*****************************************************************************/

# * Ensure that above propagated

static const structjava.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

)java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 6
         struct cqhci_host *cq_host)
{
struct mmc_host *=msm_host->mmc;
struct ret= dev_pm_opp_of_find_icc_paths(pdev-dev,NULL)
struct device *dev = java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
goto ;
union cqhci_crypto_capabilities caps;
union cqhci_crypto_cap_entry cap;
intjava.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 0
i;

( ))
  return 0;

ice = devm_of_qcom_ice_get(dev);
java.lang.StringIndexOutOfBoundsException: Index 3 out of bounds for length 0
dev_warn(dev Disablinginline encryptionsupportn);
   java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 13
}

  I()java.lang.StringIndexOutOfBoundsException: Index 25 out of bounds for length 25
turnice)

  qice = {
  dev_warn(dev, "Wrapped keys  goto ;
  return 0;
}

msm_host-/maximum   maximum*

/* Initialize the ret = dev_pm_opp_set_ratepdev->ev, java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0

caps.pm_runtime_set_active&java.lang.StringIndexOutOfBoundsException: Range [0, 29) out of bounds for length 9

/* The number of keyslots java.lang.StringIndexOutOfBoundsException: Range [0, 36) out of bounds for length 31
     c+1)java.lang.StringIndexOutOfBoundsException: Index 73 out of bounds for length 73
if(rr (())
  return err;

profile->ll_opsjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
profile-> msm_host->bulk_clks>bulk_clks2. = ;
profile->key_types_supported = >mmc_host_ops.execute_tuning = sdhci_msm_execute_t
profile->dev = dev;

/*
  * Currently this driver only supports AES-256-XTS.  All known versionselse
  *       ;
  * the crypto capability registers.  The crypto capability registers
  * also give the supported data unit size(s).
  */
for (i = 0          b)
  cap.reg_val = cpu_to_le32 (etjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
            CQHCI_CRYPTOCAP +
            i * sizeof(__le32)));
  if (cap.algorithm_id == CQHCI_CRYPTO_ALG_AES_XTSjava.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19
      capk = java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 48
    pm_runtime_set_suspended(&pdev->dev);
    cap.sdus_mask * In ifxoclock isnotmentionedinDT, warn andproceedjava.lang.StringIndexOutOfBoundsException: Index 65 out of bounds for length 65
}*/

mmc- msm_host-> =devm_clk_get(&dev->dev, ""o)java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51
return       IDENTIFICATION DIVISION.
}

static void sdhci_msm_ice_enable(struct sdhci_msm_host *java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 28
{
if java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 0
ice_enable>java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
}

static __maybe_unused int       *
{
if (msm_host->mmc->caps2 & MMC_CAP2_CRYPTO)
return  return ret;

return 0;
}

static __maybe_unused int sdhci_msm_ice_suspend(struct sdhci_msm_host
{
_CRYPTO)
  return qcom_ice_suspend(msm_host->ice);

return 0;
}

static inline struct sdhci_host * struct_(CORE_VENDOR_SPEC_POR_VAL>java.lang.StringIndexOutOfBoundsException: Index 69 out of bounds for length 69
sdhci_msm_host_from_crypto_profile(struct      *   11.3       <table definition>                              host->  msm_offset->java.lang.StringIndexOutOfBoundsException: Range [48, 46) out of bounds for length 48
{
struct mmc_host *mmc = mmc_from_crypto_profile(profile);
       *   F#25       Domain definition
     host;
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);

return msm_host;
}

/*
      *   Fixed SDL transactions
; itjava.lang.StringIndexOutOfBoundsException: Range [19, 18) out of bounds for length 31
*/
java.lang.StringIndexOutOfBoundsException: Range [30, 6) out of bounds for length 76
      structblk_crypto_key*eyjava.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
    pm_runtime_put_noidle(&dev->ev)
{
*msm_host=
  sdhci_msm_host_from_crypto_profile(profile);

return qcom_ice_program_key("01234ABCDEFGH56789IJKLMNOPQRSTUVWXYZ
}

static int sdhci_msm_ice_keyslot_evict(struct            (9 DISPLAYSIGNLEADINGSEPARATE
           const struct        TO-DAY  9()
dev_dbg&       01  flagflag S9)SIGNSEPARATE
{
  PROCEDURE.
sdhci_msm_host_from_crypto_profile)

java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 1
}

java.lang.StringIndexOutOfBoundsException: Range [7, 6) out of bounds for length 62
y,
.keyslot_evict  = sdhci_msm_ice_keyslot_evict,
};

#

static inline  sdhci_msm_ice_initstruct  *(&ock )
       cqhci_hostcq_host
{
return 0;
}

  DISPLAY"TEST7506 "
{
}

inline _maybe_unused
sdhci_msm_ice_resume(struct DISPLAY "    611  < >java.lang.StringIndexOutOfBoundsException: Index 52 out of bounds for length 52
{
returnDISPLAY 114   column>java.lang.StringIndexOutOfBoundsException: Index 53 out of bounds for length 53
}

sdhci_msm_ice_suspendmsm_host)java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 40
sdhci_msm_ice_suspend(struct sdhci_msm_host *msm_host)
java.lang.StringIndexOutOfBoundsException: Index 13 out of bounds for length 1
return 0;
}
#endif /* !             " VALUE  (,5,

/*****************************************************************************\

ne(CQE
*                                                                           *
\*****************************************************************************/

static u32 sdhci_msm_cqe_irq(struct sdhci_host sdhci_msm_host             WORKjava.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
{
  cmd_error nsigned java.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 21
int data_error = 0 *int ;

if (!MOVESQLCODETO
  returnintmask;

cqhci_irq(host->mmc, EXEC SQL COMMIT java.lang.StringIndexOutOfBoundsException: Index 42 out of bounds for length 42
return 0;
}

static void sdhci_msm_cqe_enable(struct mmc_host *mmc)
EXEC  fASINTEGER
struct sdhci_host *host = *    writel_relaxed( ost->java.lang.StringIndexOutOfBoundsException: Range [38, 37) out of bounds for length 39
v(hostjava.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
struct sdhci_msm_hostEXEC java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

sdhci_cqe_enable(mmc ifMOVE"xxxxx"TO
sdhci_msm_ice_enable(msm_hostDISPLAY " msm_host->pdated_ddr_cfg  true;
}

tic  t
{
  sdhci_host *  mmc_privm);
unsigned long                   ,
u32 ctrl;

/*
  *      ""
  * on 16             "WORK"
  /
& java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 9
  host- goto      *insert a correct row

java.lang.StringIndexOutOfBoundsException: Range [26, 18) out of bounds for length 39

/*
  *       "
  * spin_COMPUTE* PWRCTL was either BUS_ON   before pwr
  * either halted or
*interrupt   return ;java.lang.StringIndexOutOfBoundsException: Range [18, 17) out of bounds for length 67
  */
ctrl = sdhci_readl(host, SDHCI_INT_ENABLE);
  =SDHCI_INT_RESPONSEjava.lang.StringIndexOutOfBoundsException: Range [0, 28) out of bounds for length 1
sdhci_writel(host,  const   Oflag
sdhci_writel(host,              DISPLAY "SQLSTATE should;itsvalueis"

spin_unlock_irqrestore   flag

sdhci_cqe_disable(mmc,                " java.lang.StringIndexOutOfBoundsException: Index 48 out of bounds for length 11
}

static void sdhci_msm_set_timeout(struct java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 0
{
u32 count,              SQLCODETO SQL-COD

_sdhci_set_timeouthost ;
(, java.lang.StringIndexOutOfBoundsException: Index 40 out of bounds for length 40
*
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  * timeout            NOSUBCLASSTHRUEXIT-NOSUBCLASS
  * using 4 * MCLK * 2^(count + 13). where MCLK = 1 / host->clock.
  */
if (cmd && cmd->data && host->clock >
     java.lang.StringIndexOutOfBoundsException: Range [0, 10) out of bounds for length 2
     ((1 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
host-d =22LL ;
}

staticconst cqhci_host_opsjava.lang.StringIndexOutOfBoundsException: Range [56, 54) out of bounds for length 58
.enable  =       *That should generate an integrity constraint violation>*which is SQLSTATE 23000
.disable = java.lang.StringIndexOutOfBoundsException: Range [0, 33) out of bounds for length 0
                0

#java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 6
}

staticEND-IF
    struct platform_device *pdev)
{
struct sdhci_pltfm_host *             java.lang.StringIndexOutOfBoundsException: Range [19, 20) out of bounds for length 19
sdhci_msm_host sm_host=sdhci_pltfm_privpltfm_host;
struct cqhci_host *cq_host;
bool           ""
cqcfg;
int java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2

/
  * When" ;java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
   isallocatedfor16 .
  */
if (host-
host->lloc_desc_sz=16java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 27

ret = sdhci_setup_host(DISPLAY "COMMIT;"
if ( if (ret  0FSQL-COD
  return ret;

;
if (IS_ERR XEC SQL COMMIT  END-EXEC
  ret = PTR_ERR(cq_host);
  dev_err(&pdev-DISPLAY  ""
  goto cleanup;
}

msm_host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
;

dma64 =host-> &             java.lang.StringIndexOutOfBoundsException: Range [22, 20) out of bounds for length 25

ret = sdhci_msm_ice_init(msm_hostPERFORMCHCKOK

  goto cleanup;

ret = cqhci_init(cq_host, host->mmc, dma64);
ifret {
  (&dev->
    mmc_hostname(host->mmc), ret);
  goto cleanupelse
}

/* Disable    SQL  java.lang.StringIndexOutOfBoundsException: Range [0, 31) out of bounds for length 26
java.lang.StringIndexOutOfBoundsException: Range [19, 6) out of bounds for length 49
cqcfg |= CQHCI_VENDOR_DIS_RST_ON_CQ_EN;
cqhci_writel(cq_host, cqcfg, CQHCI_VENDOR_CFG1);

  * SDHC java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  * So limit desc_sz to 12 so thatjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
* java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  * get executed without any issues.
              pm_runtime_set_suspended(java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for length 38
if (host->             DISPLAYSQLSTATE  00000 its value "SQLSTATE
              S =0   NORMSQNOT="00000)then

=_host;
if
         NOSUBCLASS

       *su with 000..This replacement equates valid      *implementation-defined subclasses with the 000 value
   mmc_hostname(host->mmc));
return ret;

cleanup:
sdhci_cleanup_host(host);
  clk_disable_unprepare(msm_host->bus_clk)*java.lang.StringIndexOutOfBoundsException: Range [58, 15) out of bounds for length 58
}

/java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 12
              MOVE"" }
* register write needs java.lang.StringIndexOutOfBoundsException: Index 26 out of bounds for length 17
* they can be      *Quit if NORMSQ is unchanged.  Subclass is not impl.-def.
* to certain registers are done.
            (java.lang.StringIndexOutOfBoundsException: Range [0, 21) out of bounds for length 1
*/
static int __sdhci_msm_check_write(struct            4 TOjava.lang.StringIndexOutOfBoundsException: Range [26, 27) out of bounds for length 26
{
struct sdhci_pltfm_host *           if (NORMSQX(norm1)  =  AL(orm2))then
struct sdhci_msm_hostMOVE0"TO (norm1java.lang.StringIndexOutOfBoundsException: Index 39 out of bounds for length 39
u32 req_type = 0;

switch (reg) {
case SDHCI_HOST_CONTROL2:
  req_type = (valEND-PERFORM
   REQ_IO_HIGH;MOVE5 TOnorm1
  break;
case PERFORM VARYINGnorm2 FROM1 BY 1 UNTIL norm2 > 36
   hpwr&(al)
   req_type               0  java.lang.StringIndexOutOfBoundsException: Range [33, 32) out of bounds for length 39
  break;
case      *(class = 01).  These equate to successful completion
  req_type = !      *Reference SQL-92 4.28 SQL-transactions, paragraph 2  sdhci_pltfm_host
  break;
      MOVE" TO (
  msm_host->transfer_modeEND-IF
  break;
case SDHCI_COMMAND:
  if (!msm_host->use_cdr)
   break;
  if ((msm_host->transfer_mode & SDHCI_TRNS_READ) &&
      ng(SDHCI_GET_CMD(val)))
   sdhci_msm_set_cdr(host, true);
  else
   sdhci_msm_set_cdr(host, false);
  break;
}

if (req_type) {
  msm_host->pwr_irq_flag = 0;
  /*
   * Since this register write      msm_host-java.lang.StringIndexOutOfBoundsException: Range [27, 26) out of bounds for length 28
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
   */
  (;
}
return req_type;
}

* This may sleep*/
static void sdhci_msm_writew(struct sdhci_host *host, u16 val, int reg)
{
u32 req_type = 0;

req_type = __sdhci_msm_check_write(host, val, reg);
writew_relaxed(val, host->ioaddr + reg);

if (req_type)
  sdhci_msm_check_power_status(host, req_type);
}

/* This function may sleep*/
static voidspin_unlock_irqrestore(&host->lock, flags);
{
u32 req_type = 0;

req_type = _java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

writeb_relaxed(val, host->ioaddr + reg);

if (req_type)
  sdhci_msm_check_power_status(host dev_pm_opp_set_rate(dev, 0);
}

st *
{
struct mmc_host *mmc = msm_host->mmc;
struct regulator *supply = mmc->supply.vqmmc;
u32 caps  return sdhci_msm_ice_suspend(msm_host);
struct sdhci_host *host = mmc_priv(mmc);
const struct sdhci_msm_offset *msm_offset = msm_host->offset;

if (!IS_ERR(mmc->supply.vqmmc)) {
  if (regulator_is_supported_voltage(supply, 1700000, 1950000))
   caps |= CORE_1_8V_SUPPORT;
  if (regulator_is_supported_voltage
   caps |= CORE_3_0V_SUPPORT;

  if (!caps)
   pr_warn("%s: 1.8/3V not supported for vqmmc\n",
     mmc_hostname(mmc));
}

if c) {
  /*
  long;
  intjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
   */
  u32>curr_io_level;

config  (>oaddr+
    msm_offset->core_vendor_spec);
  config |= CORE_IO_PAD_PWR_SWITCH_EN;

  if ((io_level &*
   config &= ~CORE_IO_PAD_PWR_SWITCH;
  else if ((io_level & REQ_IO_LOW) || (caps   *Whenevercore-clock is gated dynamically, it's needed to
   config |= CORE_IO_PAD_PWR_SWITCH;

  writel_relaxed(config,
    host->ioaddr  *java.lang.StringIndexOutOfBoundsException: Index 4 out of bounds for length 4
}
caps_0 | ;
pr_debug("%s: supported caps: 0x%08x\n", mmc_hostname(mmc), caps);
}

static int sdhci_msm_register_vreg(struct sdhci_msm_host *msm_host)
{
int ret;

ret = mmc_regulator_get_supply(msm_host->mmc);
if (ret)
  return ret;

dev_pm_opp_set_rate(dev, msm_host->clk_rate);

return 0;
}

static int sdhci_msm_start_signal_voltage_switch(struct mmc_host *mmc,
          struct mmc_ios *ios)
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
spin_l&host->ock java.lang.StringIndexOutOfBoundsException: Range [39, 37) out of bounds for length 39
u16 ctrl, status;

/*
  * Signal Voltage Switching isjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  * v3.00 and above.
  */
if (host->version < SDHCI_SPEC_300)
   0java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11

);

switch (ios->signal_voltage) {
case MMC_SIGNAL_VOLTAGE_330:
  if (!host->flags & SDHCI_SIGNALING_330))
   return -EINVAL;

/  18VSignal in the Control2 register to  *
  ctrl &= ~SDHCI_CTRL_VDD_180;
  break;
case MMC_SIGNAL_VOLTAGE_180:
  if (!(host->flags static struct sdhci_msm_driver  {
   return -EINVAL;

  /* Enable 1.8V Signalr java.lang.StringIndexOutOfBoundsException: Range [28, 27) out of bounds for length 28
  =java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 29
  break;

default:
  return -EINVAL;
}

2);

/* Wait for,
usleep_range(5000, 5500);

/*;
status = ctrl & java.lang.StringIndexOutOfBoundsException: Index 29 out of bounds for length 0
ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
if ((ctrl & SDHCI_CTRL_VDD_180) == status)
  return 0;

(mmc_dev(, "%s Regulator outputdidnot becamestable\"java.lang.StringIndexOutOfBoundsException: Index 71 out of bounds for length 71
  mmc_hostname(mmc));

return -EAGAIN;
}

#define DRIVER_NAME "sdhci_msm"
#define SDHCI_MSM_DUMP(f, x...) \
pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)

static void sdhci_msm_dump_vendor_regs(struct sdhci_host *host)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
const struct sdhci_msm_offset *msm_offset = msm_host->offset;

SDHCI_MSM_DUMP("----------- VENDOR REGISTER DUMP -----------\n");

SDHCI_MSM_DUMP(
   "DLL sts: 0x%08x | DLL cfg:  0x%08x | DLL cfg2: 0x%08x\n",
  readl_relaxed(host->ioaddr + msm_offset->core_dll_status),
  readl_relaxed(host->ioaddr + msm_offset->core_dll_config),
  readl_relaxed(host->ioaddr + msm_offset->core_dll_config_2));
SDHCI_MSM_DUMP(
   "DLL cfg3: 0x%08x | DLL usr ctl:  0x%08x | DDR cfg: 0x%08x\n",
  readl_relaxed(host->ioaddr + msm_offset->core_dll_config_3),
  readl_relaxed(host->ioaddr + msm_offset->core_dll_usr_ctl),
  readl_relaxed(host->ioaddr + msm_offset->core_ddr_config));
SDHCI_MSM_DUMP(
   "Vndr func: 0x%08x | Vndr func2 : 0x%08x Vndr func3: 0x%08x\n",
  readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec),
  readl_relaxed(host->ioaddr +
   msm_offset->core_vendor_spec_func2),
  readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3));
}

static const struct sdhci_msm_variant_ops mci_var_ops = {
.msm_readl_relaxed = sdhci_msm_mci_variant_readl_relaxed,
.msm_writel_relaxed = sdhci_msm_mci_variant_writel_relaxed,
};

static const struct sdhci_msm_variant_ops v5_var_ops = {
.msm_readl_relaxed = sdhci_msm_v5_variant_readl_relaxed,
.msm_writel_relaxed = sdhci_msm_v5_variant_writel_relaxed,
};

static const struct sdhci_msm_variant_info sdhci_msm_mci_var = {
.var_ops = &mci_var_ops,
.offset = &sdhci_msm_mci_offset,
};

static const struct sdhci_msm_variant_info sdhci_msm_v5_var = {
.mci_removed = true,
.var_ops = &v5_var_ops,
.offset = &sdhci_msm_v5_offset,
};

static const struct sdhci_msm_variant_info sdm845_sdhci_var = {
.mci_removed = true,
.restore_dll_config = true,
.var_ops = &v5_var_ops,
.offset = &sdhci_msm_v5_offset,
};

static const struct of_device_id sdhci_msm_dt_match[] = {
/*
  * Do not add new variants to the driver which are compatible with
  * generic ones, unless they need customization.
  */
{.compatible = "qcom,sdhci-msm-v4", .data = &sdhci_msm_mci_var},
{.compatible = "qcom,sdhci-msm-v5", .data = &sdhci_msm_v5_var},
{.compatible = "qcom,sdm670-sdhci", .data = &sdm845_sdhci_var},
{.compatible = "qcom,sdm845-sdhci", .data = &sdm845_sdhci_var},
{.compatible = "qcom,sc7180-sdhci", .data = &sdm845_sdhci_var},
{},
};

MODULE_DEVICE_TABLE(of, sdhci_msm_dt_match);

static const struct sdhci_ops sdhci_msm_ops = {
.reset = sdhci_and_cqhci_reset,
.set_clock = sdhci_msm_set_clock,
.get_min_clock = sdhci_msm_get_min_clock,
.get_max_clock = sdhci_msm_get_max_clock,
.set_bus_width = sdhci_set_bus_width,
.set_uhs_signaling = sdhci_msm_set_uhs_signaling,
.write_w = sdhci_msm_writew,
.write_b = sdhci_msm_writeb,
.irq = sdhci_msm_cqe_irq,
.dump_vendor_regs = sdhci_msm_dump_vendor_regs,
.set_power = sdhci_set_power_noreg,
.set_timeout = sdhci_msm_set_timeout,
};

static const struct sdhci_pltfm_data sdhci_msm_pdata = {
.quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
    SDHCI_QUIRK_SINGLE_POWER_WRITE |
    SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
    SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,

.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
.ops = &sdhci_msm_ops,
};

static inline void sdhci_msm_get_of_property(struct platform_device *pdev,
  struct sdhci_host *host)
{
struct device_node *node = pdev->dev.of_node;
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);

if (of_property_read_u32(node, "qcom,ddr-config",
    &msm_host->ddr_config))
  msm_host->ddr_config = DDR_CONFIG_POR_VAL;

of_property_read_u32(node, "qcom,dll-config", &msm_host->dll_config);

if (of_device_is_compatible(node, "qcom,msm8916-sdhci"))
  host->quirks2 |= SDHCI_QUIRK2_BROKEN_64_BIT_DMA;
}

static int sdhci_msm_gcc_reset(struct device *dev, struct sdhci_host *host)
{
struct reset_control *reset;
int ret = 0;

reset = reset_control_get_optional_exclusive(dev, NULL);
if (IS_ERR(reset))
  return dev_err_probe(dev, PTR_ERR(reset),
    "unable to acquire core_reset\n");

if (!reset)
  return ret;

ret = reset_control_assert(reset);
if (ret) {
  reset_control_put(reset);
  return dev_err_probe(dev, ret, "core_reset assert failed\n");
}

/*
  * The hardware requirement for delay between assert/deassert
  * is at least 3-4 sleep clock (32.7KHz) cycles, which comes to
  * ~125us (4/32768). To be on the safe side add 200us delay.
  */
usleep_range(200, 210);

ret = reset_control_deassert(reset);
if (ret) {
  reset_control_put(reset);
  return dev_err_probe(dev, ret, "core_reset deassert failed\n");
}

usleep_range(200, 210);
reset_control_put(reset);

return ret;
}

static int sdhci_msm_probe(struct platform_device *pdev)
{
struct sdhci_host *host;
struct sdhci_pltfm_host *pltfm_host;
struct sdhci_msm_host *msm_host;
struct clk *clk;
int ret;
u16 host_version, core_minor;
u32 core_version, config;
u8 core_major;
const struct sdhci_msm_offset *msm_offset;
const struct sdhci_msm_variant_info *var_info;
struct device_node *node = pdev->dev.of_node;

host = sdhci_pltfm_init(pdev, &sdhci_msm_pdata, sizeof(*msm_host));
if (IS_ERR(host))
  return PTR_ERR(host);

host->sdma_boundary = 0;
pltfm_host = sdhci_priv(host);
msm_host = sdhci_pltfm_priv(pltfm_host);
msm_host->mmc = host->mmc;
msm_host->pdev = pdev;

ret = mmc_of_parse(host->mmc);
if (ret)
  return ret;

/*
  * Based on the compatible string, load the required msm host info from
  * the data associated with the version info.
  */
var_info = of_device_get_match_data(&pdev->dev);

msm_host->mci_removed = var_info->mci_removed;
msm_host->restore_dll_config = var_info->restore_dll_config;
msm_host->var_ops = var_info->var_ops;
msm_host->offset = var_info->offset;

msm_offset = msm_host->offset;

sdhci_get_of_property(pdev);
sdhci_msm_get_of_property(pdev, host);

msm_host->saved_tuning_phase = INVALID_TUNING_PHASE;

ret = sdhci_msm_gcc_reset(&pdev->dev, host);
if (ret)
  return ret;

/* Setup SDCC bus voter clock. */
msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus");
if (!IS_ERR(msm_host->bus_clk)) {
  /* Vote for max. clk rate for max. performance */
  ret = clk_set_rate(msm_host->bus_clk, INT_MAX);
  if (ret)
   return ret;
  ret = clk_prepare_enable(msm_host->bus_clk);
  if (ret)
   return ret;
}

/* Setup main peripheral bus clock */
clk = devm_clk_get(&pdev->dev, "iface");
if (IS_ERR(clk)) {
  ret = PTR_ERR(clk);
  dev_err(&pdev->dev, "Peripheral clk setup failed (%d)\n", ret);
  goto bus_clk_disable;
}
msm_host->bulk_clks[1].clk = clk;

/* Setup SDC MMC clock */
clk = devm_clk_get(&pdev->dev, "core");
if (IS_ERR(clk)) {
  ret = PTR_ERR(clk);
  dev_err(&pdev->dev, "SDC MMC clk setup failed (%d)\n", ret);
  goto bus_clk_disable;
}
msm_host->bulk_clks[0].clk = clk;

  /* Check for optional interconnect paths */
ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL);
if (ret)
  goto bus_clk_disable;

ret = devm_pm_opp_set_clkname(&pdev->dev, "core");
if (ret)
  goto bus_clk_disable;

/* OPP table is optional */
ret = devm_pm_opp_of_add_table(&pdev->dev);
if (ret && ret != -ENODEV) {
  dev_err(&pdev->dev, "Invalid OPP table in Device tree\n");
  goto bus_clk_disable;
}

/* Vote for maximum clock rate for maximum performance */
ret = dev_pm_opp_set_rate(&pdev->dev, INT_MAX);
if (ret)
  dev_warn(&pdev->dev, "core clock boost failed\n");

clk = devm_clk_get(&pdev->dev, "cal");
if (IS_ERR(clk))
  clk = NULL;
msm_host->bulk_clks[2].clk = clk;

clk = devm_clk_get(&pdev->dev, "sleep");
if (IS_ERR(clk))
  clk = NULL;
msm_host->bulk_clks[3].clk = clk;

ret = clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks),
          msm_host->bulk_clks);
if (ret)
  goto bus_clk_disable;

/*
  * xo clock is needed for FLL feature of cm_dll.
  * In case if xo clock is not mentioned in DT, warn and proceed.
  */
msm_host->xo_clk = devm_clk_get(&pdev->dev, "xo");
if (IS_ERR(msm_host->xo_clk)) {
  ret = PTR_ERR(msm_host->xo_clk);
  dev_warn(&pdev->dev, "TCXO clk not present (%d)\n", ret);
}

if (!msm_host->mci_removed) {
  msm_host->core_mem = devm_platform_ioremap_resource(pdev, 1);
  if (IS_ERR(msm_host->core_mem)) {
   ret = PTR_ERR(msm_host->core_mem);
   goto clk_disable;
  }
}

/* Reset the vendor spec register to power on reset state */
writel_relaxed(CORE_VENDOR_SPEC_POR_VAL,
   host->ioaddr + msm_offset->core_vendor_spec);

if (!msm_host->mci_removed) {
  /* Set HC_MODE_EN bit in HC_MODE register */
  msm_host_writel(msm_host, HC_MODE_EN, host,
    msm_offset->core_hc_mode);
  config = msm_host_readl(msm_host, host,
    msm_offset->core_hc_mode);
  config |= FF_CLK_SW_RST_DIS;
  msm_host_writel(msm_host, config, host,
    msm_offset->core_hc_mode);
}

host_version = readw_relaxed((host->ioaddr + SDHCI_HOST_VERSION));
dev_dbg(&pdev->dev, "Host Version: 0x%x Vendor Version 0x%x\n",
  host_version, ((host_version & SDHCI_VENDOR_VER_MASK) >>
          SDHCI_VENDOR_VER_SHIFT));

core_version = msm_host_readl(msm_host, host,
   msm_offset->core_mci_version);
core_major = (core_version & CORE_VERSION_MAJOR_MASK) >>
        CORE_VERSION_MAJOR_SHIFT;
core_minor = core_version & CORE_VERSION_MINOR_MASK;
dev_dbg(&pdev->dev, "MCI Version: 0x%08x, major: 0x%04x, minor: 0x%02x\n",
  core_version, core_major, core_minor);

if (core_major == 1 && core_minor >= 0x42)
  msm_host->use_14lpp_dll_reset = true;

/*
  * SDCC 5 controller with major version 1, minor version 0x34 and later
  * with HS 400 mode support will use CM DLL instead of CDC LP 533 DLL.
  */
if (core_major == 1 && core_minor < 0x34)
  msm_host->use_cdclp533 = true;

/*
  * Support for some capabilities is not advertised by newer
  * controller versions and must be explicitly enabled.
  */
if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) {
  config = readl_relaxed(host->ioaddr + SDHCI_CAPABILITIES);
  config |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT;
  writel_relaxed(config, host->ioaddr +
    msm_offset->core_vendor_spec_capabilities0);
}

if (core_major == 1 && core_minor >= 0x49)
  msm_host->updated_ddr_cfg = true;

if (core_major == 1 && core_minor >= 0x71)
  msm_host->uses_tassadar_dll = true;

ret = sdhci_msm_register_vreg(msm_host);
if (ret)
  goto clk_disable;

/*
  * Power on reset state may trigger power irq if previous status of
  * PWRCTL was either BUS_ON or IO_HIGH_V. So before enabling pwr irq
  * interrupt in GIC, any pending power irq interrupt should be
  * acknowledged. Otherwise power irq interrupt handler would be
  * fired prematurely.
  */
sdhci_msm_handle_pwr_irq(host, 0);

/*
  * Ensure that above writes are propagated before interrupt enablement
  * in GIC.
  */
mb();

/* Setup IRQ for handling power/voltage tasks with PMIC */
msm_host->pwr_irq = platform_get_irq_byname(pdev, "pwr_irq");
if (msm_host->pwr_irq < 0) {
  ret = msm_host->pwr_irq;
  goto clk_disable;
}

sdhci_msm_init_pwr_irq_wait(msm_host);
/* Enable pwr irq interrupts */
msm_host_writel(msm_host, INT_MASK, host,
  msm_offset->core_pwrctl_mask);

ret = devm_request_threaded_irq(&pdev->dev, msm_host->pwr_irq, NULL,
     sdhci_msm_pwr_irq, IRQF_ONESHOT,
     dev_name(&pdev->dev), host);
if (ret) {
  dev_err(&pdev->dev, "Request IRQ failed (%d)\n", ret);
  goto clk_disable;
}

msm_host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_NEED_RSP_BUSY;

/* Set the timeout value to max possible */
host->max_timeout_count = 0xF;

pm_runtime_get_noresume(&pdev->dev);
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
pm_runtime_set_autosuspend_delay(&pdev->dev,
      MSM_MMC_AUTOSUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(&pdev->dev);

host->mmc_host_ops.start_signal_voltage_switch =
  sdhci_msm_start_signal_voltage_switch;
host->mmc_host_ops.execute_tuning = sdhci_msm_execute_tuning;
if (of_property_read_bool(node, "supports-cqe"))
  ret = sdhci_msm_cqe_add_host(host, pdev);
else
  ret = sdhci_add_host(host);
if (ret)
  goto pm_runtime_disable;

pm_runtime_put_autosuspend(&pdev->dev);

return 0;

pm_runtime_disable:
pm_runtime_disable(&pdev->dev);
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_put_noidle(&pdev->dev);
clk_disable:
clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),
       msm_host->bulk_clks);
bus_clk_disable:
if (!IS_ERR(msm_host->bus_clk))
  clk_disable_unprepare(msm_host->bus_clk);
return ret;
}

static void sdhci_msm_remove(struct platform_device *pdev)
{
struct sdhci_host *host = platform_get_drvdata(pdev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
int dead = (readl_relaxed(host->ioaddr + SDHCI_INT_STATUS) ==
      0xffffffff);

sdhci_remove_host(host, dead);

pm_runtime_get_sync(&pdev->dev);
pm_runtime_disable(&pdev->dev);
pm_runtime_put_noidle(&pdev->dev);

clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),
       msm_host->bulk_clks);
if (!IS_ERR(msm_host->bus_clk))
  clk_disable_unprepare(msm_host->bus_clk);
}

static __maybe_unused int sdhci_msm_runtime_suspend(struct device *dev)
{
struct sdhci_host *host = dev_get_drvdata(dev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
unsigned long flags;

spin_lock_irqsave(&host->lock, flags);
host->runtime_suspended = true;
spin_unlock_irqrestore(&host->lock, flags);

/* Drop the performance vote */
dev_pm_opp_set_rate(dev, 0);
clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),
       msm_host->bulk_clks);

return sdhci_msm_ice_suspend(msm_host);
}

static __maybe_unused int sdhci_msm_runtime_resume(struct device *dev)
{
struct sdhci_host *host = dev_get_drvdata(dev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
unsigned long flags;
int ret;

ret = clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks),
           msm_host->bulk_clks);
if (ret)
  return ret;
/*
  * Whenever core-clock is gated dynamically, it's needed to
  * restore the SDR DLL settings when the clock is ungated.
  */
if (msm_host->restore_dll_config && msm_host->clk_rate) {
  ret = sdhci_msm_restore_sdr_dll_config(host);
  if (ret)
   return ret;
}

dev_pm_opp_set_rate(dev, msm_host->clk_rate);

ret = sdhci_msm_ice_resume(msm_host);
if (ret)
  return ret;

spin_lock_irqsave(&host->lock, flags);
host->runtime_suspended = false;
spin_unlock_irqrestore(&host->lock, flags);

return ret;
}

static const struct dev_pm_ops sdhci_msm_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
    pm_runtime_force_resume)
SET_RUNTIME_PM_OPS(sdhci_msm_runtime_suspend,
      sdhci_msm_runtime_resume,
      NULL)
};

static struct platform_driver sdhci_msm_driver = {
.probe = sdhci_msm_probe,
.remove = sdhci_msm_remove,
.driver = {
     .name = "sdhci_msm",
     .of_match_table = sdhci_msm_dt_match,
     .pm = &sdhci_msm_pm_ops,
     .probe_type = PROBE_PREFER_ASYNCHRONOUS,
},
};

module_platform_driver(sdhci_msm_driver);

MODULE_DESCRIPTION("Qualcomm Secure Digital Host Controller Interface driver");
MODULE_LICENSE("GPL v2");

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