// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) /* Copyright (C) 2015-2018 Netronome Systems, Inc. */ /* * nfp_target . c * CPP Access Width Decoder * Authors : Jakub Kicinski < jakub . kicinski @ netronome . com > * Jason McMullan < jason . mcmullan @ netronome . com > * Francois H . Theron < francois . theron @ netronome . com > #define pr_fmt(fmt) "NFP target: " fmt#include <linux/bitops.h>#include <linux/kernel.h>#include <linux/printk.h>#include "nfp_cpp.h" #include "nfp6000/nfp6000.h" #define P32 1 #define P64 2 /* This structure ONLY includes items that can be done with a read or write of * 32 - bit or 64 - bit words . All others are not listed . #define AT(_action, _token, _pull, _push) \case NFP_CPP_ID(0 , (_action), (_token)): \return PUSHPULL((_pull), (_push))static int target_rw(u32 cpp_id, int pp, int start, int len)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {0 , 0 , 0 , pp);1 , 0 , pp, 0 );0 , pp, pp);default :return -EINVAL;static int nfp6000_nbi_dma(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {0 , 0 , 0 , P64); /* ReadNbiDma */ 1 , 0 , P64, 0 ); /* WriteNbiDma */ 0 , P64, P64);default :return -EINVAL;static int nfp6000_nbi_stats(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {0 , 0 , 0 , P32); /* ReadNbiStats */ 1 , 0 , P32, 0 ); /* WriteNbiStats */ 0 , P32, P32);default :return -EINVAL;static int nfp6000_nbi_tm(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {0 , 0 , 0 , P64); /* ReadNbiTM */ 1 , 0 , P64, 0 ); /* WriteNbiTM */ 0 , P64, P64);default :return -EINVAL;static int nfp6000_nbi_ppc(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {0 , 0 , 0 , P64); /* ReadNbiPreclassifier */ 1 , 0 , P64, 0 ); /* WriteNbiPreclassifier */ 0 , P64, P64);default :return -EINVAL;static int nfp6000_nbi(u32 cpp_id, u64 address)0 x3fFFFF;if (rel_addr < (1 << 20 ))return nfp6000_nbi_dma(cpp_id);if (rel_addr < (2 << 20 ))return nfp6000_nbi_stats(cpp_id);if (rel_addr < (3 << 20 ))return nfp6000_nbi_tm(cpp_id);return nfp6000_nbi_ppc(cpp_id);/* This structure ONLY includes items that can be done with a read or write of * 32 - bit or 64 - bit words . All others are not listed . static int nfp6000_mu_common(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {0 , P64, P64); /* read_be/write_be */ 1 , P64, P64); /* read_le/write_le */ 2 , P64, P64); /* read_swap_be/write_swap_be */ 3 , P64, P64); /* read_swap_le/write_swap_le */ 0 , 0 , 0 , P64); /* read_be */ 0 , 1 , 0 , P64); /* read_le */ 0 , 2 , 0 , P64); /* read_swap_be */ 0 , 3 , 0 , P64); /* read_swap_le */ 1 , 0 , P64, 0 ); /* write_be */ 1 , 1 , P64, 0 ); /* write_le */ 1 , 2 , P64, 0 ); /* write_swap_be */ 1 , 3 , P64, 0 ); /* write_swap_le */ 3 , 0 , 0 , P32); /* atomic_read */ 3 , 2 , P32, 0 ); /* mask_compare_write */ 4 , 0 , P32, 0 ); /* atomic_write */ 4 , 2 , 0 , 0 ); /* atomic_write_imm */ 4 , 3 , 0 , P32); /* swap_imm */ 5 , 0 , P32, 0 ); /* set */ 5 , 3 , 0 , P32); /* test_set_imm */ 6 , 0 , P32, 0 ); /* clr */ 6 , 3 , 0 , P32); /* test_clr_imm */ 7 , 0 , P32, 0 ); /* add */ 7 , 3 , 0 , P32); /* test_add_imm */ 8 , 0 , P32, 0 ); /* addsat */ 8 , 3 , 0 , P32); /* test_subsat_imm */ 9 , 0 , P32, 0 ); /* sub */ 9 , 3 , 0 , P32); /* test_sub_imm */ 10 , 0 , P32, 0 ); /* subsat */ 10 , 3 , 0 , P32); /* test_subsat_imm */ 13 , 0 , 0 , P32); /* microq128_get */ 13 , 1 , 0 , P32); /* microq128_pop */ 13 , 2 , P32, 0 ); /* microq128_put */ 15 , 0 , P32, 0 ); /* xor */ 15 , 3 , 0 , P32); /* test_xor_imm */ 28 , 0 , 0 , P32); /* read32_be */ 28 , 1 , 0 , P32); /* read32_le */ 28 , 2 , 0 , P32); /* read32_swap_be */ 28 , 3 , 0 , P32); /* read32_swap_le */ 31 , 0 , P32, 0 ); /* write32_be */ 31 , 1 , P32, 0 ); /* write32_le */ 31 , 2 , P32, 0 ); /* write32_swap_be */ 31 , 3 , P32, 0 ); /* write32_swap_le */ default :return -EINVAL;static int nfp6000_mu_ctm(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {16 , 1 , 0 , P32); /* packet_read_packet_status */ 17 , 1 , 0 , P32); /* packet_credit_get */ 17 , 3 , 0 , P64); /* packet_add_thread */ 18 , 2 , 0 , P64); /* packet_free_and_return_pointer */ 18 , 3 , 0 , P64); /* packet_return_pointer */ 21 , 0 , 0 , P64); /* pe_dma_to_memory_indirect */ 21 , 1 , 0 , P64); /* pe_dma_to_memory_indirect_swap */ 21 , 2 , 0 , P64); /* pe_dma_to_memory_indirect_free */ 21 , 3 , 0 , P64); /* pe_dma_to_memory_indirect_free_swap */ default :return nfp6000_mu_common(cpp_id);static int nfp6000_mu_emu(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {18 , 0 , 0 , P32); /* read_queue */ 18 , 1 , 0 , P32); /* read_queue_ring */ 18 , 2 , P32, 0 ); /* write_queue */ 18 , 3 , P32, 0 ); /* write_queue_ring */ 20 , 2 , P32, 0 ); /* journal */ 21 , 0 , 0 , P32); /* get */ 21 , 1 , 0 , P32); /* get_eop */ 21 , 2 , 0 , P32); /* get_freely */ 22 , 0 , 0 , P32); /* pop */ 22 , 1 , 0 , P32); /* pop_eop */ 22 , 2 , 0 , P32); /* pop_freely */ default :return nfp6000_mu_common(cpp_id);static int nfp6000_mu_imu(u32 cpp_id)return nfp6000_mu_common(cpp_id);static int nfp6000_mu(u32 cpp_id, u64 address)int pp;if (address < 0 x2000000000ULL)else if (address < 0 x8000000000ULL)else if (address < 0 x9800000000ULL)else if (address < 0 x9C00000000ULL)else if (address < 0 xA000000000ULL)else return pp;static int nfp6000_ila(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {0 , 1 , 0 , P32); /* read_check_error */ 2 , 0 , 0 , P32); /* read_int */ 3 , 0 , P32, 0 ); /* write_int */ default :return target_rw(cpp_id, P32, 48 , 4 );static int nfp6000_pci(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {2 , 0 , 0 , P32);3 , 0 , P32, 0 );default :return target_rw(cpp_id, P32, 4 , 4 );static int nfp6000_crypto(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {2 , 0 , P64, 0 );default :return target_rw(cpp_id, P64, 12 , 4 );static int nfp6000_cap_xpb(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {0 , 1 , 0 , P32); /* RingGet */ 0 , 2 , P32, 0 ); /* Interthread Signal */ 1 , 1 , P32, 0 ); /* RingPut */ 1 , 2 , P32, 0 ); /* CTNNWr */ 2 , 0 , 0 , P32); /* ReflectRd, signal none */ 2 , 1 , 0 , P32); /* ReflectRd, signal self */ 2 , 2 , 0 , P32); /* ReflectRd, signal remote */ 2 , 3 , 0 , P32); /* ReflectRd, signal both */ 3 , 0 , P32, 0 ); /* ReflectWr, signal none */ 3 , 1 , P32, 0 ); /* ReflectWr, signal self */ 3 , 2 , P32, 0 ); /* ReflectWr, signal remote */ 3 , 3 , P32, 0 ); /* ReflectWr, signal both */ 1 , P32, P32);default :return target_rw(cpp_id, P32, 1 , 63 );static int nfp6000_cls(u32 cpp_id)switch (cpp_id & NFP_CPP_ID(0 , ~0 , ~0 )) {0 , 3 , P32, 0 ); /* xor */ 2 , 0 , P32, 0 ); /* set */ 2 , 1 , P32, 0 ); /* clr */ 4 , 0 , P32, 0 ); /* add */ 4 , 1 , P32, 0 ); /* add64 */ 6 , 0 , P32, 0 ); /* sub */ 6 , 1 , P32, 0 ); /* sub64 */ 6 , 2 , P32, 0 ); /* subsat */ 8 , 2 , P32, 0 ); /* hash_mask */ 8 , 3 , P32, 0 ); /* hash_clear */ 9 , 0 , 0 , P32); /* ring_get */ 9 , 1 , 0 , P32); /* ring_pop */ 9 , 2 , 0 , P32); /* ring_get_freely */ 9 , 3 , 0 , P32); /* ring_pop_freely */ 10 , 0 , P32, 0 ); /* ring_put */ 10 , 2 , P32, 0 ); /* ring_journal */ 14 , 0 , P32, 0 ); /* reflect_write_sig_local */ 15 , 1 , 0 , P32); /* reflect_read_sig_local */ 17 , 2 , P32, 0 ); /* statisic */ 24 , 0 , 0 , P32); /* ring_read */ 24 , 1 , P32, 0 ); /* ring_write */ 25 , 0 , 0 , P32); /* ring_workq_add_thread */ 25 , 1 , P32, 0 ); /* ring_workq_add_work */ default :return target_rw(cpp_id, P32, 0 , 64 );int nfp_target_pushpull(u32 cpp_id, u64 address)switch (NFP_CPP_ID_TARGET_of(cpp_id)) {case NFP_CPP_TARGET_NBI:return nfp6000_nbi(cpp_id, address);case NFP_CPP_TARGET_QDR:return target_rw(cpp_id, P32, 24 , 4 );case NFP_CPP_TARGET_ILA:return nfp6000_ila(cpp_id);case NFP_CPP_TARGET_MU:return nfp6000_mu(cpp_id, address);case NFP_CPP_TARGET_PCIE:return nfp6000_pci(cpp_id);case NFP_CPP_TARGET_ARM:if (address < 0 x10000)return target_rw(cpp_id, P64, 1 , 1 );else return target_rw(cpp_id, P32, 1 , 1 );case NFP_CPP_TARGET_CRYPTO:return nfp6000_crypto(cpp_id);case NFP_CPP_TARGET_CT_XPB:return nfp6000_cap_xpb(cpp_id);case NFP_CPP_TARGET_CLS:return nfp6000_cls(cpp_id);case 0 :return target_rw(cpp_id, P32, 4 , 4 );default :return -EINVAL;#undef AT#undef P32#undef P64/* All magic NFP-6xxx IMB 'mode' numbers here are from: * Databook ( 1 August 2013 ) * - System Overview and Connectivity * - - Internal Connectivity * - - - Distributed Switch Fabric - Command Push / Pull ( DSF - CPP ) Bus * - - - - CPP addressing * - - - - - Table 3 . 6 . CPP Address Translation Mode Commands #define _NIC_NFP6000_MU_LOCALITY_DIRECT 2 static int nfp_decode_basic(u64 addr, int *dest_island, int cpp_tgt,int mode, bool addr40, int isld1, int isld0)int iid_lsb, idx_lsb;/* This function doesn't handle MU or CTXBP */ if (cpp_tgt == NFP_CPP_TARGET_MU || cpp_tgt == NFP_CPP_TARGET_CT_XPB)return -EINVAL;switch (mode) {case 0 :/* For VQDR, in this mode for 32-bit addressing * it would be islands 0 , 16 , 32 and 48 depending on channel * and upper address bits . * Since those are not all valid islands , most decode * cases would result in bad island IDs , but we do them * anyway since this is decoding an address that is already * assumed to be used as - is to get to sram . 34 : 26 ;0 x3F;return 0 ;case 1 :/* For VQDR 32-bit, this would decode as: * Channel 0 : island # 0 * Channel 1 : island # 0 * Channel 2 : island # 1 * Channel 3 : island # 1 * That would be valid as long as both islands * have VQDR . Let ' s allow this . 39 : 31 ;if (addr & BIT_ULL(idx_lsb))else return 0 ;case 2 :/* For VQDR 32-bit: * Channel 0 : ( island # 0 | 0 ) * Channel 1 : ( island # 0 | 1 ) * Channel 2 : ( island # 1 | 0 ) * Channel 3 : ( island # 1 | 1 ) * * Make sure we compare against isldN values * by clearing the LSB . * This is what the silicon does . 1 ;1 ;39 : 31 ;1 ;if (addr & BIT_ULL(idx_lsb))int )((addr >> iid_lsb) & 1 );else int )((addr >> iid_lsb) & 1 );return 0 ;case 3 :/* In this mode the data address starts to affect the island ID * so rather not allow it . In some really specific case * one could use this to send the upper half of the * VQDR channel to another MU , but this is getting very * specific . * However , as above for mode 0 , this is the decoder * and the caller should validate the resulting IID . * This blindly does what the silicon would do . 3 ;3 ;39 : 31 ;2 ;if (addr & BIT_ULL(idx_lsb))int )((addr >> iid_lsb) & 3 );else int )((addr >> iid_lsb) & 3 );return 0 ;default :return -EINVAL;static int nfp_encode_basic_qdr(u64 addr, int dest_island, int cpp_tgt,int mode, bool addr40, int isld1, int isld0)int v, ret;/* Full Island ID and channel bits overlap? */ if (ret)return ret;/* The current address won't go where expected? */ if (dest_island != -1 && dest_island != v)return -EINVAL;/* If dest_island was -1, we don't care where it goes. */ return 0 ;/* Try each option, take first one that fits. * Not sure if we would want to do some smarter * searching and prefer 0 or non - 0 island IDs . static int nfp_encode_basic_search(u64 *addr, int dest_island, int *isld,int iid_lsb, int idx_lsb, int v_max)int i, v;for (i = 0 ; i < 2 ; i++)for (v = 0 ; v < v_max; v++) {if (dest_island != (isld[i] | v))continue ;return 0 ;return -ENODEV;/* For VQDR, we may not modify the Channel bits, which might overlap * with the Index bit . When it does , we need to ensure that isld0 = = isld1 . static int nfp_encode_basic(u64 *addr, int dest_island, int cpp_tgt,int mode, bool addr40, int isld1, int isld0)int iid_lsb, idx_lsb;int isld[2 ];0 ] = isld0;1 ] = isld1;/* This function doesn't handle MU or CTXBP */ if (cpp_tgt == NFP_CPP_TARGET_MU || cpp_tgt == NFP_CPP_TARGET_CT_XPB)return -EINVAL;switch (mode) {case 0 :if (cpp_tgt == NFP_CPP_TARGET_QDR && !addr40)/* In this specific mode we'd rather not modify * the address but we can verify if the existing * contents will point to a valid island . return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,34 : 26 ;/* <39:34> or <31:26> */ 5 , iid_lsb);return 0 ;case 1 :if (cpp_tgt == NFP_CPP_TARGET_QDR && !addr40)return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,39 : 31 ;if (dest_island == isld0) {/* Only need to clear the Index bit */ return 0 ;if (dest_island == isld1) {/* Only need to set the Index bit */ return 0 ;return -ENODEV;case 2 :/* iid<0> = addr<30> = channel<0> * channel < 1 > = addr < 31 > = Index if (cpp_tgt == NFP_CPP_TARGET_QDR && !addr40)/* Special case where we allow channel bits to * be set before hand and with them select an island . * So we need to confirm that it ' s at least plausible . return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,/* Make sure we compare against isldN values * by clearing the LSB . * This is what the silicon does . 0 ] &= ~1 ;1 ] &= ~1 ;39 : 31 ;1 ;return nfp_encode_basic_search(addr, dest_island, isld,2 );case 3 :if (cpp_tgt == NFP_CPP_TARGET_QDR && !addr40)/* iid<0> = addr<29> = data * iid < 1 > = addr < 30 > = channel < 0 > * channel < 1 > = addr < 31 > = Index return nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,0 ] &= ~3 ;1 ] &= ~3 ;39 : 31 ;2 ;return nfp_encode_basic_search(addr, dest_island, isld,4 );default :return -EINVAL;static int nfp_encode_mu(u64 *addr, int dest_island, int mode,bool addr40, int isld1, int isld0)int iid_lsb, idx_lsb, locality_lsb;int isld[2 ];int da;0 ] = isld0;1 ] = isld1;if (((*addr >> locality_lsb) & 3 ) == _NIC_NFP6000_MU_LOCALITY_DIRECT)1 ;else 0 ;switch (mode) {case 0 :32 : 24 ;5 , iid_lsb);return 0 ;case 1 :if (da) {32 : 24 ;5 , iid_lsb);return 0 ;37 : 29 ;if (dest_island == isld0) {return 0 ;if (dest_island == isld1) {return 0 ;return -ENODEV;case 2 :if (da) {32 : 24 ;5 , iid_lsb);return 0 ;/* Make sure we compare against isldN values * by clearing the LSB . * This is what the silicon does . 0 ] &= ~1 ;1 ] &= ~1 ;37 : 29 ;1 ;return nfp_encode_basic_search(addr, dest_island, isld,2 );case 3 :/* Only the EMU will use 40 bit addressing. Silently * set the direct locality bit for everyone else . * The SDK toolchain uses dest_island < = 0 to test * for atypical address encodings to support access * to local - island CTM with a 32 - but address ( high - locality * is effewctively ignored and just used for * routing to island # 0 ) . if (dest_island > 0 && (dest_island < 24 || dest_island > 26 )) {1 ;if (da) {32 : 24 ;5 , iid_lsb);return 0 ;0 ] &= ~3 ;1 ] &= ~3 ;37 : 29 ;2 ;return nfp_encode_basic_search(addr, dest_island, isld,4 );default :return -EINVAL;static int nfp_cppat_addr_encode(u64 *addr, int dest_island, int cpp_tgt,int mode, bool addr40, int isld1, int isld0)switch (cpp_tgt) {case NFP_CPP_TARGET_NBI:case NFP_CPP_TARGET_QDR:case NFP_CPP_TARGET_ILA:case NFP_CPP_TARGET_PCIE:case NFP_CPP_TARGET_ARM:case NFP_CPP_TARGET_CRYPTO:case NFP_CPP_TARGET_CLS:return nfp_encode_basic(addr, dest_island, cpp_tgt, mode,case NFP_CPP_TARGET_MU:return nfp_encode_mu(addr, dest_island, mode,case NFP_CPP_TARGET_CT_XPB:if (mode != 1 || addr40)return -EINVAL;29 , 24 );24 ) & GENMASK_ULL(29 , 24 );return 0 ;default :return -EINVAL;int nfp_target_cpp(u32 cpp_island_id, u64 cpp_island_address,const u32 *imb_table)const int island = NFP_CPP_ID_ISLAND_of(cpp_island_id);const int target = NFP_CPP_ID_TARGET_of(cpp_island_id);int err;if (target < 0 || target >= 16 ) {"Invalid CPP target: %d\n" , target);return -EINVAL;if (island == 0 ) {/* Already translated */ return 0 ;/* CPP + Island only allowed on systems with IMB tables */ if (!imb_table)return -EINVAL;13 ) & 7 ), ((imb >> 12 ) & 1 ),6 ) & 0 x3f), ((imb >> 0 ) & 0 x3f));if (err) {"Can't encode CPP address: %d\n" , err);return err;return 0 ;
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