/* SPDX-License-Identifier: BSD-3-Clause-Clear */ /* * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/ #include"core.h"
/* ath11k_buffer_addr * * info0 * Address (lower 32 bits) of the msdu buffer or msdu extension * descriptor or Link descriptor * * addr * Address (upper 8 bits) of the msdu buffer or msdu extension * descriptor or Link descriptor * * return_buffer_manager (RBM) * Consumer: WBM * Producer: SW/FW * Indicates to which buffer manager the buffer or MSDU_EXTENSION * descriptor or link descriptor that is being pointed to shall be * returned after the frame has been processed. It is used by WBM * for routing purposes. * * Values are defined in enum %HAL_RX_BUF_RBM_ * * sw_buffer_cookie * Cookie field exclusively used by SW. HW ignores the contents, * accept that it passes the programmed value on to other * descriptors together with the physical address. * * Field can be used by SW to for example associate the buffers * physical address with the virtual address.
*/
/* rx_mpdu_desc * Producer: RXDMA * Consumer: REO/SW/FW * * msdu_count * The number of MSDUs within the MPDU * * mpdu_sequence_number * The field can have two different meanings based on the setting * of field 'bar_frame'. If 'bar_frame' is set, it means the MPDU * start sequence number from the BAR frame otherwise it means * the MPDU sequence number of the received frame. * * fragment_flag * When set, this MPDU is a fragment and REO should forward this * fragment MPDU to the REO destination ring without any reorder * checks, pn checks or bitmap update. This implies that REO is * forwarding the pointer to the MSDU link descriptor. * * mpdu_retry_bit * The retry bit setting from the MPDU header of the received frame * * ampdu_flag * Indicates the MPDU was received as part of an A-MPDU. * * bar_frame * Indicates the received frame is a BAR frame. After processing, * this frame shall be pushed to SW or deleted. * * valid_pn * When not set, REO will not perform a PN sequence number check. * * valid_sa * Indicates OLE found a valid SA entry for all MSDUs in this MPDU. * * sa_idx_timeout * Indicates, at least 1 MSDU within the MPDU has an unsuccessful * MAC source address search due to the expiration of search timer. * * valid_da * When set, OLE found a valid DA entry for all MSDUs in this MPDU. * * da_mcbc * Field Only valid if valid_da is set. Indicates at least one of * the DA addresses is a Multicast or Broadcast address. * * da_idx_timeout * Indicates, at least 1 MSDU within the MPDU has an unsuccessful * MAC destination address search due to the expiration of search * timer. * * raw_mpdu * Field only valid when first_msdu_in_mpdu_flag is set. Indicates * the contents in the MSDU buffer contains a 'RAW' MPDU.
*/
/* rx_msdu_desc * * first_msdu_in_mpdu * Indicates first msdu in mpdu. * * last_msdu_in_mpdu * Indicates last msdu in mpdu. This flag can be true only when * 'Msdu_continuation' set to 0. This implies that when an msdu * is spread out over multiple buffers and thus msdu_continuation * is set, only for the very last buffer of the msdu, can the * 'last_msdu_in_mpdu' be set. * * When both first_msdu_in_mpdu and last_msdu_in_mpdu are set, * the MPDU that this MSDU belongs to only contains a single MSDU. * * msdu_continuation * When set, this MSDU buffer was not able to hold the entire MSDU. * The next buffer will therefore contain additional information * related to this MSDU. * * msdu_length * Field is only valid in combination with the 'first_msdu_in_mpdu' * being set. Full MSDU length in bytes after decapsulation. This * field is still valid for MPDU frames without A-MSDU. It still * represents MSDU length after decapsulation Or in case of RAW * MPDUs, it indicates the length of the entire MPDU (without FCS * field). * * reo_destination_indication * The id of the reo exit ring where the msdu frame shall push * after (MPDU level) reordering has finished. Values are defined * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_. * * msdu_drop * Indicates that REO shall drop this MSDU and not forward it to * any other ring. * * valid_sa * Indicates OLE found a valid SA entry for this MSDU. * * sa_idx_timeout * Indicates, an unsuccessful MAC source address search due to * the expiration of search timer for this MSDU. * * valid_da * When set, OLE found a valid DA entry for this MSDU. * * da_mcbc * Field Only valid if valid_da is set. Indicates the DA address * is a Multicast or Broadcast address for this MSDU. * * da_idx_timeout * Indicates, an unsuccessful MAC destination address search due * to the expiration of search timer for this MSDU.
*/
/* hal_reo_dest_ring * * Producer: RXDMA * Consumer: REO/SW/FW * * buf_addr_info * Details of the physical address of a buffer or MSDU * link descriptor. * * rx_mpdu_info * General information related to the MPDU that is passed * on from REO entrance ring to the REO destination ring. * * rx_msdu_info * General information related to the MSDU that is passed * on from RXDMA all the way to the REO destination ring. * * queue_addr_lo * Address (lower 32 bits) of the REO queue descriptor. * * queue_addr_hi * Address (upper 8 bits) of the REO queue descriptor. * * buffer_type * Indicates the type of address provided in the buf_addr_info. * Values are defined in enum %HAL_REO_DEST_RING_BUFFER_TYPE_. * * push_reason * Reason for pushing this frame to this exit ring. Values are * defined in enum %HAL_REO_DEST_RING_PUSH_REASON_. * * error_code * Valid only when 'push_reason' is set. All error codes are * defined in enum %HAL_REO_DEST_RING_ERROR_CODE_. * * rx_queue_num * Indicates the REO MPDU reorder queue id from which this frame * originated. * * reorder_info_valid * When set, REO has been instructed to not perform the actual * re-ordering of frames for this queue, but just to insert * the reorder opcodes. * * reorder_opcode * Field is valid when 'reorder_info_valid' is set. This field is * always valid for debug purpose as well. * * reorder_slot_idx * Valid only when 'reorder_info_valid' is set. * * ring_id * The buffer pointer ring id. * 0 - Idle ring * 1 - N refers to other rings. * * looping_count * Indicates the number of times the producer of entries into * this ring has looped around the ring.
*/
/* hal_reo_entrance_ring * * Producer: RXDMA * Consumer: REO * * buf_addr_info * Details of the physical address of a buffer or MSDU * link descriptor. * * rx_mpdu_info * General information related to the MPDU that is passed * on from REO entrance ring to the REO destination ring. * * queue_addr_lo * Address (lower 32 bits) of the REO queue descriptor. * * queue_addr_hi * Address (upper 8 bits) of the REO queue descriptor. * * mpdu_byte_count * An approximation of the number of bytes received in this MPDU. * Used to keeps stats on the amount of data flowing * through a queue. * * reo_destination_indication * The id of the reo exit ring where the msdu frame shall push * after (MPDU level) reordering has finished. Values are defined * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_. * * frameless_bar * Indicates that this REO entrance ring struct contains BAR info * from a multi TID BAR frame. The original multi TID BAR frame * itself contained all the REO info for the first TID, but all * the subsequent TID info and their linkage to the REO descriptors * is passed down as 'frameless' BAR info. * * The only fields valid in this descriptor when this bit is set * are queue_addr_lo, queue_addr_hi, mpdu_sequence_number, * bar_frame and peer_meta_data. * * rxdma_push_reason * Reason for pushing this frame to this exit ring. Values are * defined in enum %HAL_REO_DEST_RING_PUSH_REASON_. * * rxdma_error_code * Valid only when 'push_reason' is set. All error codes are * defined in enum %HAL_REO_ENTR_RING_RXDMA_ECODE_. * * ring_id * The buffer pointer ring id. * 0 - Idle ring * 1 - N refers to other rings. * * looping_count * Indicates the number of times the producer of entries into * this ring has looped around the ring.
*/
/* hal_tcl_data_cmd * * buf_addr_info * Details of the physical address of a buffer or MSDU * link descriptor. * * desc_type * Indicates the type of address provided in the buf_addr_info. * Values are defined in enum %HAL_REO_DEST_RING_BUFFER_TYPE_. * * epd * When this bit is set then input packet is an EPD type. * * encap_type * Indicates the encapsulation that HW will perform. Values are * defined in enum %HAL_TCL_ENCAP_TYPE_. * * encrypt_type * Field only valid for encap_type: RAW * Values are defined in enum %HAL_ENCRYPT_TYPE_. * * src_buffer_swap * Treats source memory (packet buffer) organization as big-endian. * 1'b0: Source memory is little endian * 1'b1: Source memory is big endian * * link_meta_swap * Treats link descriptor and Metadata as big-endian. * 1'b0: memory is little endian * 1'b1: memory is big endian * * search_type * Search type select * 0 - Normal search, 1 - Index based address search, * 2 - Index based flow search * * addrx_en * addry_en * Address X/Y search enable in ASE correspondingly. * 1'b0: Search disable * 1'b1: Search Enable * * cmd_num * This number can be used to match against status. * * data_length * MSDU length in case of direct descriptor. Length of link * extension descriptor in case of Link extension descriptor. * * *_checksum_en * Enable checksum replacement for ipv4, udp_over_ipv4, ipv6, * udp_over_ipv6, tcp_over_ipv4 and tcp_over_ipv6. * * to_fw * Forward packet to FW along with classification result. The * packet will not be forward to TQM when this bit is set. * 1'b0: Use classification result to forward the packet. * 1'b1: Override classification result & forward packet only to fw * * packet_offset * Packet offset from Metadata in case of direct buffer descriptor. * * buffer_timestamp * buffer_timestamp_valid * Frame system entrance timestamp. It shall be filled by first * module (SW, TCL or TQM) that sees the frames first. * * mesh_enable * For raw WiFi frames, this indicates transmission to a mesh STA, * enabling the interpretation of the 'Mesh Control Present' bit * (bit 8) of QoS Control. * For native WiFi frames, this indicates that a 'Mesh Control' * field is present between the header and the LLC. * * hlos_tid_overwrite * * When set, TCL shall ignore the IP DSCP and VLAN PCP * fields and use HLOS_TID as the final TID. Otherwise TCL * shall consider the DSCP and PCP fields as well as HLOS_TID * and choose a final TID based on the configured priority * * hlos_tid * HLOS MSDU priority * Field is used when HLOS_TID_overwrite is set. * * lmac_id * TCL uses this LMAC_ID in address search, i.e, while * finding matching entry for the packet in AST corresponding * to given LMAC_ID * * If LMAC ID is all 1s (=> value 3), it indicates wildcard * match for any MAC * * dscp_tid_table_num * DSCP to TID mapping table number that need to be used * for the MSDU. * * search_index * The index that will be used for index based address or * flow search. The field is valid when 'search_type' is 1 or 2. * * cache_set_num * * Cache set number that should be used to cache the index * based search results, for address and flow search. This * value should be equal to LSB four bits of the hash value of * match data, in case of search index points to an entry which * may be used in content based search also. The value can be * anything when the entry pointed by search index will not be * used for content based search. * * ring_id * The buffer pointer ring ID. * 0 refers to the IDLE ring * 1 - N refers to other rings * * looping_count * * A count value that indicates the number of times the * producer of entries into the Ring has looped around the * ring. * * At initialization time, this value is set to 0. On the * first loop, this value is set to 1. After the max value is * reached allowed by the number of bits for this field, the * count value continues with 0 again. * * In case SW is the consumer of the ring entries, it can * use this field to figure out up to where the producer of * entries has created new entries. This eliminates the need to * check where the head pointer' of the ring is located once * the SW starts processing an interrupt indicating that new * entries have been put into this ring... * * Also note that SW if it wants only needs to look at the * LSB bit of this count value.
*/
/* hal_tcl_gse_cmd * * ctrl_buf_addr_lo, ctrl_buf_addr_hi * Address of a control buffer containing additional info needed * for this command execution. * * gse_ctrl * GSE control operations. This includes cache operations and table * entry statistics read/clear operation. Values are defined in * enum %HAL_TCL_GSE_CTRL. * * gse_sel * To select the ASE/FSE to do the operation mention by GSE_ctrl. * 0: FSE select 1: ASE select * * status_destination_ring_id * TCL status ring to which the GSE status needs to be send. * * swap * Bit to enable byte swapping of contents of buffer. * * meta_data * Meta data to be returned in the status descriptor
*/
/* hal_tcl_status_ring * * gse_ctrl * GSE control operations. This includes cache operations and table * entry statistics read/clear operation. Values are defined in * enum %HAL_TCL_GSE_CTRL. * * gse_sel * To select the ASE/FSE to do the operation mention by GSE_ctrl. * 0: FSE select 1: ASE select * * cache_op_res * Cache operation result. Values are defined in enum * %HAL_TCL_CACHE_OP_RES_. * * msdu_cnt * msdu_byte_count * MSDU count of Entry and MSDU byte count for entry 1. * * hash_indx * Hash value of the entry in case of search failed or disabled.
*/
/* * hal_ce_srng_src_desc * * buffer_addr_lo * LSB 32 bits of the 40 Bit Pointer to the source buffer * * buffer_addr_hi * MSB 8 bits of the 40 Bit Pointer to the source buffer * * toeplitz_en * Enable generation of 32-bit Toeplitz-LFSR hash for * data transfer. In case of gather field in first source * ring entry of the gather copy cycle in taken into account. * * src_swap * Treats source memory organization as big-endian. For * each dword read (4 bytes), the byte 0 is swapped with byte 3 * and byte 1 is swapped with byte 2. * In case of gather field in first source ring entry of * the gather copy cycle in taken into account. * * dest_swap * Treats destination memory organization as big-endian. * For each dword write (4 bytes), the byte 0 is swapped with * byte 3 and byte 1 is swapped with byte 2. * In case of gather field in first source ring entry of * the gather copy cycle in taken into account. * * gather * Enables gather of multiple copy engine source * descriptors to one destination. * * ce_res_0 * Reserved * * * length * Length of the buffer in units of octets of the current * descriptor * * fw_metadata * Meta data used by FW. * In case of gather field in first source ring entry of * the gather copy cycle in taken into account. * * ce_res_1 * Reserved * * ce_res_2 * Reserved * * ring_id * The buffer pointer ring ID. * 0 refers to the IDLE ring * 1 - N refers to other rings * Helps with debugging when dumping ring contents. * * looping_count * A count value that indicates the number of times the * producer of entries into the Ring has looped around the * ring. * * At initialization time, this value is set to 0. On the * first loop, this value is set to 1. After the max value is * reached allowed by the number of bits for this field, the * count value continues with 0 again. * * In case SW is the consumer of the ring entries, it can * use this field to figure out up to where the producer of * entries has created new entries. This eliminates the need to * check where the head pointer' of the ring is located once * the SW starts processing an interrupt indicating that new * entries have been put into this ring... * * Also note that SW if it wants only needs to look at the * LSB bit of this count value.
*/
/* hal_ce_srng_dest_desc * * dst_buffer_low * LSB 32 bits of the 40 Bit Pointer to the Destination * buffer * * dst_buffer_high * MSB 8 bits of the 40 Bit Pointer to the Destination * buffer * * ce_res_4 * Reserved * * ring_id * The buffer pointer ring ID. * 0 refers to the IDLE ring * 1 - N refers to other rings * Helps with debugging when dumping ring contents. * * looping_count * A count value that indicates the number of times the * producer of entries into the Ring has looped around the * ring. * * At initialization time, this value is set to 0. On the * first loop, this value is set to 1. After the max value is * reached allowed by the number of bits for this field, the * count value continues with 0 again. * * In case SW is the consumer of the ring entries, it can * use this field to figure out up to where the producer of * entries has created new entries. This eliminates the need to * check where the head pointer' of the ring is located once * the SW starts processing an interrupt indicating that new * entries have been put into this ring... * * Also note that SW if it wants only needs to look at the * LSB bit of this count value.
*/
/* hal_ce_srng_dst_status_desc * * ce_res_5 * Reserved * * toeplitz_en * * src_swap * Source memory buffer swapped * * dest_swap * Destination memory buffer swapped * * gather * Gather of multiple copy engine source descriptors to one * destination enabled * * ce_res_6 * Reserved * * length * Sum of all the Lengths of the source descriptor in the * gather chain * * toeplitz_hash_0 * 32 LS bits of 64 bit Toeplitz LFSR hash result * * toeplitz_hash_1 * 32 MS bits of 64 bit Toeplitz LFSR hash result * * fw_metadata * Meta data used by FW * In case of gather field in first source ring entry of * the gather copy cycle in taken into account. * * ce_res_7 * Reserved * * ring_id * The buffer pointer ring ID. * 0 refers to the IDLE ring * 1 - N refers to other rings * Helps with debugging when dumping ring contents. * * looping_count * A count value that indicates the number of times the * producer of entries into the Ring has looped around the * ring. * * At initialization time, this value is set to 0. On the * first loop, this value is set to 1. After the max value is * reached allowed by the number of bits for this field, the * count value continues with 0 again. * * In case SW is the consumer of the ring entries, it can * use this field to figure out up to where the producer of * entries has created new entries. This eliminates the need to * check where the head pointer' of the ring is located once * the SW starts processing an interrupt indicating that new * entries have been put into this ring... * * Also note that SW if it wants only needs to look at the * LSB bit of this count value.
*/
/* hal_wbm_rel_desc_type * * msdu_buffer * The address points to an MSDU buffer * * msdu_link_descriptor * The address points to an Tx MSDU link descriptor * * mpdu_link_descriptor * The address points to an MPDU link descriptor * * msdu_ext_descriptor * The address points to an MSDU extension descriptor * * queue_ext_descriptor * The address points to an TQM queue extension descriptor. WBM should * treat this is the same way as a link descriptor.
*/
/* hal_wbm_rel_bm_act * * put_in_idle_list * Put the buffer or descriptor back in the idle list. In case of MSDU or * MDPU link descriptor, BM does not need to check to release any * individual MSDU buffers. * * release_msdu_list * This BM action can only be used in combination with desc_type being * msdu_link_descriptor. Field first_msdu_index points out which MSDU * pointer in the MSDU link descriptor is the first of an MPDU that is * released. BM shall release all the MSDU buffers linked to this first * MSDU buffer pointer. All related MSDU buffer pointer entries shall be * set to value 0, which represents the 'NULL' pointer. When all MSDU * buffer pointers in the MSDU link descriptor are 'NULL', the MSDU link * descriptor itself shall also be released.
*/
/* hal_wbm_release_ring * * Producer: SW/TQM/RXDMA/REO/SWITCH * Consumer: WBM/SW/FW * * HTT tx status is overlaid on wbm_release ring on 4-byte words 2, 3, 4 and 5 * for software based completions. * * buf_addr_info * Details of the physical address of the buffer or link descriptor. * * release_source_module * Indicates which module initiated the release of this buffer/descriptor. * Values are defined in enum %HAL_WBM_REL_SRC_MODULE_. * * bm_action * Field only valid when the field return_buffer_manager in * Released_buff_or_desc_addr_info indicates: * WBM_IDLE_BUF_LIST / WBM_IDLE_DESC_LIST * Values are defined in enum %HAL_WBM_REL_BM_ACT_. * * buffer_or_desc_type * Field only valid when WBM is marked as the return_buffer_manager in * the Released_Buffer_address_info. Indicates that type of buffer or * descriptor is being released. Values are in enum %HAL_WBM_REL_DESC_TYPE. * * first_msdu_index * Field only valid for the bm_action release_msdu_list. The index of the * first MSDU in an MSDU link descriptor all belonging to the same MPDU. * * tqm_release_reason * Field only valid when Release_source_module is set to release_source_TQM * Release reasons are defined in enum %HAL_WBM_TQM_REL_REASON_. * * rxdma_push_reason * reo_push_reason * Indicates why rxdma/reo pushed the frame to this ring and values are * defined in enum %HAL_REO_DEST_RING_PUSH_REASON_. * * rxdma_error_code * Field only valid when 'rxdma_push_reason' set to 'error_detected'. * Values are defined in enum %HAL_REO_ENTR_RING_RXDMA_ECODE_. * * reo_error_code * Field only valid when 'reo_push_reason' set to 'error_detected'. Values * are defined in enum %HAL_REO_DEST_RING_ERROR_CODE_. * * wbm_internal_error * Is set when WBM got a buffer pointer but the action was to push it to * the idle link descriptor ring or do link related activity OR
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