/* SPDX-License-Identifier: BSD-3-Clause-Clear */ /* * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
*/ #include"core.h"
/* ath12k_buffer_addr * * buffer_addr_31_0 * Address (lower 32 bits) of the MSDU buffer or MSDU_EXTENSION * descriptor or Link descriptor * * buffer_addr_39_32 * Address (upper 8 bits) of the MSDU buffer or MSDU_EXTENSION * descriptor or Link descriptor * * return_buffer_manager (RBM) * Consumer: WBM * Producer: SW/FW * Indicates to which buffer manager the buffer or MSDU_EXTENSION * descriptor or link descriptor that is being pointed to shall be * returned after the frame has been processed. It is used by WBM * for routing purposes. * * Values are defined in enum %HAL_RX_BUF_RBM_ * * sw_buffer_cookie * Cookie field exclusively used by SW. HW ignores the contents, * accept that it passes the programmed value on to other * descriptors together with the physical address. * * Field can be used by SW to for example associate the buffers * physical address with the virtual address. * * NOTE1: * The three most significant bits can have a special meaning * in case this struct is embedded in a TX_MPDU_DETAILS STRUCT, * and field transmit_bw_restriction is set * * In case of NON punctured transmission: * Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only * Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only * Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only * Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only * Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only * Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only * Sw_buffer_cookie[19:18] = 2'b11: reserved * * In case of punctured transmission: * Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only * Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only * Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only * Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only * Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only * Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only * Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only * Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only * Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only * Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only * Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only * Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only * Sw_buffer_cookie[19:18] = 2'b11: reserved * * Note: a punctured transmission is indicated by the presence * of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV * * Sw_buffer_cookie[20:17]: Tid: The TID field in the QoS control * field * * Sw_buffer_cookie[16]: Mpdu_qos_control_valid: This field * indicates MPDUs with a QoS control field. *
*/
/* rx_mpdu_desc * Producer: RXDMA * Consumer: REO/SW/FW * * msdu_count * The number of MSDUs within the MPDU * * fragment_flag * When set, this MPDU is a fragment and REO should forward this * fragment MPDU to the REO destination ring without any reorder * checks, pn checks or bitmap update. This implies that REO is * forwarding the pointer to the MSDU link descriptor. * * mpdu_retry_bit * The retry bit setting from the MPDU header of the received frame * * ampdu_flag * Indicates the MPDU was received as part of an A-MPDU. * * bar_frame * Indicates the received frame is a BAR frame. After processing, * this frame shall be pushed to SW or deleted. * * valid_pn * When not set, REO will not perform a PN sequence number check. * * raw_mpdu * Field only valid when first_msdu_in_mpdu_flag is set. Indicates * the contents in the MSDU buffer contains a 'RAW' MPDU. This * 'RAW' MPDU might be spread out over multiple MSDU buffers. * * more_fragment_flag * The More Fragment bit setting from the MPDU header of the * received frame * * src_info * Source (Virtual) device/interface info associated with this peer. * This field gets passed on by REO to PPE in the EDMA descriptor. * * mpdu_qos_control_valid * When set, the MPDU has a QoS control field * * tid * Field only valid when mpdu_qos_control_valid is set
*/
/* rx_msdu_desc * * first_msdu_in_mpdu * Indicates first msdu in mpdu. * * last_msdu_in_mpdu * Indicates last msdu in mpdu. This flag can be true only when * 'Msdu_continuation' set to 0. This implies that when an msdu * is spread out over multiple buffers and thus msdu_continuation * is set, only for the very last buffer of the msdu, can the * 'last_msdu_in_mpdu' be set. * * When both first_msdu_in_mpdu and last_msdu_in_mpdu are set, * the MPDU that this MSDU belongs to only contains a single MSDU. * * msdu_continuation * When set, this MSDU buffer was not able to hold the entire MSDU. * The next buffer will therefore contain additional information * related to this MSDU. * * msdu_length * Field is only valid in combination with the 'first_msdu_in_mpdu' * being set. Full MSDU length in bytes after decapsulation. This * field is still valid for MPDU frames without A-MSDU. It still * represents MSDU length after decapsulation Or in case of RAW * MPDUs, it indicates the length of the entire MPDU (without FCS * field). * * msdu_drop * Indicates that REO shall drop this MSDU and not forward it to * any other ring. * * valid_sa * Indicates OLE found a valid SA entry for this MSDU. * * valid_da * When set, OLE found a valid DA entry for this MSDU. * * da_mcbc * Field Only valid if valid_da is set. Indicates the DA address * is a Multicast or Broadcast address for this MSDU. * * l3_header_padding_msb * Passed on from 'RX_MSDU_END' TLV (only the MSB is reported as * the LSB is always zero). Number of bytes padded to make sure * that the L3 header will always start of a Dword boundary * * tcp_udp_checksum_fail * Passed on from 'RX_ATTENTION' TLV * Indicates that the computed checksum did not match the checksum * in the TCP/UDP header. * * ip_checksum_fail * Passed on from 'RX_ATTENTION' TLV * Indicates that the computed checksum did not match the checksum * in the IP header. * * from_DS * Set if the 'from DS' bit is set in the frame control. * * to_DS * Set if the 'to DS' bit is set in the frame control. * * intra_bss * This packet needs intra-BSS routing by SW as the 'vdev_id' * for the destination is the same as the 'vdev_id' that this * MSDU was got in. * * dest_chip_id * If intra_bss is set, copied by RXOLE/RXDMA from 'ADDR_SEARCH_ENTRY' * to support intra-BSS routing with multi-chip multi-link operation. * This indicates into which chip's TCL the packet should be queued. * * decap_format * Indicates the format after decapsulation:
*/
/* rx_msdu_ext_desc * * reo_destination_indication * The ID of the REO exit ring where the MSDU frame shall push * after (MPDU level) reordering has finished. * * service_code * Opaque service code between PPE and Wi-Fi * * priority_valid * * data_offset * The offset to Rx packet data within the buffer (including * Rx DMA offset programming and L3 header padding inserted * by Rx OLE). * * src_link_id * Set to the link ID of the PMAC that received the frame
*/
/* hal_reo_dest_ring * * Producer: RXDMA * Consumer: REO/SW/FW * * buf_addr_info * Details of the physical address of a buffer or MSDU * link descriptor. * * rx_mpdu_info * General information related to the MPDU that is passed * on from REO entrance ring to the REO destination ring. * * rx_msdu_info * General information related to the MSDU that is passed * on from RXDMA all the way to the REO destination ring. * * buf_va_lo * Field only valid if Reo_dest_buffer_type is set to MSDU_buf_address * Lower 32 bits of the 64-bit virtual address corresponding * to Buf_or_link_desc_addr_info * * buf_va_hi * Address (upper 32 bits) of the REO queue descriptor. * Upper 32 bits of the 64-bit virtual address corresponding * to Buf_or_link_desc_addr_info * * buffer_type * Indicates the type of address provided in the buf_addr_info. * Values are defined in enum %HAL_REO_DEST_RING_BUFFER_TYPE_. * * push_reason * Reason for pushing this frame to this exit ring. Values are * defined in enum %HAL_REO_DEST_RING_PUSH_REASON_. * * error_code * Valid only when 'push_reason' is set. All error codes are * defined in enum %HAL_REO_DEST_RING_ERROR_CODE_. * * captured_msdu_data_size * The number of following REO_DESTINATION STRUCTs that have * been replaced with msdu_data extracted from the msdu_buffer * and copied into the ring for easy FW/SW access. * * sw_exception * This field has the same setting as the SW_exception field * in the corresponding REO_entrance_ring descriptor. * When set, the REO entrance descriptor is generated by FW, * and the MPDU was processed in the following way: * - NO re-order function is needed. * - MPDU delinking is determined by the setting of Entrance * ring field: SW_excection_mpdu_delink * - Destination ring selection is based on the setting of * the Entrance ring field SW_exception_destination _ring_valid * * src_link_id * Set to the link ID of the PMAC that received the frame * * signature * Set to value 0x8 when msdu capture mode is enabled for this ring * * ring_id * The buffer pointer ring id. * 0 - Idle ring * 1 - N refers to other rings. * * looping_count * Indicates the number of times the producer of entries into * this ring has looped around the ring.
*/
/* hal_reo_to_ppe_ring * * Producer: REO * Consumer: PPE * * buf_addr_info * Details of the physical address of a buffer or MSDU * link descriptor. * * data_length * Length of valid data in bytes * * data_offset * Offset to the data from buffer pointer. Can be used to * strip header in the data for tunnel termination etc. * * pool_id * REO has global configuration register for this field. * It may have several free buffer pools, each * RX-Descriptor ring can fetch free buffer from specific * buffer pool; pool id will indicate which pool the buffer * will be released to; POOL_ID Zero returned to SW * * preheader * Disabled: 0 (Default) * Enabled: 1 * * tso_en * Disabled: 0 (Default) * Enabled: 1 * * more * More Segments followed
*/
/* hal_reo_entrance_ring * * Producer: RXDMA * Consumer: REO * * buf_addr_info * Details of the physical address of a buffer or MSDU * link descriptor. * * rx_mpdu_info * General information related to the MPDU that is passed * on from REO entrance ring to the REO destination ring. * * queue_addr_lo * Address (lower 32 bits) of the REO queue descriptor. * * queue_addr_hi * Address (upper 8 bits) of the REO queue descriptor. * * mpdu_byte_count * An approximation of the number of bytes received in this MPDU. * Used to keeps stats on the amount of data flowing * through a queue. * * reo_destination_indication * The id of the reo exit ring where the msdu frame shall push * after (MPDU level) reordering has finished. Values are defined * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_. * * frameless_bar * Indicates that this REO entrance ring struct contains BAR info * from a multi TID BAR frame. The original multi TID BAR frame * itself contained all the REO info for the first TID, but all * the subsequent TID info and their linkage to the REO descriptors * is passed down as 'frameless' BAR info. * * The only fields valid in this descriptor when this bit is set * are queue_addr_lo, queue_addr_hi, mpdu_sequence_number, * bar_frame and peer_meta_data. * * rxdma_push_reason * Reason for pushing this frame to this exit ring. Values are * defined in enum %HAL_REO_ENTR_RING_RXDMA_PUSH_REASON_. * * rxdma_error_code * Valid only when 'push_reason' is set. All error codes are * defined in enum %HAL_REO_ENTR_RING_RXDMA_ECODE_. * * mpdu_fragment_number * Field only valid when Reo_level_mpdu_frame_info. * Rx_mpdu_desc_info_details.Fragment_flag is set. * * sw_exception * When not set, REO is performing all its default MPDU processing * operations, * When set, this REO entrance descriptor is generated by FW, and * should be processed as an exception. This implies: * NO re-order function is needed. * MPDU delinking is determined by the setting of field * SW_excection_mpdu_delink * * sw_exception_mpdu_delink * Field only valid when SW_exception is set. * 1'b0: REO should NOT delink the MPDU, and thus pass this * MPDU on to the destination ring as is. This implies that * in the REO_DESTINATION_RING struct field * Buf_or_link_desc_addr_info should point to an MSDU link * descriptor * 1'b1: REO should perform the normal MPDU delink into MSDU operations. * * sw_exception_dest_ring * Field only valid when fields SW_exception and SW * exception_destination_ring_valid are set. values are defined * in %HAL_RX_REO_DEST_RING_. * * mpdu_seq_number * The field can have two different meanings based on the setting * of sub-field Reo level mpdu frame info. * Rx_mpdu_desc_info_details. BAR_frame * 'BAR_frame' is NOT set: * The MPDU sequence number of the received frame. * 'BAR_frame' is set. * The MPDU Start sequence number from the BAR frame * * phy_ppdu_id * A PPDU counter value that PHY increments for every PPDU received * * src_link_id * Set to the link ID of the PMAC that received the frame * * ring_id * The buffer pointer ring id. * 0 - Idle ring * 1 - N refers to other rings. * * looping_count * Indicates the number of times the producer of entries into * this ring has looped around the ring.
*/
/* hal_tcl_data_cmd * * buf_addr_info * Details of the physical address of a buffer or MSDU * link descriptor. * * tcl_cmd_type * used to select the type of TCL Command descriptor * * desc_type * Indicates the type of address provided in the buf_addr_info. * Values are defined in enum %HAL_REO_DEST_RING_BUFFER_TYPE_. * * bank_id * used to select one of the TCL register banks for fields removed * from 'TCL_DATA_CMD' that do not change often within one virtual * device or a set of virtual devices: * * tx_notify_frame * TCL copies this value to 'TQM_ENTRANCE_RING' field FW_tx_notify_frame. * * hdr_length_read_sel * used to select the per 'encap_type' register set for MSDU header * read length * * buffer_timestamp * buffer_timestamp_valid * Frame system entrance timestamp. It shall be filled by first * module (SW, TCL or TQM) that sees the frames first. * * cmd_num * This number can be used to match against status. * * data_length * MSDU length in case of direct descriptor. Length of link * extension descriptor in case of Link extension descriptor. * * *_checksum_en * Enable checksum replacement for ipv4, udp_over_ipv4, ipv6, * udp_over_ipv6, tcp_over_ipv4 and tcp_over_ipv6. * * to_fw * Forward packet to FW along with classification result. The * packet will not be forward to TQM when this bit is set. * 1'b0: Use classification result to forward the packet. * 1'b1: Override classification result & forward packet only to fw * * packet_offset * Packet offset from Metadata in case of direct buffer descriptor. * * hlos_tid_overwrite * * When set, TCL shall ignore the IP DSCP and VLAN PCP * fields and use HLOS_TID as the final TID. Otherwise TCL * shall consider the DSCP and PCP fields as well as HLOS_TID * and choose a final TID based on the configured priority * * flow_override_enable * TCL uses this to select the flow pointer from the peer table, * which can be overridden by SW for pre-encrypted raw WiFi packets * that cannot be parsed for UDP or for other MLO * 0 - FP_PARSE_IP: Use the flow-pointer based on parsing the IPv4 * or IPv6 header. * 1 - FP_USE_OVERRIDE: Use the who_classify_info_sel and * flow_override fields to select the flow-pointer * * who_classify_info_sel * Field only valid when flow_override_enable is set to FP_USE_OVERRIDE. * This field is used to select one of the 'WHO_CLASSIFY_INFO's in the * peer table in case more than 2 flows are mapped to a single TID. * 0: To choose Flow 0 and 1 of any TID use this value. * 1: To choose Flow 2 and 3 of any TID use this value. * 2: To choose Flow 4 and 5 of any TID use this value. * 3: To choose Flow 6 and 7 of any TID use this value. * * If who_classify_info sel is not in sync with the num_tx_classify_info * field from address search, then TCL will set 'who_classify_info_sel' * to 0 use flows 0 and 1. * * hlos_tid * HLOS MSDU priority * Field is used when HLOS_TID_overwrite is set. * * flow_override * Field only valid when flow_override_enable is set to FP_USE_OVERRIDE * TCL uses this to select the flow pointer from the peer table, * which can be overridden by SW for pre-encrypted raw WiFi packets * that cannot be parsed for UDP or for other MLO * 0 - FP_USE_NON_UDP: Use the non-UDP flow pointer (flow 0) * 1 - FP_USE_UDP: Use the UDP flow pointer (flow 1) * * pmac_id * TCL uses this PMAC_ID in address search, i.e, while * finding matching entry for the packet in AST corresponding * to given PMAC_ID * * If PMAC ID is all 1s (=> value 3), it indicates wildcard * match for any PMAC * * vdev_id * Virtual device ID to check against the address search entry to * avoid security issues from transmitting packets from an incorrect * virtual device * * search_index * The index that will be used for index based address or * flow search. The field is valid when 'search_type' is 1 or 2. * * cache_set_num * * Cache set number that should be used to cache the index * based search results, for address and flow search. This * value should be equal to LSB four bits of the hash value of * match data, in case of search index points to an entry which * may be used in content based search also. The value can be * anything when the entry pointed by search index will not be * used for content based search. * * index_loop_override * When set, address search and packet routing is forced to use * 'search_index' instead of following the register configuration * selected by Bank_id. * * ring_id * The buffer pointer ring ID. * 0 refers to the IDLE ring * 1 - N refers to other rings * * looping_count * * A count value that indicates the number of times the * producer of entries into the Ring has looped around the * ring. * * At initialization time, this value is set to 0. On the * first loop, this value is set to 1. After the max value is * reached allowed by the number of bits for this field, the * count value continues with 0 again. * * In case SW is the consumer of the ring entries, it can * use this field to figure out up to where the producer of * entries has created new entries. This eliminates the need to * check where the head pointer' of the ring is located once * the SW starts processing an interrupt indicating that new * entries have been put into this ring... * * Also note that SW if it wants only needs to look at the * LSB bit of this count value.
*/
/* hal_tcl_gse_cmd * * ctrl_buf_addr_lo, ctrl_buf_addr_hi * Address of a control buffer containing additional info needed * for this command execution. * * meta_data * Meta data to be returned in the status descriptor
*/
/* hal_ce_srng_src_desc * * buffer_addr_lo * LSB 32 bits of the 40 Bit Pointer to the source buffer * * buffer_addr_hi * MSB 8 bits of the 40 Bit Pointer to the source buffer * * toeplitz_en * Enable generation of 32-bit Toeplitz-LFSR hash for * data transfer. In case of gather field in first source * ring entry of the gather copy cycle in taken into account. * * src_swap * Treats source memory organization as big-endian. For * each dword read (4 bytes), the byte 0 is swapped with byte 3 * and byte 1 is swapped with byte 2. * In case of gather field in first source ring entry of * the gather copy cycle in taken into account. * * dest_swap * Treats destination memory organization as big-endian. * For each dword write (4 bytes), the byte 0 is swapped with * byte 3 and byte 1 is swapped with byte 2. * In case of gather field in first source ring entry of * the gather copy cycle in taken into account. * * gather * Enables gather of multiple copy engine source * descriptors to one destination. * * ce_res_0 * Reserved * * * length * Length of the buffer in units of octets of the current * descriptor * * fw_metadata * Meta data used by FW. * In case of gather field in first source ring entry of * the gather copy cycle in taken into account. * * ce_res_1 * Reserved * * ce_res_2 * Reserved * * ring_id * The buffer pointer ring ID. * 0 refers to the IDLE ring * 1 - N refers to other rings * Helps with debugging when dumping ring contents. * * looping_count * A count value that indicates the number of times the * producer of entries into the Ring has looped around the * ring. * * At initialization time, this value is set to 0. On the * first loop, this value is set to 1. After the max value is * reached allowed by the number of bits for this field, the * count value continues with 0 again. * * In case SW is the consumer of the ring entries, it can * use this field to figure out up to where the producer of * entries has created new entries. This eliminates the need to * check where the head pointer' of the ring is located once * the SW starts processing an interrupt indicating that new * entries have been put into this ring... * * Also note that SW if it wants only needs to look at the * LSB bit of this count value.
*/
/* hal_ce_srng_dest_desc * * dst_buffer_low * LSB 32 bits of the 40 Bit Pointer to the Destination * buffer * * dst_buffer_high * MSB 8 bits of the 40 Bit Pointer to the Destination * buffer * * ce_res_4 * Reserved * * ring_id * The buffer pointer ring ID. * 0 refers to the IDLE ring * 1 - N refers to other rings * Helps with debugging when dumping ring contents. * * looping_count * A count value that indicates the number of times the * producer of entries into the Ring has looped around the * ring. * * At initialization time, this value is set to 0. On the * first loop, this value is set to 1. After the max value is * reached allowed by the number of bits for this field, the * count value continues with 0 again. * * In case SW is the consumer of the ring entries, it can * use this field to figure out up to where the producer of * entries has created new entries. This eliminates the need to * check where the head pointer' of the ring is located once * the SW starts processing an interrupt indicating that new * entries have been put into this ring... * * Also note that SW if it wants only needs to look at the * LSB bit of this count value.
*/
/* hal_ce_srng_dst_status_desc * * ce_res_5 * Reserved * * toeplitz_en * * src_swap * Source memory buffer swapped * * dest_swap * Destination memory buffer swapped * * gather * Gather of multiple copy engine source descriptors to one * destination enabled * * ce_res_6 * Reserved * * length * Sum of all the Lengths of the source descriptor in the * gather chain * * toeplitz_hash_0 * 32 LS bits of 64 bit Toeplitz LFSR hash result * * toeplitz_hash_1 * 32 MS bits of 64 bit Toeplitz LFSR hash result * * fw_metadata * Meta data used by FW * In case of gather field in first source ring entry of * the gather copy cycle in taken into account. * * ce_res_7 * Reserved * * ring_id * The buffer pointer ring ID. * 0 refers to the IDLE ring * 1 - N refers to other rings * Helps with debugging when dumping ring contents. * * looping_count * A count value that indicates the number of times the * producer of entries into the Ring has looped around the * ring. * * At initialization time, this value is set to 0. On the * first loop, this value is set to 1. After the max value is * reached allowed by the number of bits for this field, the * count value continues with 0 again. * * In case SW is the consumer of the ring entries, it can * use this field to figure out up to where the producer of * entries has created new entries. This eliminates the need to * check where the head pointer' of the ring is located once * the SW starts processing an interrupt indicating that new * entries have been put into this ring... * * Also note that SW if it wants only needs to look at the * LSB bit of this count value.
*/
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