// SPDX-License-Identifier: GPL-2.0 /* * Allwinner H6 SoC pinctrl driver. * * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> #include <linux/module.h>#include <linux/platform_device.h>#include <linux/of.h>#include <linux/pinctrl/pinctrl.h>#include "pinctrl-sunxi.h" static const struct sunxi_desc_pin h6_pins[] = {"emac" )), /* ERXD1 */ "emac" )), /* ERXD0 */ "emac" )), /* ECRS_DV */ "emac" )), /* ERXERR */ "emac" )), /* ETXD1 */ "emac" )), /* ETXD0 */ "emac" )), /* ETXCK */ "emac" )), /* ETXEN */ "emac" )), /* EMDC */ "emac" )), /* EMDIO */ /* Hole */ "ccir" ), /* CLK */ "ccir" ), /* DE */ "ccir" ), /* HSYNC */ "ccir" ), /* VSYNC */ "ccir" ), /* DO0 */ "ccir" ), /* DO1 */ "ccir" ), /* DO2 */ "ccir" ), /* DO3 */ "ccir" ), /* DO4 */ "ccir" ), /* DO5 */ "ccir" ), /* DO6 */ "ccir" ), /* DO7 */ "i2s3" ), /* SYNC */ "h_i2s3" ), /* SYNC */ "i2s3" ), /* CLK */ "h_i2s3" ), /* CLK */ "i2s3" ), /* DOUT */ "h_i2s3" ), /* DOUT */ "i2s3" ), /* DIN */ "h_i2s3" ), /* DIN */ "i2s3" ), /* MCLK */ "h_i2s3" ), /* MCLK */ "i2c3" ), /* SCK */ "i2c3" ), /* SDA */ "pwm1" ),"gpio_in" ),/* Hole */ "gpio_in" ),"gpio_out" ),"nand0" ), /* WE */ "spi0" )), /* CLK */ "gpio_in" ),"gpio_out" ),"nand0" ), /* ALE */ "mmc2" )), /* DS */ "gpio_in" ),"gpio_out" ),"nand0" ), /* CLE */ "spi0" )), /* MOSI */ "gpio_in" ),"gpio_out" ),"nand0" ), /* CE0 */ "spi0" )), /* MISO */ "gpio_in" ),"gpio_out" ),"nand0" ), /* RE */ "mmc2" )), /* CLK */ "gpio_in" ),"gpio_out" ),"nand0" ), /* RB0 */ "mmc2" ), /* CMD */ "spi0" )), /* CS */ "gpio_in" ),"gpio_out" ),"nand0" ), /* DQ0 */ "mmc2" ), /* D0 */ "spi0" )), /* HOLD */ "gpio_in" ),"gpio_out" ),"nand0" ), /* DQ1 */ "mmc2" ), /* D1 */ "spi0" )), /* WP */ "gpio_in" ),"gpio_out" ),"nand0" ), /* DQ2 */ "mmc2" )), /* D2 */ "gpio_in" ),"gpio_out" ),"nand0" ), /* DQ3 */ "mmc2" )), /* D3 */ "gpio_in" ),"gpio_out" ),"nand0" ), /* DQ4 */ "mmc2" )), /* D4 */ "gpio_in" ),"gpio_out" ),"nand0" ), /* DQ5 */ "mmc2" )), /* D5 */ "gpio_in" ),"gpio_out" ),"nand0" ), /* DQ6 */ "mmc2" )), /* D6 */ "gpio_in" ),"gpio_out" ),"nand0" ), /* DQ7 */ "mmc2" )), /* D7 */ "gpio_in" ),"gpio_out" ),"nand0" ), /* DQS */ "mmc2" )), /* RST */ "gpio_in" ),"gpio_out" ),"nand0" )), /* CE1 */ "gpio_in" ),"gpio_out" ),"nand0" )), /* RB1 */ /* Hole */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D2 */ "ts0" ), /* CLK */ "csi" ), /* PCLK */ "emac" )), /* ERXD3 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D3 */ "ts0" ), /* ERR */ "csi" ), /* MCLK */ "emac" )), /* ERXD2 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D4 */ "ts0" ), /* SYNC */ "csi" ), /* HSYNC */ "emac" )), /* ERXD1 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D5 */ "ts0" ), /* DVLD */ "csi" ), /* VSYNC */ "emac" )), /* ERXD0 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D6 */ "ts0" ), /* D0 */ "csi" ), /* D0 */ "emac" )), /* ERXCK */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D7 */ "ts0" ), /* D1 */ "csi" ), /* D1 */ "emac" )), /* ERXCTL */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D10 */ "ts0" ), /* D2 */ "csi" ), /* D2 */ "emac" )), /* ENULL */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D11 */ "ts0" ), /* D3 */ "csi" ), /* D3 */ "emac" )), /* ETXD3 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D12 */ "ts0" ), /* D4 */ "csi" ), /* D4 */ "emac" )), /* ETXD2 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D13 */ "ts0" ), /* D5 */ "csi" ), /* D5 */ "emac" )), /* ETXD1 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D14 */ "ts0" ), /* D6 */ "csi" ), /* D6 */ "emac" )), /* ETXD0 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D15 */ "ts0" ), /* D7 */ "csi" ), /* D7 */ "emac" )), /* ETXCK */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D18 */ "ts1" ), /* CLK */ "csi" ), /* SCK */ "emac" )), /* ETXCTL */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D19 */ "ts1" ), /* ERR */ "csi" ), /* SDA */ "emac" )), /* ECLKIN */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D20 */ "ts1" ), /* SYNC */ "dmic" ), /* CLK */ "csi" )), /* D8 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D21 */ "ts1" ), /* DVLD */ "dmic" ), /* DATA0 */ "csi" )), /* D9 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D22 */ "ts1" ), /* D0 */ "dmic" )), /* DATA1 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* D23 */ "ts2" ), /* CLK */ "dmic" )), /* DATA2 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* CLK */ "ts2" ), /* ERR */ "dmic" )), /* DATA3 */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* DE */ "ts2" ), /* SYNC */ "uart2" ), /* TX */ "emac" )), /* EMDC */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* HSYNC */ "ts2" ), /* DVLD */ "uart2" ), /* RX */ "emac" )), /* EMDIO */ "gpio_in" ),"gpio_out" ),"lcd0" ), /* VSYNC */ "ts2" ), /* D0 */ "uart2" )), /* RTS */ "gpio_in" ),"gpio_out" ),"pwm" ), /* PWM0 */ "ts3" ), /* CLK */ "uart2" )), /* CTS */ "gpio_in" ),"gpio_out" ),"i2c2" ), /* SCK */ "ts3" ), /* ERR */ "uart3" ), /* TX */ "jtag" )), /* MS */ "gpio_in" ),"gpio_out" ),"i2c2" ), /* SDA */ "ts3" ), /* SYNC */ "uart3" ), /* RX */ "jtag" )), /* CK */ "gpio_in" ),"gpio_out" ),"i2c0" ), /* SCK */ "ts3" ), /* DVLD */ "uart3" ), /* RTS */ "jtag" )), /* DO */ "gpio_in" ),"gpio_out" ),"i2c0" ), /* SDA */ "ts3" ), /* D0 */ "uart3" ), /* CTS */ "jtag" )), /* DI */ /* Hole */ "gpio_in" ),"gpio_out" ),"mmc0" ), /* D1 */ "jtag" ), /* MS */ /* PF_EINT0 */ "gpio_in" ),"gpio_out" ),"mmc0" ), /* D0 */ "jtag" ), /* DI */ /* PF_EINT1 */ "gpio_in" ),"gpio_out" ),"mmc0" ), /* CLK */ "uart0" ), /* TX */ /* PF_EINT2 */ "gpio_in" ),"gpio_out" ),"mmc0" ), /* CMD */ "jtag" ), /* DO */ /* PF_EINT3 */ "gpio_in" ),"gpio_out" ),"mmc0" ), /* D3 */ "uart0" ), /* RX */ /* PF_EINT4 */ "gpio_in" ),"gpio_out" ),"mmc0" ), /* D2 */ "jtag" ), /* CK */ /* PF_EINT5 */ "gpio_in" ),"gpio_out" ),/* PF_EINT6 */ /* Hole */ "gpio_in" ),"gpio_out" ),"mmc1" ), /* CLK */ /* PG_EINT0 */ "gpio_in" ),"gpio_out" ),"mmc1" ), /* CMD */ /* PG_EINT1 */ "gpio_in" ),"gpio_out" ),"mmc1" ), /* D0 */ /* PG_EINT2 */ "gpio_in" ),"gpio_out" ),"mmc1" ), /* D1 */ /* PG_EINT3 */ "gpio_in" ),"gpio_out" ),"mmc1" ), /* D2 */ /* PG_EINT4 */ "gpio_in" ),"gpio_out" ),"mmc1" ), /* D3 */ /* PG_EINT5 */ "gpio_in" ),"gpio_out" ),"uart1" ), /* TX */ /* PG_EINT6 */ "gpio_in" ),"gpio_out" ),"uart1" ), /* RX */ /* PG_EINT7 */ "gpio_in" ),"gpio_out" ),"uart1" ), /* RTS */ "sim0" ), /* VPPEN */ /* PG_EINT8 */ "gpio_in" ),"gpio_out" ),"uart1" ), /* CTS */ "sim0" ), /* VPPPP */ /* PG_EINT9 */ "gpio_in" ),"gpio_out" ),"i2s2" ), /* SYNC */ "h_i2s2" ), /* SYNC */ "sim0" ), /* PWREN */ /* PG_EINT10 */ "gpio_in" ),"gpio_out" ),"i2s2" ), /* CLK */ "h_i2s2" ), /* CLK */ "sim0" ), /* CLK */ /* PG_EINT11 */ "gpio_in" ),"gpio_out" ),"i2s2" ), /* DOUT */ "h_i2s2" ), /* DOUT */ "sim0" ), /* DATA */ /* PG_EINT12 */ "gpio_in" ),"gpio_out" ),"i2s2" ), /* DIN */ "h_i2s2" ), /* DIN */ "sim0" ), /* RST */ /* PG_EINT13 */ "gpio_in" ),"gpio_out" ),"i2s2" ), /* MCLK */ "h_i2s2" ), /* MCLK */ "sim0" ), /* DET */ /* PG_EINT14 */ /* Hole */ "gpio_in" ),"gpio_out" ),"uart0" ), /* TX */ "i2s0" ), /* SYNC */ "h_i2s0" ), /* SYNC */ "sim1" ), /* VPPEN */ /* PH_EINT0 */ "gpio_in" ),"gpio_out" ),"uart0" ), /* RX */ "i2s0" ), /* CLK */ "h_i2s0" ), /* CLK */ "sim1" ), /* VPPPP */ /* PH_EINT1 */ "gpio_in" ),"gpio_out" ),"ir_tx" ),"i2s0" ), /* DOUT */ "h_i2s0" ), /* DOUT */ "sim1" ), /* PWREN */ /* PH_EINT2 */ "gpio_in" ),"gpio_out" ),"spi1" ), /* CS */ "i2s0" ), /* DIN */ "h_i2s0" ), /* DIN */ "sim1" ), /* CLK */ /* PH_EINT3 */ "gpio_in" ),"gpio_out" ),"spi1" ), /* CLK */ "i2s0" ), /* MCLK */ "h_i2s0" ), /* MCLK */ "sim1" ), /* DATA */ /* PH_EINT4 */ "gpio_in" ),"gpio_out" ),"spi1" ), /* MOSI */ "spdif" ), /* MCLK */ "i2c1" ), /* SCK */ "sim1" ), /* RST */ /* PH_EINT5 */ "gpio_in" ),"gpio_out" ),"spi1" ), /* MISO */ "spdif" ), /* IN */ "i2c1" ), /* SDA */ "sim1" ), /* DET */ /* PH_EINT6 */ "gpio_in" ),"gpio_out" ),"spdif" ), /* OUT */ /* PH_EINT7 */ "gpio_in" ),"gpio_out" ),"hdmi" ), /* HSCL */ /* PH_EINT8 */ "gpio_in" ),"gpio_out" ),"hdmi" ), /* HSDA */ /* PH_EINT9 */ "gpio_in" ),"gpio_out" ),"hdmi" ), /* HCEC */ /* PH_EINT10 */ static const unsigned int h6_irq_bank_map[] = { 1, 5, 6, 7 };static const struct sunxi_pinctrl_desc h6_pinctrl_data = {true ,static int h6_pinctrl_probe(struct platform_device *pdev)return sunxi_pinctrl_init(pdev,static const struct of_device_id h6_pinctrl_match[] = {"allwinner,sun50i-h6-pinctrl" , },static struct platform_driver h6_pinctrl_driver = {"sun50i-h6-pinctrl" ,
Messung V0.5 C=82 H=98 G=90
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(vorverarbeitet)
¤ *© Formatika GbR, Deutschland
