/* * This file is part of the Chelsio FCoE driver for Linux . * * Copyright ( c ) 2008 - 2012 Chelsio Communications , Inc . All rights reserved . * * This software is available to you under a choice of one of two * licenses . You may choose to be licensed under the terms of the GNU * General Public License ( GPL ) Version 2 , available from the file * COPYING in the main directory of this source tree , or the * OpenIB . org BSD license below : * * Redistribution and use in source and binary forms , with or * without modification , are permitted provided that the following * conditions are met : * * - Redistributions of source code must retain the above * copyright notice , this list of conditions and the following * disclaimer . * * - Redistributions in binary form must reproduce the above * copyright notice , this list of conditions and the following * disclaimer in the documentation and / or other materials * provided with the distribution . * * THE SOFTWARE IS PROVIDED " AS IS " , WITHOUT WARRANTY OF ANY KIND , * EXPRESS OR IMPLIED , INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY , FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT . IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM , DAMAGES OR OTHER LIABILITY , WHETHER IN AN * ACTION OF CONTRACT , TORT OR OTHERWISE , ARISING FROM , OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE . #include <linux/pci.h>#include <linux/pci_regs.h>#include <linux/firmware.h>#include <linux/stddef.h>#include <linux/delay.h>#include <linux/string.h>#include <linux/compiler.h>#include <linux/jiffies.h>#include <linux/kernel.h>#include <linux/log2.h>#include "csio_hw.h" #include "csio_lnode.h" #include "csio_rnode.h" int csio_dbg_level = 0 xFEFF;unsigned int csio_port_mask = 0 xf;/* Default FW event queue entries. */ static uint32_t csio_evtq_sz = CSIO_EVTQ_SIZE;/* Default MSI param level */ int csio_msi = 2 ;/* FCoE function instances */ static int dev_num;/* FCoE Adapter types & its description */ static const struct csio_adap_desc csio_t5_fcoe_adapters[] = {"T580-Dbg 10G" , "Chelsio T580-Dbg 10G [FCoE]" },"T520-CR 10G" , "Chelsio T520-CR 10G [FCoE]" },"T522-CR 10G/1G" , "Chelsio T522-CR 10G/1G [FCoE]" },"T540-CR 10G" , "Chelsio T540-CR 10G [FCoE]" },"T520-BCH 10G" , "Chelsio T520-BCH 10G [FCoE]" },"T540-BCH 10G" , "Chelsio T540-BCH 10G [FCoE]" },"T540-CH 10G" , "Chelsio T540-CH 10G [FCoE]" },"T520-SO 10G" , "Chelsio T520-SO 10G [FCoE]" },"T520-CX4 10G" , "Chelsio T520-CX4 10G [FCoE]" },"T520-BT 10G" , "Chelsio T520-BT 10G [FCoE]" },"T504-BT 1G" , "Chelsio T504-BT 1G [FCoE]" },"B520-SR 10G" , "Chelsio B520-SR 10G [FCoE]" },"B504-BT 1G" , "Chelsio B504-BT 1G [FCoE]" },"T580-CR 10G" , "Chelsio T580-CR 10G [FCoE]" },"T540-LP-CR 10G" , "Chelsio T540-LP-CR 10G [FCoE]" },"AMSTERDAM 10G" , "Chelsio AMSTERDAM 10G [FCoE]" },"T580-LP-CR 40G" , "Chelsio T580-LP-CR 40G [FCoE]" },"T520-LL-CR 10G" , "Chelsio T520-LL-CR 10G [FCoE]" },"T560-CR 40G" , "Chelsio T560-CR 40G [FCoE]" },"T580-CR 40G" , "Chelsio T580-CR 40G [FCoE]" },"T580-SO 40G" , "Chelsio T580-SO 40G [FCoE]" },"T502-BT 1G" , "Chelsio T502-BT 1G [FCoE]" }static void csio_mgmtm_cleanup(struct csio_mgmtm *);static void csio_hw_mbm_cleanup(struct csio_hw *);/* State machine forward declarations */ static void csio_hws_uninit(struct csio_hw *, enum csio_hw_ev);static void csio_hws_configuring(struct csio_hw *, enum csio_hw_ev);static void csio_hws_initializing(struct csio_hw *, enum csio_hw_ev);static void csio_hws_ready(struct csio_hw *, enum csio_hw_ev);static void csio_hws_quiescing(struct csio_hw *, enum csio_hw_ev);static void csio_hws_quiesced(struct csio_hw *, enum csio_hw_ev);static void csio_hws_resetting(struct csio_hw *, enum csio_hw_ev);static void csio_hws_removing(struct csio_hw *, enum csio_hw_ev);static void csio_hws_pcierr(struct csio_hw *, enum csio_hw_ev);static void csio_hw_initialize(struct csio_hw *hw);static void csio_evtq_stop(struct csio_hw *hw);static void csio_evtq_start(struct csio_hw *hw);int csio_is_hw_ready(struct csio_hw *hw)return csio_match_state(hw, csio_hws_ready);int csio_is_hw_removing(struct csio_hw *hw)return csio_match_state(hw, csio_hws_removing);/* * csio_hw_wait_op_done_val - wait until an operation is completed * @ hw : the HW module * @ reg : the register to check for completion * @ mask : a single - bit field within @ reg that indicates completion * @ polarity : the value of the field when the operation is completed * @ attempts : number of check iterations * @ delay : delay in usecs between iterations * @ valp : where to store the value of the register at completion time * * Wait until an operation is completed by checking a bit in a register * up to @ attempts times . If @ valp is not NULL the value of the register * at the time it indicated completion is stored there . Returns 0 if the * operation completes and - EAGAIN otherwise . int struct csio_hw *hw, int reg, uint32_t mask,int polarity, int attempts, int delay, uint32_t *valp)while (1 ) {if (!!(val & mask) == polarity) {if (valp)return 0 ;if (--attempts == 0 )return -EAGAIN;if (delay)/* * csio_hw_tp_wr_bits_indirect - set / clear bits in an indirect TP register * @ hw : the adapter * @ addr : the indirect TP register address * @ mask : specifies the field within the register to modify * @ val : new value for the field * * Sets a field of an indirect TP register to the given value . void struct csio_hw *hw, unsigned int addr,unsigned int mask, unsigned int val)void struct csio_hw *hw, uint32_t reg, uint32_t mask,/* Flush */ static int struct csio_hw *hw, int mtype, u32 addr, u32 len, u32 *buf)return hw->chip_ops->chip_memory_rw(hw, MEMWIN_CSIOSTOR, mtype,0 );/* * EEPROM reads take a few tens of us while writes can take a bit over 5 ms . #define EEPROM_MAX_RD_POLL 40 #define EEPROM_MAX_WR_POLL 6 #define EEPROM_STAT_ADDR 0 x7bfc#define VPD_BASE 0 x400#define VPD_BASE_OLD 0 #define VPD_LEN 1024 #define VPD_INFO_FLD_HDR_SIZE 3 /* * csio_hw_seeprom_read - read a serial EEPROM location * @ hw : hw to read * @ addr : EEPROM virtual address * @ data : where to store the read data * * Read a 32 - bit word from a location in serial EEPROM using the card ' s PCI * VPD capability . Note that this function must be called with a virtual * address . static int struct csio_hw *hw, uint32_t addr, uint32_t *data)0 ;int attempts = EEPROM_MAX_RD_POLL;if (addr >= EEPROMVSIZE || (addr & 3 ))return -EINVAL;do {10 );while (!(val & PCI_VPD_ADDR_F) && --attempts);if (!(val & PCI_VPD_ADDR_F)) {"reading EEPROM address 0x%x failed\n" , addr);return -EINVAL;return 0 ;/* * Partial EEPROM Vital Product Data structure . Includes only the ID and * VPD - R sections . struct t4_vpd_hdr {2 ];2 ];/* * csio_hw_get_vpd_keyword_val - Locates an information field keyword in * the VPD * @ v : Pointer to buffered vpd data structure * @ kw : The keyword to search for * * Returns the value of the information field keyword or * - EINVAL otherwise . static int const struct t4_vpd_hdr *v, const char *kw)const uint8_t *buf = &v->id_tag;const uint8_t *vpdr_len = &v->vpdr_tag;sizeof (struct t4_vpd_hdr);1 ] + ((uint16_t)vpdr_len[2 ] << 8 );if (len + sizeof (struct t4_vpd_hdr) > VPD_LEN)return -EINVAL;for (i = offset; (i + VPD_INFO_FLD_HDR_SIZE) <= (offset + len);) {if (memcmp(buf + i , kw, 2 ) == 0 ) {return i;2 ];return -EINVAL;static int struct pci_dev *pdev, int cap, int *pos)if (*pos)return 0 ;return -1 ;/* * csio_hw_get_vpd_params - read VPD parameters from VPD EEPROM * @ hw : HW module * @ p : where to store the parameters * * Reads card parameters stored in VPD EEPROM . static int struct csio_hw *hw, struct csio_vpd *p)int i, ret, ec, sn, addr;const struct t4_vpd_hdr *v;/* To get around compilation warning from strstrip */ char __always_unused *s;if (csio_is_valid_vpd(hw))return 0 ;if (ret)return -EINVAL;if (vpd == NULL)return -ENOMEM;/* * Card information normally starts at VPD_BASE but early cards had * it at 0 . 0 x82 ? VPD_BASE : VPD_BASE_OLD;for (i = 0 ; i < VPD_LEN; i += 4 ) {if (ret) {return ret;/* Reset the VPD flag! */ const struct t4_vpd_hdr *)vpd;#define FIND_VPD_KW(var, name) do { \if (var < 0 ) { \"missing VPD keyword " name "\n" ); \return -EINVAL; \while (0 )"RV" );for (csum = 0 ; i >= 0 ; i--)if (csum) {"corrupted VPD EEPROM, actual csum %u\n" , csum);return -EINVAL;"EC" );"SN" );#undef FIND_VPD_KW2 ];return 0 ;/* * csio_hw_sf1_read - read data from the serial flash * @ hw : the HW module * @ byte_cnt : number of bytes to read * @ cont : whether another operation will be chained * @ lock : whether to lock SF for PL access only * @ valp : where to store the read data * * Reads up to 4 bytes of data from the serial flash . The location of * the read needs to be specified prior to calling this by issuing the * appropriate commands to the serial flash . static int struct csio_hw *hw, uint32_t byte_cnt, int32_t cont,int ret;if (!byte_cnt || byte_cnt > 4 )return -EINVAL;if (csio_rd_reg32(hw, SF_OP_A) & SF_BUSY_F)return -EBUSY;1 ), SF_OP_A);0 , SF_ATTEMPTS,10 , NULL);if (!ret)return ret;/* * csio_hw_sf1_write - write data to the serial flash * @ hw : the HW module * @ byte_cnt : number of bytes to write * @ cont : whether another operation will be chained * @ lock : whether to lock SF for PL access only * @ val : value to write * * Writes up to 4 bytes of data to the serial flash . The location of * the write needs to be specified prior to calling this by issuing the * appropriate commands to the serial flash . static int struct csio_hw *hw, uint32_t byte_cnt, uint32_t cont,if (!byte_cnt || byte_cnt > 4 )return -EINVAL;if (csio_rd_reg32(hw, SF_OP_A) & SF_BUSY_F)return -EBUSY;1 ) |1 ) | SF_LOCK_V(lock), SF_OP_A);return csio_hw_wait_op_done_val(hw, SF_OP_A, SF_BUSY_F, 0 , SF_ATTEMPTS,10 , NULL);/* * csio_hw_flash_wait_op - wait for a flash operation to complete * @ hw : the HW module * @ attempts : max number of polls of the status register * @ delay : delay between polls in ms * * Wait for a flash operation to complete by polling the status register . static int struct csio_hw *hw, int32_t attempts, int32_t delay)int ret;while (1 ) {1 , 1 , 1 , SF_RD_STATUS);if (ret != 0 )return ret;1 , 0 , 1 , &status);if (ret != 0 )return ret;if (!(status & 1 ))return 0 ;if (--attempts == 0 )return -EAGAIN;if (delay)/* * csio_hw_read_flash - read words from serial flash * @ hw : the HW module * @ addr : the start address for the read * @ nwords : how many 32 - bit words to read * @ data : where to store the read data * @ byte_oriented : whether to store data as bytes or as words * * Read the specified number of 32 - bit words from the serial flash . * If @ byte_oriented is set the read data is stored as a byte array * ( i . e . , big - endian ) , otherwise as 32 - bit words in the platform ' s * natural endianess . static int struct csio_hw *hw, uint32_t addr, uint32_t nwords,int ret;if (addr + nwords * sizeof (uint32_t) > hw->params.sf_size || (addr & 3 ))return -EINVAL;4 , 1 , 0 , addr);if (ret != 0 )return ret;1 , 1 , 0 , data);if (ret != 0 )return ret;for ( ; nwords; nwords--, data++) {4 , nwords > 1 , nwords == 1 , data);if (nwords == 1 )0 , SF_OP_A); /* unlock SF */ if (ret)return ret;if (byte_oriented)return 0 ;/* * csio_hw_write_flash - write up to a page of data to the serial flash * @ hw : the hw * @ addr : the start address to write * @ n : length of data to write in bytes * @ data : the data to write * * Writes up to a page of data ( 256 bytes ) to the serial flash starting * at the given address . All the data must be written to the same page . static int struct csio_hw *hw, uint32_t addr,const uint8_t *data)int ret = -EINVAL;64 ];0 xff;if (addr >= hw->params.sf_size || offset + n > SF_PAGE_SIZE)return -EINVAL;1 , 0 , 1 , SF_WR_ENABLE);if (ret != 0 )goto unlock;4 , 1 , 1 , val);if (ret != 0 )goto unlock;for (left = n; left; left -= c) {4 U);for (val = 0 , i = 0 ; i < c; ++i)8 ) + *data++;1 , val);if (ret)goto unlock;8 , 1 );if (ret)goto unlock;0 , SF_OP_A); /* unlock SF */ /* Read the page to verify the write succeeded */ 0 xff, ARRAY_SIZE(buf), buf, 1 );if (ret)return ret;if (memcmp(data - n, (uint8_t *)buf + offset, n)) {"failed to correctly write the flash page at %#x\n" ,return -EINVAL;return 0 ;0 , SF_OP_A); /* unlock SF */ return ret;/* * csio_hw_flash_erase_sectors - erase a range of flash sectors * @ hw : the HW module * @ start : the first sector to erase * @ end : the last sector to erase * * Erases the sectors in the given inclusive range . static int struct csio_hw *hw, int32_t start, int32_t end)int ret = 0 ;while (start <= end) {1 , 0 , 1 , SF_WR_ENABLE);if (ret != 0 )goto out;4 , 0 , 1 ,8 ));if (ret != 0 )goto out;14 , 500 );if (ret != 0 )goto out;if (ret)"erase of flash sector %d failed, error %d\n" ,0 , SF_OP_A); /* unlock SF */ return 0 ;static void struct csio_hw *hw, char *str)"%s: %u.%u.%u.%u\n" , str,/* * csio_hw_get_fw_version - read the firmware version * @ hw : HW module * @ vers : where to place the version * * Reads the FW version from flash . static int struct csio_hw *hw, uint32_t *vers)return csio_hw_read_flash(hw, FLASH_FW_START +struct fw_hdr, fw_ver), 1 ,0 );/* * csio_hw_get_tp_version - read the TP microcode version * @ hw : HW module * @ vers : where to place the version * * Reads the TP microcode version from flash . static int struct csio_hw *hw, u32 *vers)return csio_hw_read_flash(hw, FLASH_FW_START +struct fw_hdr, tp_microcode_ver), 1 ,0 );/* * csio_hw_fw_dload - download firmware . * @ hw : HW module * @ fw_data : firmware image to write . * @ size : image size * * Write the supplied firmware image to the card ' s serial flash . static int struct csio_hw *hw, uint8_t *fw_data, uint32_t size)int ret;const __be32 *p = (const __be32 *)fw_data;struct fw_hdr *hdr = (struct fw_hdr *)fw_data;if ((!hw->params.sf_size) || (!hw->params.sf_nsec)) {"Serial Flash data invalid\n" );return -EINVAL;if (!size) {"FW image has no data\n" );return -EINVAL;if (size & 511 ) {"FW image size not multiple of 512 bytes\n" );return -EINVAL;if (ntohs(hdr->len512) * 512 != size) {"FW image size differs from size in FW header\n" );return -EINVAL;if (size > FLASH_FW_MAX_SIZE) {"FW image too large, max is %u bytes\n" ,return -EINVAL;for (csum = 0 , i = 0 ; i < size / sizeof (csum); i++)if (csum != 0 xffffffff) {"corrupted firmware image, checksum %#x\n" , csum);return -EINVAL;/* # of sectors spanned */ "Erasing sectors... start:%d end:%d\n" ,1 );1 );if (ret) {"Flash Erase failed\n" );goto out;/* * We write the correct version at the end so the driver can see a bad * version if the FW write fails . Start by writing a copy of the * first page with a bad version . struct fw_hdr *)first_page)->fw_ver = htonl(0 xffffffff);if (ret)goto out;"Writing Flash .. start:%d end:%d\n" ,for (size -= SF_PAGE_SIZE; size; size -= SF_PAGE_SIZE) {if (ret)goto out;struct fw_hdr, fw_ver),sizeof (hdr->fw_ver),const uint8_t *)&hdr->fw_ver);if (ret)"firmware download failed, error %d\n" , ret);return ret;static int struct csio_hw *hw)/* Table for non-Numonix supported flash parts. Numonix parts are left * to the preexisting code . All flash parts have 64 KB sectors . static struct flash_desc {0 x150201, 4 << 20 }, /* Spansion 4MB S25FL032P */ 0 ;0 ;int ret;1 , 1 , 0 , SF_RD_ID);if (!ret)3 , 0 , 1 , &flashid);0 , SF_OP_A); /* unlock SF */ if (ret)return ret;/* Check to see if it's one of our non-standard supported Flash parts. for (part = 0 ; part < ARRAY_SIZE(supported_flash); part++)if (supported_flash[part].vendor_and_model_id == flashid) {goto found;/* Decode Flash part size. The code below looks repetitive with * common encodings , but that ' s not guaranteed in the JEDEC * specification for the Read JEDEC ID command . The only thing that * we ' re guaranteed by the JEDEC specification is where the * Manufacturer ID is in the returned result . After that each * Manufacturer ~ could ~ encode things completely differently . * Note , all Flash parts must have 64 KB sectors . 0 xff;switch (manufacturer) {case 0 x20: { /* Micron/Numonix */ /* This Density -> Size decoding table is taken from Micron * Data Sheets . 16 ) & 0 xff;switch (density) {case 0 x14 ... 0 x19: /* 1MB - 32MB */ 1 << density;break ;case 0 x20: /* 64MB */ 1 << 26 ;break ;case 0 x21: /* 128MB */ 1 << 27 ;break ;case 0 x22: /* 256MB */ 1 << 28 ;break ;case 0 x9d: { /* ISSI -- Integrated Silicon Solution, Inc. */ /* This Density -> Size decoding table is taken from ISSI * Data Sheets . 16 ) & 0 xff;switch (density) {case 0 x16: /* 32 MB */ 1 << 25 ;break ;case 0 x17: /* 64MB */ 1 << 26 ;break ;case 0 xc2: /* Macronix */ case 0 xef: /* Winbond */ { /* This Density -> Size decoding table is taken from * Macronix and Winbond Data Sheets . 16 ) & 0 xff;switch (density) {case 0 x17: /* 8MB */ case 0 x18: /* 16MB */ 1 << density;/* If we didn't recognize the FLASH part, that's no real issue: the * Hardware / Software contract says that Hardware will _ * ALWAYS * _ * use a FLASH part which is at least 4 MB in size and has 64 KB * sectors . The unrecognized FLASH part is likely to be much larger * than 4 MB , but that ' s all we really need . if (size == 0 ) {"Unknown Flash Part, ID = %#x, assuming 4MB\n" ,1 << 22 ;/* Store decoded Flash size */ if (hw->params.sf_size < FLASH_MIN_SIZE)"WARNING: Flash Part ID %#x, size %#x < %#x\n" ,return 0 ;/*****************************************************************************/ /* HW State machine assists */ /*****************************************************************************/ static int struct csio_hw *hw)int cnt = 6 ;int src_pf;while (((reg = csio_rd_reg32(hw, PL_WHOAMI_A)) == 0 xFFFFFFFF) &&0 ))100 );if (csio_is_t5(hw->pdev->device & CSIO_HW_CHIP_MASK))else if ((cnt == 0 ) && (((int32_t)(src_pf) < 0 ) ||"PL_WHOAMI returned 0x%x, cnt:%d\n" , reg, cnt);return -EIO;return 0 ;/* * csio_do_hello - Perform the HELLO FW Mailbox command and process response . * @ hw : HW module * @ state : Device state * * FW_HELLO_CMD has to be polled for completion . static int struct csio_hw *hw, enum csio_dev_state *state)struct csio_mb *mbp;int rv = 0 ;enum fw_retval retval;char state_str[16 ];int retries = FW_CMD_HELLO_RETRIES;0 , sizeof (state_str));if (!mbp) {goto out;if (rv) {"failed to issue HELLO cmd. ret:%d.\n" , rv);goto out_free_mb;if (retval != FW_SUCCESS) {"HELLO cmd failed with ret: %d\n" , retval);goto out_free_mb;/* Firmware has designated us to be master */ if (hw->pfn == mpfn) {else if (*state == CSIO_DEV_STATE_UNINIT) {/* * If we ' re not the Master PF then we need to wait around for * the Master PF Driver to finish setting up the adapter . * * Note that we also do this wait if we ' re a non - Master - capable * PF and there is no current Master PF ; a Master PF may show up * momentarily and we wouldn ' t want to fail pointlessly . ( This * can happen when an OS loads lots of different drivers rapidly * at the same time ) . In this case , the Master PF returned by * the firmware will be PCIE_FW_MASTER_MASK so the test below * will work . . . int waiting = FW_CMD_HELLO_TIMEOUT;/* * Wait for the firmware to either indicate an error or * initialized state . If we see either of these we bail out * and report the issue to the caller . If we exhaust the * " hello timeout " and we haven ' t exhausted our retries , try * again . Otherwise bail with a timeout error . for (;;) {50 );50 ;/* * If neither Error nor Initialized are indicated * by the firmware keep waiting till we exhaust our * timeout . . . and then retry if we haven ' t exhausted * our retries . . . if (!(pcie_fw & (PCIE_FW_ERR_F|PCIE_FW_INIT_F))) {if (waiting <= 0 ) {if (retries-- > 0 )goto retry;break ;continue ;/* * We either have an Error or Initialized condition * report errors preferentially . if (state) {if (pcie_fw & PCIE_FW_ERR_F) {else if (pcie_fw & PCIE_FW_INIT_F)/* * If we arrived before a Master PF was selected and * there ' s not a valid Master PF , grab its identity * for our caller . if (mpfn == PCIE_FW_MASTER_M &&break ;switch (*state) {case CSIO_DEV_STATE_UNINIT:"Initializing" );break ;case CSIO_DEV_STATE_INIT:"Initialized" );break ;case CSIO_DEV_STATE_ERR:"Error" );break ;default :"Unknown" );break ;if (hw->pfn == mpfn)"PF: %d, Coming up as MASTER, HW state: %s\n" ,else "PF: %d, Coming up as SLAVE, Master PF: %d, HW state: %s\n" ,return rv;/* * csio_do_bye - Perform the BYE FW Mailbox command and process response . * @ hw : HW module * static int struct csio_hw *hw)struct csio_mb *mbp;enum fw_retval retval;if (!mbp) {return -ENOMEM;if (csio_mb_issue(hw, mbp)) {"Issue of BYE command failed\n" );return -EINVAL;if (retval != FW_SUCCESS) {return -EINVAL;return 0 ;/* * csio_do_reset - Perform the device reset . * @ hw : HW module * @ fw_rst : FW reset * * If fw_rst is set , issues FW reset mbox cmd otherwise * does PIO reset . * Performs reset of the function . static int struct csio_hw *hw, bool fw_rst)struct csio_mb *mbp;enum fw_retval retval;if (!fw_rst) {/* PIO reset */ 2000 );return 0 ;if (!mbp) {return -ENOMEM;0 , NULL);if (csio_mb_issue(hw, mbp)) {"Issue of RESET command failed.n" );return -EINVAL;if (retval != FW_SUCCESS) {"RESET cmd failed with ret:0x%x.\n" , retval);return -EINVAL;return 0 ;static int struct csio_hw *hw, struct csio_mb *mbp)struct fw_caps_config_cmd *rsp = (struct fw_caps_config_cmd *)mbp->mb;if (!(caps & FW_CAPS_CONFIG_FCOE_INITIATOR)) {"No FCoE Initiator capability in the firmware.\n" );return -EINVAL;if (!(caps & FW_CAPS_CONFIG_FCOE_CTRL_OFLD)) {"No FCoE Control Offload capability\n" );return -EINVAL;return 0 ;/* * csio_hw_fw_halt - issue a reset / halt to FW and put uP into RESET * @ hw : the HW module * @ mbox : mailbox to use for the FW RESET command ( if desired ) * @ force : force uP into RESET even if FW RESET command fails * * Issues a RESET command to firmware ( if desired ) with a HALT indication * and then puts the microprocessor into RESET state . The RESET command * will only be issued if a legitimate mailbox is provided ( mbox < = * PCIE_FW_MASTER_MASK ) . * * This is generally used in order for the host to safely manipulate the * adapter without fear of conflicting with whatever the firmware might * be doing . The only way out of this state is to RESTART the firmware * . . . static int struct csio_hw *hw, uint32_t mbox, int32_t force)enum fw_retval retval = 0 ;/* * If a legitimate mailbox is provided , issue a RESET command * with a HALT indication . if (mbox <= PCIE_FW_MASTER_M) {struct csio_mb *mbp;if (!mbp) {return -ENOMEM;if (csio_mb_issue(hw, mbp)) {"Issue of RESET command failed!\n" );return -EINVAL;/* * Normally we won ' t complete the operation if the firmware RESET * command fails but if our caller insists we ' ll go ahead and put the * uP into RESET . This can be useful if the firmware is hung or even * missing . . . We ' ll have to take the risk of putting the uP into * RESET without the cooperation of firmware in that case . * * We also force the firmware ' s HALT flag to be on in case we bypassed * the firmware RESET command above or we ' re dealing with old firmware * which doesn ' t have the HALT capability . This will serve as a flag * for the incoming firmware to know that it ' s coming out of a HALT * rather than a RESET . . . if it ' s new enough to understand that . . . if (retval == 0 || force) {/* * And we always return the result of the firmware RESET command * even when we force the uP into RESET . . . return retval ? -EINVAL : 0 ;/* * csio_hw_fw_restart - restart the firmware by taking the uP out of RESET * @ hw : the HW module * @ reset : if we want to do a RESET to restart things * * Restart firmware previously halted by csio_hw_fw_halt ( ) . On successful * return the previous PF Master remains as the new PF Master and there * is no need to issue a new HELLO command , etc . * * We do this in two ways : * * 1 . If we ' re dealing with newer firmware we ' ll simply want to take * the chip ' s microprocessor out of RESET . This will cause the * firmware to start up from its start vector . And then we ' ll loop * until the firmware indicates it ' s started again ( PCIE_FW . HALT * reset to 0 ) or we timeout . * * 2 . If we ' re dealing with older firmware then we ' ll need to RESET * the chip since older firmware won ' t recognize the PCIE_FW . HALT * flag and automatically RESET itself on startup . static int struct csio_hw *hw, uint32_t mbox, int32_t reset)if (reset) {/* * Since we ' re directing the RESET instead of the firmware * doing it automatically , we need to clear the PCIE_FW . HALT * bit . 0 );/* * If we ' ve been given a valid mailbox , first try to get the * firmware to do the RESET . If that works , great and we can * return success . Otherwise , if we haven ' t been given a * valid mailbox or the RESET command failed , fall back to * hitting the chip with a hammer . if (mbox <= PCIE_FW_MASTER_M) {0 );100 );if (csio_do_reset(hw, true ) == 0 )return 0 ;2000 );else {int ms;0 );for (ms = 0 ; ms < FW_CMD_MAX_TIMEOUT; ) {if (!(csio_rd_reg32(hw, PCIE_FW_A) & PCIE_FW_HALT_F))return 0 ;100 );100 ;return -ETIMEDOUT;return 0 ;/* * csio_hw_fw_upgrade - perform all of the steps necessary to upgrade FW * @ hw : the HW module * @ mbox : mailbox to use for the FW RESET command ( if desired ) * @ fw_data : the firmware image to write * @ size : image size * @ force : force upgrade even if firmware doesn ' t cooperate * * Perform all of the steps necessary for upgrading an adapter ' s * firmware image . Normally this requires the cooperation of the * existing firmware in order to halt all existing activities * but if an invalid mailbox token is passed in we skip that step * ( though we ' ll still put the adapter microprocessor into RESET in * that case ) . * * On successful return the new firmware will have been loaded and * the adapter will have been fully RESET losing all previous setup * state . On unsuccessful return the adapter may be completely hosed . . . * positive errno indicates that the adapter is ~ probably ~ intact , a * negative errno indicates that things are looking bad . . . static int struct csio_hw *hw, uint32_t mbox,const u8 *fw_data, uint32_t size, int32_t force)const struct fw_hdr *fw_hdr = (const struct fw_hdr *)fw_data;int reset, ret;if (ret != 0 && !force)return ret;if (ret != 0 )return ret;/* * Older versions of the firmware don ' t understand the new * PCIE_FW . HALT flag and so won ' t know to perform a RESET when they * restart . So for newly loaded older firmware we ' ll have to do the * RESET for it so it starts up on a clean slate . We can tell if * the newly loaded firmware will handle this right by checking * its header flags to see if it advertises the capability . 0 );return csio_hw_fw_restart(hw, mbox, reset);/* * csio_get_device_params - Get device parameters . * @ hw : HW module * static int struct csio_hw *hw)struct csio_wrm *wrm = csio_hw_to_wrm(hw);struct csio_mb *mbp;enum fw_retval retval;6 ];int i, j = 0 ;/* Initialize portids to -1 */ for (i = 0 ; i < CSIO_MAX_PPORTS; i++)1 ;if (!mbp) {return -ENOMEM;/* Get port vec information. */ 0 ] = FW_PARAM_DEV(PORTVEC);/* Get Core clock. */ 1 ] = FW_PARAM_DEV(CCLK);/* Get EQ id start and end. */ 2 ] = FW_PARAM_PFVF(EQ_START);3 ] = FW_PARAM_PFVF(EQ_END);/* Get IQ id start and end. */ 4 ] = FW_PARAM_PFVF(IQFLINT_START);5 ] = FW_PARAM_PFVF(IQFLINT_END);0 ,false , NULL);if (csio_mb_issue(hw, mbp)) {"Issue of FW_PARAMS_CMD(read) failed!\n" );return -EINVAL;if (retval != FW_SUCCESS) {"FW_PARAMS_CMD(read) failed with ret:0x%x!\n" ,return -EINVAL;/* cache the information. */ 0 ];1 ];2 ];4 ];/* Using FW configured max iqs & eqs */ if ((hw->flags & CSIO_HWF_USING_SOFT_PARAMS) ||5 ] - param[4 ] + 1 ;3 ] - param[2 ] + 1 ;"Using fwconfig max niqs %d neqs %d\n" ,"Port vector: 0x%x, #ports: %d\n" ,for (i = 0 ; i < hw->num_pports; i++) {while ((hw->port_vec & (1 << j)) == 0 )"Found Port:%d\n" , hw->pport[i].portid);return 0 ;/* * csio_config_device_caps - Get and set device capabilities . * @ hw : HW module * static int struct csio_hw *hw)struct csio_mb *mbp;enum fw_retval retval;int rv = -EINVAL;if (!mbp) {return -ENOMEM;/* Get device capabilities */ 0 , 0 , 0 , 0 , NULL);if (csio_mb_issue(hw, mbp)) {"Issue of FW_CAPS_CONFIG_CMD(r) failed!\n" );goto out;if (retval != FW_SUCCESS) {"FW_CAPS_CONFIG_CMD(r) returned %d!\n" , retval);goto out;/* Validate device capabilities */ if (rv != 0 )goto out;/* Don't config device capabilities if already configured */ if (hw->fw_state == CSIO_DEV_STATE_INIT) {0 ;goto out;/* Write back desired device capabilities */ true , true ,false , true , NULL);if (csio_mb_issue(hw, mbp)) {"Issue of FW_CAPS_CONFIG_CMD(w) failed!\n" );goto out;if (retval != FW_SUCCESS) {"FW_CAPS_CONFIG_CMD(w) returned %d!\n" , retval);goto out;0 ;return rv;static inline enum cc_fec fwcap_to_cc_fec(fw_port_cap32_t fw_fec)enum cc_fec cc_fec = 0 ;if (fw_fec & FW_PORT_CAP32_FEC_RS)if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS)return cc_fec;static inline fw_port_cap32_t cc_to_fwcap_pause(enum cc_pause cc_pause)0 ;if (cc_pause & PAUSE_RX)if (cc_pause & PAUSE_TX)return fw_pause;static inline fw_port_cap32_t cc_to_fwcap_fec(enum cc_fec cc_fec)0 ;if (cc_fec & FEC_RS)if (cc_fec & FEC_BASER_RS)return fw_fec;/** * fwcap_to_fwspeed - return highest speed in Port Capabilities * @ acaps : advertised Port Capabilities * * Get the highest speed for the port from the advertised Port * Capabilities . #define TEST_SPEED_RETURN(__caps_speed) \do { \if (acaps & FW_PORT_CAP32_SPEED_## __caps_speed) \return FW_PORT_CAP32_SPEED_## __caps_speed; \while (0 )400 G);200 G);100 G);50 G);40 G);25 G);10 G);1 G);100 M);#undef TEST_SPEED_RETURNreturn 0 ;/** * fwcaps16_to_caps32 - convert 16 - bit Port Capabilities to 32 - bits * @ caps16 : a 16 - bit Port Capabilities value * * Returns the equivalent 32 - bit Port Capabilities value . 0 ;#define CAP16_TO_CAP32(__cap) \do { \if (caps16 & FW_PORT_CAP_## __cap) \## __cap; \while (0 )802 _3 _PAUSE);802 _3 _ASM_DIR);#undef CAP16_TO_CAP32return caps32;/** * fwcaps32_to_caps16 - convert 32 - bit Port Capabilities to 16 - bits * @ caps32 : a 32 - bit Port Capabilities value * * Returns the equivalent 16 - bit Port Capabilities value . Note that * not all 32 - bit Port Capabilities can be represented in the 16 - bit * Port Capabilities and some fields / values may not make it . 0 ;#define CAP32_TO_CAP16(__cap) \do { \if (caps32 & FW_PORT_CAP32_## __cap) \## __cap; \while (0 )802 _3 _PAUSE);802 _3 _ASM_DIR);#undef CAP32_TO_CAP16return caps16;/** * lstatus_to_fwcap - translate old lstatus to 32 - bit Port Capabilities * @ lstatus : old FW_PORT_ACTION_GET_PORT_INFO lstatus value * * Translates old FW_PORT_ACTION_GET_PORT_INFO lstatus field into new * 32 - bit Port Capabilities value . 0 ;/* The format of the Link Status in the old * 16 - bit Port Information message isn ' t the same as the * 16 - bit Port Capabilities bitfield used everywhere else . if (lstatus & FW_PORT_CMD_RXPAUSE_F)if (lstatus & FW_PORT_CMD_TXPAUSE_F)if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M))if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G))if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G))if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_25G))if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G))if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100G))return linkattr;/** * csio_init_link_config - initialize a link ' s SW state * @ lc : pointer to structure holding the link state * @ pcaps : link Port Capabilities * @ acaps : link current Advertised Port Capabilities * * Initializes the SW state maintained for each link , including the link ' s * capabilities and default speed / flow - control / autonegotiation settings . static void csio_init_link_config(struct link_config *lc, fw_port_cap32_t pcaps,0 ;0 ;0 ;/* * For Forward Error Control , we default to whatever the Firmware * tells us the Link is currently advertising . /* If the Port is capable of Auto-Negtotiation, initialize it as * " enabled " and copy over all of the Physical Port Capabilities * to the Advertised Port Capabilities . Otherwise mark it as * Auto - Negotiate disabled and select the highest supported speed * for the link . Note parallel structure in t4_link_l1cfg_core ( ) * and t4_handle_get_port_info ( ) . if (lc->pcaps & FW_PORT_CAP32_ANEG) {else {0 ;static void csio_link_l1cfg(struct link_config *lc, uint16_t fw_caps,unsigned int fw_mdi = FW_PORT_CAP32_MDI_V(FW_PORT_CAP32_MDI_AUTO);0 ;/* * Convert driver coding of Pause Frame Flow Control settings into the * Firmware ' s API . /* * Convert Common Code Forward Error Control settings into the * Firmware ' s API . If the current Requested FEC has " Automatic " * ( IEEE 802 . 3 ) specified , then we use whatever the Firmware * sent us as part of it ' s IEEE 802 . 3 - based interpretation of * the Transceiver Module EPROM FEC parameters . Otherwise we * use whatever is in the current Requested FEC settings . if (lc->requested_fec & FEC_AUTO)else /* Figure out what our Requested Port Capabilities are going to be. * Note parallel structure in t4_handle_get_port_info ( ) and * init_link_config ( ) . if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) {else if (lc->autoneg == AUTONEG_DISABLE) {else {/* * csio_enable_ports - Bring up all available ports . * @ hw : HW module . * static int struct csio_hw *hw)struct csio_mb *mbp;enum fw_retval retval;int i;if (!mbp) {return -ENOMEM;for (i = 0 ; i < hw->num_pports; i++) {if (fw_caps == FW_CAPS_UNKNOWN) {1 ;0 , 1 , ¶m, &val, true ,if (csio_mb_issue(hw, mbp)) {"failed to issue FW_PARAMS_CMD(r) port:%d\n" ,return -EINVAL;0 , NULL);/* Read PORT information */ false , 0 , fw_caps, NULL);if (csio_mb_issue(hw, mbp)) {"failed to issue FW_PORT_CMD(r) port:%d\n" ,return -EINVAL;if (retval != FW_SUCCESS) {"FW_PORT_CMD(r) port:%d failed: 0x%x\n" ,return -EINVAL;/* Write back PORT information */ true , rcaps, fw_caps, NULL);if (csio_mb_issue(hw, mbp)) {"failed to issue FW_PORT_CMD(w) port:%d\n" ,return -EINVAL;if (retval != FW_SUCCESS) {"FW_PORT_CMD(w) port:%d failed :0x%x\n" ,return -EINVAL;/* For all ports */ return 0 ;/* * csio_get_fcoe_resinfo - Read fcoe fw resource info . * @ hw : HW module * Issued with lock held . static int struct csio_hw *hw)struct csio_fcoe_res_info *res_info = &hw->fres_info;struct fw_fcoe_res_info_cmd *rsp;struct csio_mb *mbp;enum fw_retval retval;if (!mbp) {return -ENOMEM;/* Get FCoE FW resource information */ if (csio_mb_issue(hw, mbp)) {"failed to issue FW_FCOE_RES_INFO_CMD\n" );return -EINVAL;struct fw_fcoe_res_info_cmd *)(mbp->mb);if (retval != FW_SUCCESS) {"FW_FCOE_RES_INFO_CMD failed with ret x%x\n" ,return -EINVAL;"max ssns:%d max xchgs:%d\n" , res_info->max_ssns,return 0 ;static int struct csio_hw *hw, u32 *param)struct csio_mb *mbp;enum fw_retval retval;1 ];if (!mbp) {return -ENOMEM;/* * Find out whether we ' re dealing with a version of * the firmware which has configuration file support . 0 ] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |0 ,false , NULL);if (csio_mb_issue(hw, mbp)) {"Issue of FW_PARAMS_CMD(read) failed!\n" );return -EINVAL;if (retval != FW_SUCCESS) {"FW_PARAMS_CMD(read) failed with ret:0x%x!\n" ,return -EINVAL;0 ];return 0 ;static int struct csio_hw *hw, u32 *fw_cfg_param, char *path)int ret = 0 ;const struct firmware *cf;struct pci_dev *pci_dev = hw->pdev;struct device *dev = &pci_dev->dev;unsigned int mtype = 0 , maddr = 0 ;int value_to_add = 0 ;const char *fw_cfg_file;if (csio_is_t5(pci_dev->device & CSIO_HW_CHIP_MASK))else if (request_firmware(&cf, fw_cfg_file, dev) < 0 ) {"could not find config file %s, err: %d\n" ,return -ENOENT;if (cf->size%4 != 0 )4 - (cf->size % 4 );if (cfg_data == NULL) {goto leave;void *)cfg_data, (const void *)cf->data, cf->size);if (csio_hw_check_fwconfig(hw, fw_cfg_param) != 0 ) {goto leave;16 ;if ((ret == 0 ) && (value_to_add != 0 )) {union {char buf[4 ];0 x3;int i;2 ];for (i = value_to_add; i < 4 ; i++)0 ;4 , &last.word);if (ret == 0 ) {"config file upgraded to %s\n" , fw_cfg_file);64 , "%s%s" , "/lib/firmware/" , fw_cfg_file);return ret;/* * HW initialization : contact FW , obtain config , perform basic init . * * If the firmware we ' re dealing with has Configuration File support , then * we use that to perform all configuration - - either using the configuration * file stored in flash on the adapter or using a filesystem - local file * if available . * * If we don ' t have configuration file support in the firmware , then we ' ll * have to set things up the old fashioned way with hard - coded register * writes and firmware commands . . . /* * Attempt to initialize the HW via a Firmware Configuration File . static int struct csio_hw *hw, int reset, u32 *fw_cfg_param)struct csio_mb *mbp = NULL;struct fw_caps_config_cmd *caps_cmd;unsigned int mtype, maddr;int rv = -EINVAL;0 , finicsum = 0 , cfcsum = 0 ;char path[64 ];char *config_name = NULL;/* * Reset device if necessary if (reset) {true );if (rv != 0 )goto bye;/* * If we have a configuration file in host , * then use that . Otherwise , use the configuration file stored * in the HW flash . . . if (rv != 0 ) {/* * config file was not found . Use default * config file from flash . "On FLASH" ;else {16 ;if (!mbp) {return -ENOMEM;/* * Tell the firmware to process the indicated Configuration File . * If there are no errors and the caller has provided return value * pointers for the [ fini ] section version , checksum and computed * checksum , pass those back to the caller . struct fw_caps_config_cmd *)(mbp->mb);1 );16 ) |if (csio_mb_issue(hw, mbp)) {goto bye;/* If the CAPS_CONFIG failed with an ENOENT (for a Firmware * Configuration File in FLASH ) , our last gasp effort is to use the * Firmware Configuration File which is embedded in the * firmware . A very few early versions of the firmware didn ' t * have one embedded but we can ignore those . if (rv == ENOENT) {1 );if (csio_mb_issue(hw, mbp)) {goto bye;"Firmware Default" ;if (rv != FW_SUCCESS)goto bye;/* * And now tell the firmware to use the configuration we just loaded . if (csio_mb_issue(hw, mbp)) {goto bye;if (rv != FW_SUCCESS) {"FW_CAPS_CONFIG_CMD returned %d!\n" , rv);goto bye;if (finicsum != cfcsum) {"Config File checksum mismatch: csum=%#x, computed=%#x\n" ,/* Validate device capabilities */ if (rv != 0 )goto bye;/* * Note that we ' re operating with parameters * not supplied by the driver , rather than from hard - wired * initialization constants buried in the driver . /* device parameters */ if (rv != 0 )goto bye;/* Configure SGE */ /* * And finally tell the firmware to initialize itself using the * parameters from the Configuration File . /* Post event to notify completion of configuration */ "Successfully configure using Firmware " "Configuration File %s, version %#x, computed checksum %#x\n" ,return 0 ;/* * Something bad happened . Return the error . . . if (mbp)"Configuration file error %d\n" , rv);return rv;/* Is the given firmware API compatible with the one the driver was compiled * with ? static int fw_compatible(const struct fw_hdr *hdr1, const struct fw_hdr *hdr2)/* short circuit if it's the exact same firmware version */ if (hdr1->chip == hdr2->chip && hdr1->fw_ver == hdr2->fw_ver)return 1 ;#define SAME_INTF(x) (hdr1->intfver_## x == hdr2->intfver_## x)if (hdr1->chip == hdr2->chip && SAME_INTF(nic) && SAME_INTF(vnic) &&return 1 ;#undef SAME_INTFreturn 0 ;/* The firmware in the filesystem is usable, but should it be installed? * This routine explains itself in detail if it indicates the filesystem * firmware should be installed . static int csio_should_install_fs_fw(struct csio_hw *hw, int card_fw_usable,int k, int c)const char *reason;if (!card_fw_usable) {"incompatible or unusable" ;goto install;if (k > c) {"older than the version supported with this driver" ;goto install;return 0 ;"firmware on card (%u.%u.%u.%u) is %s, " "installing firmware %u.%u.%u.%u on card.\n" ,return 1 ;static struct fw_info fw_info_array[] = {static struct fw_info *find_fw_info(int chip)int i;for (i = 0 ; i < ARRAY_SIZE(fw_info_array); i++) {if (fw_info_array[i].chip == chip)return &fw_info_array[i];return NULL;static int csio_hw_prep_fw(struct csio_hw *hw, struct fw_info *fw_info,const u8 *fw_data, unsigned int fw_size,struct fw_hdr *card_fw, enum csio_dev_state state,int *reset)int ret, card_fw_usable, fs_fw_usable;const struct fw_hdr *fs_fw;const struct fw_hdr *drv_fw;/* Read the header of the firmware on the card */ sizeof (*card_fw) / sizeof (uint32_t),1 );if (ret == 0 ) {const void *)card_fw);else {"Unable to read card's firmware header: %d\n" , ret);0 ;if (fw_data != NULL) {const void *)fw_data;else {0 ;if (card_fw_usable && card_fw->fw_ver == drv_fw->fw_ver &&/* Common case: the firmware on the card is an exact match and * the filesystem one is an exact match too , or the filesystem * one is absent / incompatible . else if (fs_fw_usable && state == CSIO_DEV_STATE_UNINIT &&0 );if (ret != 0 ) {"failed to install firmware: %d\n" , ret);goto bye;/* Installed successfully, update the cached header too. */ sizeof (*card_fw));1 ;0 ; /* already reset as part of load_fw */ if (!card_fw_usable) {0 ;"Cannot find a usable firmware: " "chip state %d, " "driver compiled with %d.%d.%d.%d, " "card has %d.%d.%d.%d, filesystem has %d.%d.%d.%d\n" ,goto bye;/* We're using whatever's on the card and it's known to be good. */ return ret;/* * Returns - EINVAL if attempts to flash the firmware failed , * - ENOMEM if memory allocation failed else returns 0 , * if flashing was not attempted because the card had the * latest firmware ECANCELED is returned static int struct csio_hw *hw, int *reset)int ret = -ECANCELED;const struct firmware *fw;struct fw_info *fw_info;struct fw_hdr *card_fw;struct pci_dev *pci_dev = hw->pdev;struct device *dev = &pci_dev->dev ;const u8 *fw_data = NULL;unsigned int fw_size = 0 ;const char *fw_bin_file;/* This is the firmware whose headers the driver was compiled * against if (fw_info == NULL) {"unable to get firmware info for chip %d.\n" ,return -EINVAL;/* allocate memory to read the header of the firmware on the * card sizeof (*card_fw), GFP_KERNEL);if (!card_fw)return -ENOMEM;if (csio_is_t5(pci_dev->device & CSIO_HW_CHIP_MASK))else if (request_firmware(&fw, fw_bin_file, dev) < 0 ) {"could not find firmware image %s, err: %d\n" ,else {/* upgrade FW logic */ /* Cleaning up */ if (fw != NULL)return ret;static int csio_hw_check_fwver(struct csio_hw *hw)if (csio_is_t6(hw->pdev->device & CSIO_HW_CHIP_MASK) &&"T6 unsupported fw" );return -1 ;return 0 ;/* * csio_hw_configure - Configure HW * @ hw - HW module * static void struct csio_hw *hw)int reset = 1 ;int rv;1 ];if (rv != 0 ) {goto out;/* HW version */ char )csio_rd_reg32(hw, PL_REV_A);/* Needed for FW download */ if (rv != 0 ) {"Failed to get serial flash params rv:%d\n" , rv);goto out;/* Set PCIe completion timeout to 4 seconds */ if (pci_is_pcie(hw->pdev))0 xd);if (rv != 0 )goto out;"Firmware revision" );if (rv != 0 ) {goto out;/* Read vpd */ if (rv != 0 )goto out;if (csio_is_hw_master(hw) && hw->fw_state != CSIO_DEV_STATE_INIT) {/* Do firmware update */ if (rv != 0 )goto out;if (rv < 0 )goto out;/* If the firmware doesn't support Configuration Files, * return an error . if (rv != 0 ) {"Firmware doesn't support " "Firmware Configuration files\n" );goto out;/* The firmware provides us with a memory buffer where we can * load a Configuration File from the host if we want to * override the Configuration File in flash . if (rv == -ENOENT) {"Could not initialize " "adapter, error%d\n" , rv);goto out;if (rv != 0 ) {"Could not initialize " "adapter, error%d\n" , rv);goto out;else {if (rv < 0 )goto out;if (hw->fw_state == CSIO_DEV_STATE_INIT) {/* device parameters */ if (rv != 0 )goto out;/* Get device capabilities */ if (rv != 0 )goto out;/* Configure SGE */ /* Post event to notify completion of configuration */ goto out;/* if not master */ return ;/* * csio_hw_initialize - Initialize HW * @ hw - HW module * static void struct csio_hw *hw)struct csio_mb *mbp;enum fw_retval retval;int rv;int i;if (csio_is_hw_master(hw) && hw->fw_state != CSIO_DEV_STATE_INIT) {if (!mbp)goto out;if (csio_mb_issue(hw, mbp)) {"Issue of FW_INITIALIZE_CMD failed!\n" );goto free_and_out;if (retval != FW_SUCCESS) {"FW_INITIALIZE_CMD returned 0x%x!\n" ,goto free_and_out;if (rv != 0 ) {"Failed to read fcoe resource info: %d\n" , rv);goto out;if (rv != 0 ) {"Config of queues failed!: %d\n" , rv);goto out;for (i = 0 ; i < hw->num_pports; i++)if (csio_is_hw_master(hw) && hw->fw_state != CSIO_DEV_STATE_INIT) {if (rv != 0 ) {"Failed to enable ports: %d\n" , rv);goto out;return ;return ;#define PF_INTR_MASK (PFSW_F | PFCIM_F)/* * csio_hw_intr_enable - Enable HW interrupts * @ hw : Pointer to HW module . * * Enable interrupts in HW registers . static void struct csio_hw *hw)0 ;if (csio_is_t5(hw->pdev->device & CSIO_HW_CHIP_MASK))else /* * Set aivec for MSI / MSIX . PCIE_PF_CFG . INTXType is set up * by FW , so do nothing for INTX . if (hw->intr_mode == CSIO_IM_MSIX)else if (hw->intr_mode == CSIO_IM_MSI)0 );/* Turn on MB interrupts - this will internally flush PIO as well */ /* These are common registers - only a master can modify them */ if (csio_is_hw_master(hw)) {/* * Disable the Serial FLASH interrupt , if enabled ! 0 , 1 << pf);/* * csio_hw_intr_disable - Disable HW interrupts * @ hw : Pointer to HW module . * * Turn off Mailbox and PCI_PF_CFG interrupts . void struct csio_hw *hw)0 ;if (csio_is_t5(hw->pdev->device & CSIO_HW_CHIP_MASK))else if (!(hw->flags & CSIO_HWF_HW_INTR_ENABLED))return ;0 , MYPF_REG(PL_PF_INT_ENABLE_A));if (csio_is_hw_master(hw))1 << pf, 0 );/* Turn off MB interrupts */ void struct csio_hw *hw)0 );/* Do not reset HW, we may need FW state for debugging */ "HW Fatal error encountered!\n" );/*****************************************************************************/ /* START: HW SM */ /*****************************************************************************/ /* * csio_hws_uninit - Uninit state * @ hw - HW module * @ evt - Event * static void struct csio_hw *hw, enum csio_hw_ev evt)switch (evt) {case CSIO_HWE_CFG:break ;default :break ;/* * csio_hws_configuring - Configuring state * @ hw - HW module * @ evt - Event * static void struct csio_hw *hw, enum csio_hw_ev evt)switch (evt) {case CSIO_HWE_INIT:break ;case CSIO_HWE_INIT_DONE:/* Fan out event to all lnode SMs */ break ;case CSIO_HWE_FATAL:break ;case CSIO_HWE_PCI_REMOVE:break ;default :break ;/* * csio_hws_initializing - Initializing state * @ hw - HW module * @ evt - Event * static void struct csio_hw *hw, enum csio_hw_ev evt)switch (evt) {case CSIO_HWE_INIT_DONE:/* Fan out event to all lnode SMs */ /* Enable interrupts */ break ;case CSIO_HWE_FATAL:break ;case CSIO_HWE_PCI_REMOVE:break ;default :break ;/* * csio_hws_ready - Ready state * @ hw - HW module * @ evt - Event * static void struct csio_hw *hw, enum csio_hw_ev evt)/* Remember the event */ switch (evt) {case CSIO_HWE_HBA_RESET:case CSIO_HWE_FW_DLOAD:case CSIO_HWE_SUSPEND:case CSIO_HWE_PCI_REMOVE:case CSIO_HWE_PCIERR_DETECTED:/* cleanup all outstanding cmds */ if (evt == CSIO_HWE_HBA_RESET ||false );else true );break ;case CSIO_HWE_FATAL:break ;default :break ;/* * csio_hws_quiescing - Quiescing state * @ hw - HW module * @ evt - Event * static void struct csio_hw *hw, enum csio_hw_ev evt)switch (evt) {case CSIO_HWE_QUIESCED:switch (hw->evtflag) {case CSIO_HWE_FW_DLOAD:/* Download firmware */ case CSIO_HWE_HBA_RESET:/* Start reset of the HBA */ false );false );break ;case CSIO_HWE_PCI_REMOVE:true );/* Now send the bye command */ break ;case CSIO_HWE_SUSPEND:break ;case CSIO_HWE_PCIERR_DETECTED:false );break ;default :break ;break ;default :break ;/* * csio_hws_quiesced - Quiesced state * @ hw - HW module * @ evt - Event * static void struct csio_hw *hw, enum csio_hw_ev evt)switch (evt) {case CSIO_HWE_RESUME:break ;default :break ;/* * csio_hws_resetting - HW Resetting state * @ hw - HW module * @ evt - Event * static void struct csio_hw *hw, enum csio_hw_ev evt)switch (evt) {case CSIO_HWE_HBA_RESET_DONE:break ;default :break ;/* * csio_hws_removing - PCI Hotplug removing state * @ hw - HW module * @ evt - Event * static void struct csio_hw *hw, enum csio_hw_ev evt)switch (evt) {case CSIO_HWE_HBA_RESET:if (!csio_is_hw_master(hw))break ;/* * The BYE should have already been issued , so we can ' t * use the mailbox interface . Hence we use the PL_RST * register directly . "Resetting HW and waiting 2 seconds...\n" );2000 );break ;/* Should never receive any new events */ default :break ;/* * csio_hws_pcierr - PCI Error state * @ hw - HW module * @ evt - Event * static void struct csio_hw *hw, enum csio_hw_ev evt)switch (evt) {case CSIO_HWE_PCIERR_SLOT_RESET:break ;default :break ;/*****************************************************************************/ /* END: HW SM */ /*****************************************************************************/ /* * csio_handle_intr_status - table driven interrupt handler * @ hw : HW instance * @ reg : the interrupt status register to process * @ acts : table of interrupt actions * * A table driven interrupt handler that applies a set of masks to an * interrupt status word and performs the corresponding actions if the * interrupts described by the mask have occurred . The actions include * optionally emitting a warning or alert message . The table is terminated * by an entry specifying mask 0 . Returns the number of fatal interrupt * conditions . int struct csio_hw *hw, unsigned int reg,const struct intr_info *acts)int fatal = 0 ;unsigned int mask = 0 ;unsigned int status = csio_rd_reg32(hw, reg);for ( ; acts->mask; ++acts) {if (!(status & acts->mask))continue ;if (acts->fatal) {"Fatal %s (0x%x)\n" ,else if (acts->msg)"%s (0x%x)\n" ,if (status) /* clear processed interrupts */ return fatal;/* * TP interrupt handler . static void csio_tp_intr_handler(struct csio_hw *hw)static struct intr_info tp_intr_info[] = {0 x3fffffff, "TP parity error" , -1 , 1 },"TP out of Tx pages" , -1 , 1 },0 , NULL, 0 , 0 }if (csio_handle_intr_status(hw, TP_INT_CAUSE_A, tp_intr_info))/* * SGE interrupt handler . static void csio_sge_intr_handler(struct csio_hw *hw)static struct intr_info sge_intr_info[] = {"SGE received CPL exceeding IQE size" , -1 , 1 },"SGE GTS CIDX increment too large" , -1 , 0 },"SGE received 0-length CPL" , -1 , 0 },"SGE doorbell dropped" , -1 , 0 },"SGE IQID > 1023 received CPL for FL" , -1 , 0 },"SGE DBP 3 pidx increment too large" , -1 ,0 },"SGE DBP 2 pidx increment too large" , -1 ,0 },"SGE DBP 1 pidx increment too large" , -1 ,0 },"SGE DBP 0 pidx increment too large" , -1 ,0 },"SGE too many priority ingress contexts" , -1 , 0 },"SGE too many priority egress contexts" , -1 , 0 },"SGE illegal ingress QID" , -1 , 0 },"SGE illegal egress QID" , -1 , 0 },0 , NULL, 0 , 0 }32 );if (v) {"SGE parity error (%#llx)\n" ,unsigned long long )v);0 xFFFFFFFF),32 ), SGE_INT_CAUSE2_A);if (csio_handle_intr_status(hw, SGE_INT_CAUSE3_A, sge_intr_info) ||0 )#define CIM_OBQ_INTR (OBQULP0PARERR_F | OBQULP1PARERR_F | OBQULP2PARERR_F |\#define CIM_IBQ_INTR (IBQTP0PARERR_F | IBQTP1PARERR_F | IBQULPPARERR_F |\/* * CIM interrupt handler . static void csio_cim_intr_handler(struct csio_hw *hw)static struct intr_info cim_intr_info[] = {"CIM control register prefetch drop" , -1 , 1 },"CIM OBQ parity error" , -1 , 1 },"CIM IBQ parity error" , -1 , 1 },"CIM mailbox uP parity error" , -1 , 1 },"CIM mailbox host parity error" , -1 , 1 },"CIM TIEQ outgoing parity error" , -1 , 1 },"CIM TIEQ incoming parity error" , -1 , 1 },0 , NULL, 0 , 0 }static struct intr_info cim_upintr_info[] = {"CIM reserved space access" , -1 , 1 },"CIM illegal transaction" , -1 , 1 },"CIM illegal write" , -1 , 1 },"CIM illegal read" , -1 , 1 },"CIM illegal read BE" , -1 , 1 },"CIM illegal write BE" , -1 , 1 },"CIM single read from boot space" , -1 , 1 },"CIM single write to boot space" , -1 , 1 },"CIM block write to boot space" , -1 , 1 },"CIM single read from flash space" , -1 , 1 },"CIM single write to flash space" , -1 , 1 },"CIM block write to flash space" , -1 , 1 },"CIM single EEPROM read" , -1 , 1 },"CIM single EEPROM write" , -1 , 1 },"CIM block EEPROM read" , -1 , 1 },"CIM block EEPROM write" , -1 , 1 },"CIM single read from CTL space" , -1 , 1 },"CIM single write to CTL space" , -1 , 1 },"CIM block read from CTL space" , -1 , 1 },"CIM block write to CTL space" , -1 , 1 },"CIM single read from PL space" , -1 , 1 },"CIM single write to PL space" , -1 , 1 },"CIM block read from PL space" , -1 , 1 },"CIM block write to PL space" , -1 , 1 },"CIM request FIFO overwrite" , -1 , 1 },"CIM response FIFO overwrite" , -1 , 1 },"CIM PIF timeout" , -1 , 1 },"CIM PIF MA timeout" , -1 , 1 },0 , NULL, 0 , 0 }int fat;if (fat)/* * ULP RX interrupt handler . static void csio_ulprx_intr_handler(struct csio_hw *hw)static struct intr_info ulprx_intr_info[] = {0 x1800000, "ULPRX context error" , -1 , 1 },0 x7fffff, "ULPRX parity error" , -1 , 1 },0 , NULL, 0 , 0 }if (csio_handle_intr_status(hw, ULP_RX_INT_CAUSE_A, ulprx_intr_info))/* * ULP TX interrupt handler . static void csio_ulptx_intr_handler(struct csio_hw *hw)static struct intr_info ulptx_intr_info[] = {"ULPTX channel 3 PBL out of bounds" , -1 ,0 },"ULPTX channel 2 PBL out of bounds" , -1 ,0 },"ULPTX channel 1 PBL out of bounds" , -1 ,0 },"ULPTX channel 0 PBL out of bounds" , -1 ,0 },0 xfffffff, "ULPTX parity error" , -1 , 1 },0 , NULL, 0 , 0 }if (csio_handle_intr_status(hw, ULP_TX_INT_CAUSE_A, ulptx_intr_info))/* * PM TX interrupt handler . static void csio_pmtx_intr_handler(struct csio_hw *hw)static struct intr_info pmtx_intr_info[] = {"PMTX channel 0 pcmd too large" , -1 , 1 },"PMTX channel 1 pcmd too large" , -1 , 1 },"PMTX channel 2 pcmd too large" , -1 , 1 },"PMTX 0-length pcmd" , -1 , 1 },0 xffffff0, "PMTX framing error" , -1 , 1 },"PMTX oespi parity error" , -1 , 1 },"PMTX db_options parity error" , -1 ,1 },"PMTX icspi parity error" , -1 , 1 },"PMTX c_pcmd parity error" , -1 , 1 },0 , NULL, 0 , 0 }if (csio_handle_intr_status(hw, PM_TX_INT_CAUSE_A, pmtx_intr_info))/* * PM RX interrupt handler . static void csio_pmrx_intr_handler(struct csio_hw *hw)static struct intr_info pmrx_intr_info[] = {"PMRX 0-length pcmd" , -1 , 1 },0 x3ffff0, "PMRX framing error" , -1 , 1 },"PMRX ocspi parity error" , -1 , 1 },"PMRX db_options parity error" , -1 ,1 },"PMRX iespi parity error" , -1 , 1 },"PMRX e_pcmd parity error" , -1 , 1 },0 , NULL, 0 , 0 }if (csio_handle_intr_status(hw, PM_RX_INT_CAUSE_A, pmrx_intr_info))/* * CPL switch interrupt handler . static void csio_cplsw_intr_handler(struct csio_hw *hw)static struct intr_info cplsw_intr_info[] = {"CPLSW CIM op_map parity error" , -1 , 1 },"CPLSW CIM overflow" , -1 , 1 },"CPLSW TP framing error" , -1 , 1 },"CPLSW SGE framing error" , -1 , 1 },"CPLSW CIM framing error" , -1 , 1 },"CPLSW no-switch error" , -1 , 1 },0 , NULL, 0 , 0 }if (csio_handle_intr_status(hw, CPL_INTR_CAUSE_A, cplsw_intr_info))/* * LE interrupt handler . static void csio_le_intr_handler(struct csio_hw *hw)enum chip_type chip = CHELSIO_CHIP_VERSION(hw->chip_id);static struct intr_info le_intr_info[] = {"LE LIP miss" , -1 , 0 },"LE 0 LIP error" , -1 , 0 },"LE parity error" , -1 , 1 },"LE unknown command" , -1 , 1 },"LE request queue parity error" , -1 , 1 },0 , NULL, 0 , 0 }static struct intr_info t6_le_intr_info[] = {"LE LIP miss" , -1 , 0 },"LE 0 LIP error" , -1 , 0 },"LE parity error" , -1 , 1 },"LE unknown command" , -1 , 1 },"LE request queue parity error" , -1 , 1 },0 , NULL, 0 , 0 }if (csio_handle_intr_status(hw, LE_DB_INT_CAUSE_A,/* * MPS interrupt handler . static void csio_mps_intr_handler(struct csio_hw *hw)static struct intr_info mps_rx_intr_info[] = {0 xffffff, "MPS Rx parity error" , -1 , 1 },0 , NULL, 0 , 0 }static struct intr_info mps_tx_intr_info[] = {"MPS Tx TP FIFO parity error" , -1 , 1 },"MPS Tx NC-SI FIFO parity error" , -1 , 1 },"MPS Tx data FIFO parity error" ,1 , 1 },"MPS Tx desc FIFO parity error" ,1 , 1 },"MPS Tx underflow" , -1 , 1 },"MPS Tx SOP/EOP error" , -1 , 1 },"MPS Tx framing error" , -1 , 1 },0 , NULL, 0 , 0 }static struct intr_info mps_trc_intr_info[] = {"MPS TRC filter parity error" , -1 , 1 },"MPS TRC packet FIFO parity error" ,1 , 1 },"MPS TRC misc parity error" , -1 , 1 },0 , NULL, 0 , 0 }static struct intr_info mps_stat_sram_intr_info[] = {0 x1fffff, "MPS statistics SRAM parity error" , -1 , 1 },0 , NULL, 0 , 0 }static struct intr_info mps_stat_tx_intr_info[] = {0 xfffff, "MPS statistics Tx FIFO parity error" , -1 , 1 },0 , NULL, 0 , 0 }static struct intr_info mps_stat_rx_intr_info[] = {0 xffffff, "MPS statistics Rx FIFO parity error" , -1 , 1 },0 , NULL, 0 , 0 }static struct intr_info mps_cls_intr_info[] = {"MPS match SRAM parity error" , -1 , 1 },"MPS match TCAM parity error" , -1 , 1 },"MPS hash SRAM parity error" , -1 , 1 },0 , NULL, 0 , 0 }int fat;0 , MPS_INT_CAUSE_A);/* flush */ if (fat)#define MEM_INT_MASK (PERR_INT_CAUSE_F | ECC_CE_INT_CAUSE_F | \/* * EDC / MC interrupt handler . static void csio_mem_intr_handler(struct csio_hw *hw, int idx)static const char name[3 ][5 ] = { "EDC0" , "EDC1" , "MC" };unsigned int addr, cnt_addr, v;if (idx <= MEM_EDC1) {else {if (v & PERR_INT_CAUSE_F)"%s FIFO parity error\n" , name[idx]);if (v & ECC_CE_INT_CAUSE_F) {"%u %s correctable ECC data error%s\n" ,1 ? "s" : "" );if (v & ECC_UE_INT_CAUSE_F)"%s uncorrectable ECC data error\n" , name[idx]);if (v & (PERR_INT_CAUSE_F | ECC_UE_INT_CAUSE_F))/* * MA interrupt handler . static void csio_ma_intr_handler(struct csio_hw *hw)if (status & MEM_PERR_INT_CAUSE_F)"MA parity error, parity status %#x\n" ,if (status & MEM_WRAP_INT_CAUSE_F) {"MA address wrap-around error by client %u to address %#x\n" ,4 );/* * SMB interrupt handler . static void csio_smb_intr_handler(struct csio_hw *hw)static struct intr_info smb_intr_info[] = {"SMB master Tx FIFO parity error" , -1 , 1 },"SMB master Rx FIFO parity error" , -1 , 1 },"SMB slave FIFO parity error" , -1 , 1 },0 , NULL, 0 , 0 }if (csio_handle_intr_status(hw, SMB_INT_CAUSE_A, smb_intr_info))/* * NC - SI interrupt handler . static void csio_ncsi_intr_handler(struct csio_hw *hw)static struct intr_info ncsi_intr_info[] = {"NC-SI CIM parity error" , -1 , 1 },"NC-SI MPS parity error" , -1 , 1 },"NC-SI Tx FIFO parity error" , -1 , 1 },"NC-SI Rx FIFO parity error" , -1 , 1 },0 , NULL, 0 , 0 }if (csio_handle_intr_status(hw, NCSI_INT_CAUSE_A, ncsi_intr_info))/* * XGMAC interrupt handler . static void csio_xgmac_intr_handler(struct csio_hw *hw, int port)if (!v)return ;if (v & TXFIFO_PRTY_ERR_F)"XGMAC %d Tx FIFO parity error\n" , port);if (v & RXFIFO_PRTY_ERR_F)"XGMAC %d Rx FIFO parity error\n" , port);/* * PL interrupt handler . static void csio_pl_intr_handler(struct csio_hw *hw)static struct intr_info pl_intr_info[] = {"T4 fatal parity error" , -1 , 1 },"PL VFID_MAP parity error" , -1 , 1 },0 , NULL, 0 , 0 }if (csio_handle_intr_status(hw, PL_PL_INT_CAUSE_A, pl_intr_info))/* * csio_hw_slow_intr_handler - control path interrupt handler * @ hw : HW module * * Interrupt handler for non - data global interrupt events , e . g . , errors . * The designation ' slow ' is because it involves register reads , while * data interrupts typically don ' t involve any MMIOs . int struct csio_hw *hw)if (!(cause & CSIO_GLBL_INTR_MASK)) {return 0 ;"Slow interrupt! cause: 0x%x\n" , cause);if (cause & CIM_F)if (cause & MPS_F)if (cause & NCSI_F)if (cause & PL_F)if (cause & SMB_F)if (cause & XGMAC0_F)0 );if (cause & XGMAC1_F)1 );if (cause & XGMAC_KR0_F)2 );if (cause & XGMAC_KR1_F)3 );if (cause & PCIE_F)if (cause & MC_F)if (cause & EDC0_F)if (cause & EDC1_F)if (cause & LE_F)if (cause & TP_F)if (cause & MA_F)if (cause & PM_TX_F)if (cause & PM_RX_F)if (cause & ULP_RX_F)if (cause & CPL_SWITCH_F)if (cause & SGE_F)if (cause & ULP_TX_F)/* Clear the interrupts just processed for which we are the master. */ /* flush */ return 1 ;/***************************************************************************** * HW < - - > mailbox interfacing routines . /* * csio_mberr_worker - Worker thread ( dpc ) for mailbox / error completions * * @ data : Private data pointer . * * Called from worker thread context . static void void *data)struct csio_hw *hw = (struct csio_hw *)data;struct csio_mbm *mbm = &hw->mbm;struct csio_mb *mbp_next;int rv;if (list_empty(&mbm->cbfn_q)) {return ;0 ;/* Try to start waiting mailboxes */ if (!list_empty(&mbm->req_q)) {struct csio_mb, list);if (rv != 0 )else /* Now callback completions */ /* * csio_hw_mb_timer - Top - level Mailbox timeout handler . * * @ data : private data pointer * static void struct timer_list *t)struct csio_mbm *mbm = timer_container_of(mbm, t, timer);struct csio_hw *hw = mbm->hw;struct csio_mb *mbp = NULL;/* Call back the function for the timed-out Mailbox */ if (mbp)/* * csio_hw_mbm_cleanup - Cleanup Mailbox module . * @ hw : HW module * * Called with lock held , should exit with lock held . * Cancels outstanding mailboxes ( waiting , in - flight ) and gathers them * into a local queue . Drops lock and calls the completions . Holds * lock and returns . static void struct csio_hw *hw)/***************************************************************************** * Event handling int struct csio_hw *hw, enum csio_evt type, void *evt_msg,struct csio_evt_msg *evt_entry = NULL;if (type >= CSIO_EVT_MAX)return -EINVAL;if (len > CSIO_EVT_MSG_SIZE)return -EINVAL;if (hw->flags & CSIO_HWF_FWEVT_STOP)return -EINVAL;if (list_empty(&hw->evt_free_q)) {"Failed to alloc evt entry, msg type %d len %d\n" ,return -ENOMEM;struct csio_evt_msg, list);/* copy event msg and queue the event */ void *)evt_entry->data, evt_msg, len);return 0 ;static int struct csio_hw *hw, enum csio_evt type, void *evt_msg,bool msg_sg)struct csio_evt_msg *evt_entry = NULL;struct csio_fl_dma_buf *fl_sg;0 ;unsigned long flags;int n, ret = 0 ;if (type >= CSIO_EVT_MAX)return -EINVAL;if (len > CSIO_EVT_MSG_SIZE)return -EINVAL;if (hw->flags & CSIO_HWF_FWEVT_STOP) {goto out;if (list_empty(&hw->evt_free_q)) {"Failed to alloc evt entry, msg type %d len %d\n" ,goto out;struct csio_evt_msg, list);/* copy event msg and queue the event */ /* If Payload in SG list*/ if (msg_sg) {struct csio_fl_dma_buf *) evt_msg;for (n = 0 ; (n < CSIO_MAX_FLBUF_PER_IQWR && off < len); n++) {void *)((uintptr_t)evt_entry->data + off),else void *)evt_entry->data, evt_msg, len);return ret;static void struct csio_hw *hw, struct csio_evt_msg *evt_entry)if (evt_entry) {void struct csio_hw *hw)30 ;while (hw->flags & CSIO_HWF_FWEVT_PENDING && count--) {2000 );static void struct csio_hw *hw)static void struct csio_hw *hw)static void struct csio_hw *hw)struct list_head *evt_entry, *next_entry;/* Release outstanding events from activeq to freeq*/ if (!list_empty(&hw->evt_active_q))0 ;/* Freeup event entry */ 0 ;static void struct csio_hw *hw, void *wr, uint32_t len,struct csio_fl_dma_buf *flb, void *priv)void *msg = NULL;0 ;bool msg_sg = 0 ;struct rss_header *) wr)->opcode;if (op == CPL_FW6_PLD) {if (!flb || !flb->totlen) {return ;void *) flb;1 ;else if (op == CPL_FW6_MSG || op == CPL_FW4_MSG) {/* skip RSS header */ void *)((uintptr_t)wr + sizeof (__be64));sizeof (struct cpl_fw6_msg) :sizeof (struct cpl_fw4_msg);else {"unexpected CPL %#x on FW event queue\n" , op);return ;/* * Enqueue event to EventQ . Events processing happens * in Event worker thread context if (csio_enqueue_evt_lock(hw, CSIO_EVT_FW, msg,void struct work_struct *work)struct csio_hw *hw = container_of(work, struct csio_hw, evtq_work);struct list_head *evt_entry, *next_entry;struct csio_evt_msg *evt_msg;struct cpl_fw6_msg *msg;struct csio_rnode *rn;int rv = 0 ;0 ;"event worker thread active evts#%d\n" ,while (!list_empty(&hw->evt_active_q)) {struct csio_evt_msg *) evt_entry;/* Drop events if queue is STOPPED */ if (hw->flags & CSIO_HWF_FWEVT_STOP)1 ;if (evtq_stop) {goto free_evt;switch (evt_msg->type) {case CSIO_EVT_FW:struct cpl_fw6_msg *)(evt_msg->data);if ((msg->opcode == CPL_FW6_MSG ||if (!rv)break ;/* Handle any remaining fw events */ else if (msg->opcode == CPL_FW6_PLD) {else {"Unhandled FW msg op %x type %x\n" ,break ;case CSIO_EVT_MBX:break ;case CSIO_EVT_DEV_LOSS:sizeof (rn));break ;default :"Unhandled event %x on evtq\n" ,break ;int struct csio_hw *hw)int rv;if (csio_q_iqid(hw, hw->fwevt_iq_idx) == CSIO_MAX_QID) {return -EINVAL;return rv;/**************************************************************************** * Entry points /* Management module */ /* * csio_mgmt_req_lookup - Lookup the given IO req exist in Active Q . * mgmt - mgmt module * @ io_req - io request * * Return - 0 : if given IO Req exists in active Q . * - EINVAL : if lookup fails . int struct csio_mgmtm *mgmtm, struct csio_ioreq *io_req)struct list_head *tmp;/* Lookup ioreq in the ACTIVEQ */ if (io_req == (struct csio_ioreq *)tmp)return 0 ;return -EINVAL;#define ECM_MIN_TMO 1000 /* Minimum timeout value for req */ /* * csio_mgmts_tmo_handler - MGMT IO Timeout handler . * @ data - Event data . * * Return - none . static void struct timer_list *t)struct csio_mgmtm *mgmtm = timer_container_of(mgmtm, t, mgmt_timer);struct list_head *tmp;struct csio_ioreq *io_req;"Mgmt timer invoked!\n" );struct csio_ioreq *) tmp;if (!io_req->tmo) {/* Dequeue the request from retry Q. */ if (io_req->io_cbfn) {/* io_req will be freed by completion handler */ else {0 );/* If retry queue is not empty, re-arm timer */ if (!list_empty(&mgmtm->active_q))static void struct csio_mgmtm *mgmtm)struct csio_hw *hw = mgmtm->hw;struct csio_ioreq *io_req;struct list_head *tmp;30 ;/* Wait for all outstanding req to complete gracefully */ while ((!list_empty(&mgmtm->active_q)) && count--) {2000 );/* release outstanding req from ACTIVEQ */ struct csio_ioreq *) tmp;if (io_req->io_cbfn) {/* io_req will be freed by completion handler */ /* * csio_mgmt_init - Mgmt module init entry point * @ mgmtsm - mgmt module * @ hw - HW module * * Initialize mgmt timer , resource wait queue , active queue , * completion q . Allocate Egress and Ingress * WR queues and save off the queue index returned by the WR * module for future use . Allocate and save off mgmt reqs in the * mgmt_req_freelist for future use . Make sure their SM is initialized * to uninit state . * Returns : 0 - on success * - ENOMEM - on error . static int struct csio_mgmtm *mgmtm, struct csio_hw *hw)0 );/*mgmtm->iq_idx = hw->fwevt_iq_idx;*/ return 0 ;/* * csio_mgmtm_exit - MGMT module exit entry point * @ mgmtsm - mgmt module * * This function called during MGMT module uninit . * Stop timers , free ioreqs allocated . * Returns : None * static void struct csio_mgmtm *mgmtm)/** * csio_hw_start - Kicks off the HW State machine * @ hw : Pointer to HW module . * * It is assumed that the initialization is a synchronous operation . * So when we return after posting the event , the HW SM should be in * the ready state , if there were no errors during init . int struct csio_hw *hw)if (csio_is_hw_ready(hw))return 0 ;else if (csio_match_state(hw, csio_hws_uninit))return -EINVAL;else return -ENODEV;int struct csio_hw *hw)if (csio_is_hw_removing(hw))return 0 ;else return -EINVAL;/* Max reset retries */ #define CSIO_MAX_RESET_RETRIES 3 /** * csio_hw_reset - Reset the hardware * @ hw : HW module . * * Caller should hold lock across this function . int struct csio_hw *hw)if (!csio_is_hw_master(hw))return -EPERM;if (hw->rst_retries >= CSIO_MAX_RESET_RETRIES) {"Max hw reset attempts reached.." );return -EINVAL;if (csio_is_hw_ready(hw)) {0 ;return 0 ;else return -EINVAL;/* * csio_hw_get_device_id - Caches the Adapter ' s vendor & device id . * @ hw : HW module . static void struct csio_hw *hw)/* Is the adapter device id cached already ?*/ if (csio_is_dev_id_cached(hw))return ;/* Get the PCI vendor & device id */ /* csio_hw_get_device_id */ /* * csio_hw_set_description - Set the model , description of the hw . * @ hw : HW module . * @ ven_id : PCI Vendor ID * @ dev_id : PCI Device ID static void struct csio_hw *hw, uint16_t ven_id, uint16_t dev_id)if (ven_id == CSIO_VENDOR_ID) {if (prot_type == CSIO_T5_FCOE_ASIC) {16 );32 );else {char tempName[32 ] = "Chelsio FCoE Controller" ;32 );/* csio_hw_set_description */ /** * csio_hw_init - Initialize HW module . * @ hw : Pointer to HW module . * * Initialize the members of the HW module . int struct csio_hw *hw)int rv = -EINVAL;struct csio_evt_msg *evt_entry;/* Get the PCI vendor & device id */ /* Initialize the HW chip ops T5 specific ops */ /* Set the model & its description */ /* Initialize default log level */ 1 );1 );/* Init all the modules: Mailbox, WorkRequest and Transport */ if (csio_mbm_init(csio_hw_to_mbm(hw), hw, csio_hw_mb_timer))goto err;if (rv)goto err_mbm_exit;if (rv)goto err_wrm_exit;if (rv)goto err_scsim_exit;/* Pre-allocate evtq and initialize them */ for (i = 0 ; i < csio_evtq_sz; i++) {sizeof (struct csio_evt_msg), GFP_KERNEL);if (!evt_entry) {"Failed to initialize eventq" );goto err_evtq_cleanup;return 0 ;return rv;/** * csio_hw_exit - Un - initialize HW module . * @ hw : Pointer to HW module . * void struct csio_hw *hw)
Messung V0.5 in Prozent C=95 H=90 G=92
¤ Dauer der Verarbeitung: 0.121 Sekunden
(vorverarbeitet am 2026-09-27)
¤ *© Formatika GbR, Deutschland
