for (i = 0; i < exynos->num_clks; i++) {
exynos->clks[i] = devm_clk_get(dev, exynos->clk_names[i]); if (IS_ERR(exynos->clks[i])) {
dev_err(dev, "failed to get clock: %s\n",
exynos->clk_names[i]); return PTR_ERR(exynos->clks[i]);
}
}
for (i = 0; i < exynos->num_clks; i++) {
ret = clk_prepare_enable(exynos->clks[i]); if (ret) { while (i-- > 0)
clk_disable_unprepare(exynos->clks[i]); return ret;
}
}
if (exynos->suspend_clk_idx >= 0)
clk_prepare_enable(exynos->clks[exynos->suspend_clk_idx]);
exynos->vdd33 = devm_regulator_get(dev, "vdd33"); if (IS_ERR(exynos->vdd33)) {
ret = PTR_ERR(exynos->vdd33); goto vdd33_err;
}
ret = regulator_enable(exynos->vdd33); if (ret) {
dev_err(dev, "Failed to enable VDD33 supply\n"); goto vdd33_err;
}
exynos->vdd10 = devm_regulator_get(dev, "vdd10"); if (IS_ERR(exynos->vdd10)) {
ret = PTR_ERR(exynos->vdd10); goto vdd10_err;
}
ret = regulator_enable(exynos->vdd10); if (ret) {
dev_err(dev, "Failed to enable VDD10 supply\n"); goto vdd10_err;
}
if (node) {
ret = of_platform_populate(node, NULL, NULL, dev); if (ret) {
dev_err(dev, "failed to add dwc3 core\n"); goto populate_err;
}
} else {
dev_err(dev, "no device node, failed to add dwc3 core\n");
ret = -ENODEV; goto populate_err;
}
return0;
populate_err:
regulator_disable(exynos->vdd10);
vdd10_err:
regulator_disable(exynos->vdd33);
vdd33_err: for (i = exynos->num_clks - 1; i >= 0; i--)
clk_disable_unprepare(exynos->clks[i]);
if (exynos->suspend_clk_idx >= 0)
clk_disable_unprepare(exynos->clks[exynos->suspend_clk_idx]);
staticint dwc3_exynos_resume(struct device *dev)
{ struct dwc3_exynos *exynos = dev_get_drvdata(dev); int i, ret;
ret = regulator_enable(exynos->vdd33); if (ret) {
dev_err(dev, "Failed to enable VDD33 supply\n"); return ret;
}
ret = regulator_enable(exynos->vdd10); if (ret) {
dev_err(dev, "Failed to enable VDD10 supply\n"); return ret;
}
for (i = 0; i < exynos->num_clks; i++) {
ret = clk_prepare_enable(exynos->clks[i]); if (ret) { while (i-- > 0)
clk_disable_unprepare(exynos->clks[i]); return ret;
}
}
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