// // Define format of InterruptStatus packet returned from the // Interrupt pipe //
struct int_status_pkt {
__u16 RxBytesAvail; // Additional bytes available to // be read from Bulk IN pipe
__u16 TxCredits[MAX_RS232_PORTS]; // Additional space available in // given port's TxBuffer
};
// Register numbers and contents // defined in 16554.H.
// 0x08 // Available for expansion. #define IOSP_EXT_CMD 0x09 // P1 = Command code (defined below)
// P2 = Parameter
// // Extended Command values, used with IOSP_EXT_CMD, may // or may not use parameter P2. //
#define IOSP_CMD_OPEN_PORT 0x00 // Enable ints, init UART. (NO PARAM) #define IOSP_CMD_CLOSE_PORT 0x01 // Disable ints, flush buffers. (NO PARAM) #define IOSP_CMD_CHASE_PORT 0x02 // Wait for Edgeport TX buffers to empty. (NO PARAM) #define IOSP_CMD_SET_RX_FLOW 0x03 // Set Rx Flow Control in Edgeport #define IOSP_CMD_SET_TX_FLOW 0x04 // Set Tx Flow Control in Edgeport #define IOSP_CMD_SET_XON_CHAR 0x05 // Set XON Character in Edgeport #define IOSP_CMD_SET_XOFF_CHAR 0x06 // Set XOFF Character in Edgeport #define IOSP_CMD_RX_CHECK_REQ 0x07 // Request Edgeport to insert a Checkpoint into
// the receive data stream (Parameter = 1 byte sequence number)
#define IOSP_CMD_SET_BREAK 0x08 // Turn on the BREAK (LCR bit 6) #define IOSP_CMD_CLEAR_BREAK 0x09 // Turn off the BREAK (LCR bit 6)
// // Define macros to simplify building of IOSP cmds //
//-------------------------------------------------------------- // // Define format of flow control commands // (sent from Host to Edgeport) // // 11001PPP FlowCmd FlowTypes // // Note that the 'FlowTypes' parameter is a bit mask; that is, // more than one flow control type can be active at the same time. // FlowTypes = 0 means 'no flow control'. //
// // IOSP_CMD_SET_RX_FLOW // // Tells Edgeport how it can stop incoming UART data // // Example for Port 0 // P0 = 11001000 // P1 = IOSP_CMD_SET_RX_FLOW // P2 = Bit mask as follows:
#define IOSP_RX_FLOW_RTS 0x01 // Edgeport drops RTS to stop incoming data #define IOSP_RX_FLOW_DTR 0x02 // Edgeport drops DTR to stop incoming data #define IOSP_RX_FLOW_DSR_SENSITIVITY 0x04 // Ignores Rx data unless DSR high
// Not currently implemented by firmware. #define IOSP_RX_FLOW_XON_XOFF 0x08 // Edgeport sends XOFF char to stop incoming data.
// Host must have previously programmed the // XON/XOFF values with SET_XON/SET_XOFF // before enabling this bit.
// // IOSP_CMD_SET_TX_FLOW // // Tells Edgeport what signal(s) will stop it from transmitting UART data // // Example for Port 0 // P0 = 11001000 // P1 = IOSP_CMD_SET_TX_FLOW // P2 = Bit mask as follows:
// Host must have previously programmed the // XON/XOFF values with SET_XON/SET_XOFF // before enabling this bit. #define IOSP_TX_FLOW_XOFF_CONTINUE 0x10 // If not set, Edgeport stops Tx when
// sending XOFF in order to fix broken // systems that interpret the next // received char as XON. // If set, Edgeport continues Tx // normally after transmitting XOFF. // Not currently implemented by firmware. #define IOSP_TX_TOGGLE_RTS 0x20 // Edgeport drives RTS as a true half-duplex
// Request-to-Send signal: it is raised before // beginning transmission and lowered after // the last Tx char leaves the UART. // Not currently implemented by firmware.
// // IOSP_CMD_SET_XON_CHAR // // Sets the character which Edgeport transmits/interprets as XON. // Note: This command MUST be sent before sending a SET_RX_FLOW or // SET_TX_FLOW with the XON_XOFF bit set. // // Example for Port 0 // P0 = 11001000 // P1 = IOSP_CMD_SET_XON_CHAR // P2 = 0x11
// // IOSP_CMD_SET_XOFF_CHAR // // Sets the character which Edgeport transmits/interprets as XOFF. // Note: This command must be sent before sending a SET_RX_FLOW or // SET_TX_FLOW with the XON_XOFF bit set. // // Example for Port 0 // P0 = 11001000 // P1 = IOSP_CMD_SET_XOFF_CHAR // P2 = 0x13
// // IOSP_CMD_RX_CHECK_REQ // // This command is used to assist in the implementation of the // IOCTL_SERIAL_PURGE Windows IOCTL. // This IOSP command tries to place a marker at the end of the RX // queue in the Edgeport. If the Edgeport RX queue is full then // the Check will be discarded. // It is up to the device driver to timeout waiting for the // RX_CHECK_RSP. If a RX_CHECK_RSP is received, the driver is // sure that all data has been received from the edgeport and // may now purge any internal RX buffers. // Note tat the sequence numbers may be used to detect lost // CHECK_REQs.
// Example for Port 0 // P0 = 11001000 // P1 = IOSP_CMD_RX_CHECK_REQ // P2 = Sequence number
// Response will be: // P1 = IOSP_EXT_RX_CHECK_RSP // P2 = Request Sequence number
//-------------------------------------------------------------- // // Define values for status and status parameters // (received by Host from Edgeport) // // 1ssssPPP P1P1P1P1 [ P2P2P2P2P2 ]... // // ssss: 00-07 2-byte status. ssss identifies which UART register // has changed value, and the new value is in P1. // Note that the ssss values do not correspond to the // 16554 register numbers given in 16554.H. Instead, // see below for definitions of the ssss numbers // used in this status message. // // 08-0B 3-byte status: ==== P1 ==== ==== P2 ==== // 08 LSR_DATA: New LSR Errored byte // 09 1-param responses Response Code Param // 0A OPEN_RSP: InitialMsr TxBufferSize // 0B available for expansion // // 0C-0D 4-byte status. P1 = extended status code and P2,P3 = params // Not currently implemented. // // 0E-0F N-byte status: P1 = num bytes after P1 (ie, TotalLen - 2) // P2 = extended status, P3..Pn = parameters. // Not currently implemented. //
#define IOSP_STATUS_LSR 0x00 // P1 is new value of LSR register.
// Bits defined in 16554.H. Edgeport // returns this in order to report // line status errors (overrun, // parity, framing, break). This form // is used when a errored receive data // character was NOT present in the // UART when the LSR error occurred // (ie, when LSR bit 0 = 0).
#define IOSP_STATUS_MSR 0x01 // P1 is new value of MSR register.
// Bits defined in 16554.H. Edgeport // returns this in order to report // changes in modem status lines // (CTS, DSR, RI, CD) //
#define IOSP_STATUS_LSR_DATA 0x08 // P1 is new value of LSR register (same as STATUS_LSR)
// P2 is errored character read from // RxFIFO after LSR reported an error.
#define IOSP_EXT_STATUS 0x09 // P1 is status/response code, param in P2.
// Response Codes (P1 values) for 3-byte status messages
#define IOSP_EXT_STATUS_CHASE_RSP 0// Reply to CHASE_PORT cmd. P2 is outcome: #define IOSP_EXT_STATUS_CHASE_PASS 0// P2 = 0: All Tx data drained successfully #define IOSP_EXT_STATUS_CHASE_FAIL 1// P2 = 1: Timed out (stuck due to flow
// control from remote device).
#define IOSP_EXT_STATUS_RX_CHECK_RSP 1// Reply to RX_CHECK cmd. P2 is sequence number
#define IOSP_STATUS_OPEN_RSP 0x0A // Reply to OPEN_PORT cmd.
// P1 is Initial MSR value // P2 is encoded TxBuffer Size: // TxBufferSize = (P2 + 1) * 64
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