/* * Disable the Watchdog timer before setting * new time out.
*/
ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
DA9052_CONTROLD_TWDSCALE, 0); if (ret < 0) {
dev_err(da9052->dev, "Failed to disable watchdog bit, %d\n",
ret); return ret;
} if (timeout) { /* * To change the timeout, da9052 needs to * be disabled for at least 150 us.
*/
udelay(150);
/* Set the desired timeout */ for (i = 0; i < ARRAY_SIZE(da9052_wdt_maps); i++) if (da9052_wdt_maps[i].time == timeout) break;
if (i == ARRAY_SIZE(da9052_wdt_maps))
ret = -EINVAL; else
ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
DA9052_CONTROLD_TWDSCALE,
da9052_wdt_maps[i].reg_val); if (ret < 0) {
dev_err(da9052->dev, "Failed to update timescale bit, %d\n", ret); return ret;
}
/* * We have a minimum time for watchdog window called TWDMIN. A write * to the watchdog before this elapsed time should cause an error.
*/
msec = (jnow - driver_data->jpast) * 1000/HZ; if (msec < DA9052_TWDMIN)
mdelay(msec);
/* Reset the watchdog timer */
ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
DA9052_CONTROLD_WATCHDOG, 1 << 7); if (ret < 0) return ret;
/* * FIXME: Reset the watchdog core, in general PMIC * is supposed to do this
*/ return da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
DA9052_CONTROLD_WATCHDOG, 0 << 7);
}
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