/** * struct ad_sigma_delta_info - Sigma Delta driver specific callbacks and options * @set_channel: Will be called to select the current channel, may be NULL. * @append_status: Will be called to enable status append at the end of the sample, may be NULL. * @set_mode: Will be called to select the current mode, may be NULL. * @disable_all: Will be called to disable all channels, may be NULL. * @disable_one: Will be called to disable a single channel after * ad_sigma_delta_single_conversion(), may be NULL. * Usage of this callback expects iio_chan_spec.address to contain * the value required for the driver to identify the channel. * @postprocess_sample: Is called for each sampled data word, can be used to * modify or drop the sample data, it, may be NULL. * @has_registers: true if the device has writable and readable registers, false * if there is just one read-only sample data shift register. * @has_named_irqs: Set to true if there is more than one IRQ line. * @supports_spi_offload: Set to true if the driver supports SPI offload. Often * special considerations are needed for scan_type and other channel * info, so individual drivers have to set this to let the core * code know that it can use SPI offload if it is available. * @addr_shift: Shift of the register address in the communications register. * @read_mask: Mask for the communications register having the read bit set. * @status_ch_mask: Mask for the channel number stored in status register. * @data_reg: Address of the data register, if 0 the default address of 0x3 will * be used. * @irq_flags: flags for the interrupt used by the triggered buffer * @num_slots: Number of sequencer slots * @num_resetclks: Number of SPI clk cycles with MOSI=1 to reset the chip.
*/ struct ad_sigma_delta_info { int (*set_channel)(struct ad_sigma_delta *, unsignedint channel); int (*append_status)(struct ad_sigma_delta *, bool append); int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode); int (*disable_all)(struct ad_sigma_delta *); int (*disable_one)(struct ad_sigma_delta *, unsignedint chan); int (*postprocess_sample)(struct ad_sigma_delta *, unsignedint raw_sample); bool has_registers; bool has_named_irqs; bool supports_spi_offload; unsignedint addr_shift; unsignedint read_mask; unsignedint status_ch_mask; unsignedint data_reg; unsignedlong irq_flags; unsignedint num_slots; unsignedint num_resetclks;
};
/** * struct ad_sigma_delta - Sigma Delta device struct * @spi: The spi device associated with the Sigma Delta device. * @trig: The IIO trigger associated with the Sigma Delta device. * * Most of the fields are private to the sigma delta library code and should not * be accessed by individual drivers.
*/ struct ad_sigma_delta { struct spi_device *spi; struct iio_trigger *trig;
/* private: */ struct completion completion;
spinlock_t irq_lock; /* protects .irq_dis and irq en/disable state */ bool irq_dis;
bool bus_locked; bool keep_cs_asserted;
u8 comm;
conststruct ad_sigma_delta_info *info; unsignedint active_slots; unsignedint current_slot; unsignedint num_slots; struct gpio_desc *rdy_gpiod; int irq_line; bool status_appended; /* map slots to channels in order to know what to expect from devices */ unsignedint *slots; struct spi_message sample_msg; struct spi_transfer sample_xfer[2];
u8 *samples_buf; struct spi_offload *offload; struct spi_offload_trigger *offload_trigger;
/* * DMA (thus cache coherency maintenance) requires the * transfer buffers to live in their own cache lines. * 'tx_buf' is up to 32 bits. * 'rx_buf' is up to 32 bits per sample + 64 bit timestamp, * rounded to 16 bytes to take into account padding.
*/
u8 tx_buf[4] __aligned(IIO_DMA_MINALIGN);
u8 rx_buf[16] __aligned(8);
u8 sample_addr;
};
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