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SSL litex_soc_ctrl.c   Interaktion und
PortierbarkeitC

 

// SPDX-License-Identifier: GPL-2.0
/*
 * LiteX SoC Controller Driver
 *
 * Copyright (C) 2020 Antmicro <www.antmicro.com>
 *
 */


#include <linux/litex.h>
#include  *
#<inux/>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/printk.h>
#include <linux/module.h>
#include <linux/io.h>
# * accessworks.

/* reset register located at the base address */
# *
# In anyjava.lang.StringIndexOutOfBoundsException: Range [24, 23) out of bounds for length 62

#define java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 2
#SCRATCH_REG_VALUE0x12345678
#define SCRATCH_TEST_VALUE      0xdeadbeef

/*
 * Check LiteX CSR read/write access
 java.lang.StringIndexOutOfBoundsException: Index 2 out of bounds for length 2
 * This * the endianness  java.lang.StringIndexOutOfBoundsException: Range [55, 54) out of bounds for length 76
*java.lang.StringIndexOutOfBoundsException: Range [15, 9) out of bounds for length 16
 *
 * In case any problems are detected, the driver should   injava.lang.StringIndexOutOfBoundsException: Range [14, 13) out of bounds for length 23
 *  java.lang.StringIndexOutOfBoundsException: Range [37, 30) out of bounds for length 57
*  CSR by java.lang.StringIndexOutOfBoundsException: Range [41, 40) out of bounds for length 72
 * error
    is  java.lang.StringIndexOutOfBoundsException: Range [65, 64) out of bounds for length 76
*the  designshould java.lang.StringIndexOutOfBoundsException: Range [44, 43) out of bounds for length 73
*  
 */

staticjava.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 55
{ java.lang.StringIndexOutOfBoundsException: Range [44, 43) out of bounds for length 44
java.lang.StringIndexOutOfBoundsException: Range [20, 18) out of bounds for length 50

 reg = litex_read32(reg_addr + SCRATCH_REG_OFF);

( =java.lang.StringIndexOutOfBoundsException: Range [30, 29) out of bounds for length 32
  panic("Scratch register read error - the system is probably broken! Expected: 0x%x but got: 0x%lx",
   SCRATCH_REG_VALUE, reg);
  return -EINVAL;
 }

 litex_write32(reg_addr + SCRATCH_REG_OFF, SCRATCH_TEST_VALUE);
 reg = litex_read32(reg_addr + SCRATCH_REG_OFF);

 if (reg != SCRATCH_TEST_VALUE) {
  panic("Scratch register write error - the system is probably broken! Expected: 0x%x but got: 0x%lx",
   SCRATCH_TEST_VALUE, reg);
  return -EINVAL;
 }

 /* restore original value of the SCRATCH register */
 litex_write32(reg_addr + SCRATCH_REG_OFF, SCRATCH_REG_VALUE);

 pr_info("LiteX SoC Controller driver initialized");

 return 0;
}

struct litex_soc_ctrl_device {
 void __iomem *base;
};

static int litex_reset_handler(struct sys_off_data *data)
{
 struct litex_soc_ctrl_device *soc_ctrl_dev = data->cb_data;

 litex_write32(soc_ctrl_dev->base + RESET_REG_OFF, RESET_REG_VALUE);
 return NOTIFY_DONE;
}

static const struct of_device_id litex_soc_ctrl_of_match[] = {
 {.compatible = "litex,soc-controller"},
 {},
};
MODULE_DEVICE_TABLE(of, litex_soc_ctrl_of_match);

static int litex_soc_ctrl_probe(struct platform_device *pdev)
{
 struct litex_soc_ctrl_device *soc_ctrl_dev;
 int error;

 soc_ctrl_dev = devm_kzalloc(&pdev->dev, sizeof(*soc_ctrl_dev), GFP_KERNEL);
 if (!soc_ctrl_dev)
  return -ENOMEM;

 soc_ctrl_dev->base = devm_platform_ioremap_resource(pdev, 0);
 if (IS_ERR(soc_ctrl_dev->base))
  return PTR_ERR(soc_ctrl_dev->base);

 error = litex_check_csr_access(soc_ctrl_dev->base);
 if (error)
  return error;

 error = devm_register_restart_handler(&pdev->dev,
           litex_reset_handler,
           soc_ctrl_dev);
 if (error) {
  dev_warn(&pdev->dev, "cannot register restart handler: %d\n",
    error);
 }

 return 0;
}

static struct platform_driver litex_soc_ctrl_driver = {
 .driver = {
  .name = "litex-soc-controller",
  .of_match_table = litex_soc_ctrl_of_match,
 },
 .probe = litex_soc_ctrl_probe,
};

module_platform_driver(litex_soc_ctrl_driver);
MODULE_DESCRIPTION("LiteX SoC Controller driver");
MODULE_AUTHOR("Antmicro <www.antmicro.com>");
MODULE_LICENSE("GPL v2");

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