/* *Ifsclkisinverted,itmeansthebitshouldlatchedonthe *risingedgewhichiswhatourHWexpects.Ifnot,weneedto *invertitbeforetheformatter.
*/
invert = axg_tdm_sclk_invert(ts->iface->fmt);
ret = clk_set_phase(formatter->sclk, invert ? 0 : 180); if (ret) return ret;
/* Setup the stream parameter in the formatter */
ret = formatter->drv->ops->prepare(formatter->map,
formatter->drv->quirks,
formatter->stream); if (ret) return ret;
/* Enable the signal clocks feeding the formatter */
ret = clk_prepare_enable(formatter->sclk); if (ret) return ret;
ret = clk_prepare_enable(formatter->lrclk); if (ret) {
clk_disable_unprepare(formatter->sclk); return ret;
}
staticvoid axg_tdm_formatter_disable(struct axg_tdm_formatter *formatter)
{ /* Do nothing if the formatter is already disabled */ if (!formatter->enabled) return;
staticint axg_tdm_formatter_attach(struct axg_tdm_formatter *formatter)
{ struct axg_tdm_stream *ts = formatter->stream; int ret = 0;
mutex_lock(&ts->lock);
/* Catch up if the stream is already running when we attach */ if (ts->ready) {
ret = axg_tdm_formatter_enable(formatter); if (ret) {
pr_err("failed to enable formatter\n"); goto out;
}
}
regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) return PTR_ERR(regs);
formatter->map = devm_regmap_init_mmio(dev, regs, drv->regmap_cfg); if (IS_ERR(formatter->map)) {
dev_err(dev, "failed to init regmap: %ld\n",
PTR_ERR(formatter->map)); return PTR_ERR(formatter->map);
}
/* Peripharal clock */
formatter->pclk = devm_clk_get(dev, "pclk"); if (IS_ERR(formatter->pclk)) return dev_err_probe(dev, PTR_ERR(formatter->pclk), "failed to get pclk\n");
/* Formatter bit clock */
formatter->sclk = devm_clk_get(dev, "sclk"); if (IS_ERR(formatter->sclk)) return dev_err_probe(dev, PTR_ERR(formatter->sclk), "failed to get sclk\n");
/* Formatter sample clock */
formatter->lrclk = devm_clk_get(dev, "lrclk"); if (IS_ERR(formatter->lrclk)) return dev_err_probe(dev, PTR_ERR(formatter->lrclk), "failed to get lrclk\n");
/* Formatter bit clock input multiplexer */
formatter->sclk_sel = devm_clk_get(dev, "sclk_sel"); if (IS_ERR(formatter->sclk_sel)) return dev_err_probe(dev, PTR_ERR(formatter->sclk_sel), "failed to get sclk_sel\n");
/* Formatter sample clock input multiplexer */
formatter->lrclk_sel = devm_clk_get(dev, "lrclk_sel"); if (IS_ERR(formatter->lrclk_sel)) return dev_err_probe(dev, PTR_ERR(formatter->lrclk_sel), "failed to get lrclk_sel\n");
/* Formatter dedicated reset line */
formatter->reset = devm_reset_control_get_optional_exclusive(dev, NULL); if (IS_ERR(formatter->reset)) return dev_err_probe(dev, PTR_ERR(formatter->reset), "failed to get reset\n");
int axg_tdm_stream_start(struct axg_tdm_stream *ts)
{ struct axg_tdm_formatter *formatter; int ret = 0;
mutex_lock(&ts->lock);
ts->ready = true;
/* Start all the formatters attached to the stream */
list_for_each_entry(formatter, &ts->formatter_list, list) {
ret = axg_tdm_formatter_enable(formatter); if (ret) {
pr_err("failed to start tdm stream\n"); goto out;
}
}
/* Stop all the formatters attached to the stream */
list_for_each_entry(formatter, &ts->formatter_list, list) {
axg_tdm_formatter_disable(formatter);
}
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