/* * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation. * * This code is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * version 2 for more details (a copy is included in the LICENSE file that * accompanied this code). * * You should have received a copy of the GNU General Public License version * 2 along with this work; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. * * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA * or visit www.oracle.com if you need additional information or have any * questions. *
*/
// output_h.cpp - Class HPP file output routines for architecture definition #include"adlc.hpp"
// The comment delimiter used in format statements after assembler instructions. #ifdefined(PPC64) #define commentSeperator "\t//" #else #define commentSeperator "!" #endif
// Generate the #define that describes the number of registers. staticvoid defineRegCount(FILE *fp, RegisterForm *registers) { if (registers) { int regCount = AdlcVMDeps::Physical + registers->_rdefs.count();
fprintf(fp,"\n");
fprintf(fp,"// the number of reserved registers + machine registers.\n");
fprintf(fp,"#define REG_COUNT %d\n", regCount);
}
}
// Output enumeration of machine register numbers // (1) // // Enumerate machine registers starting after reserved regs. // // in the order of occurrence in the register block. // enum MachRegisterNumbers { // EAX_num = 0, // ... // _last_Mach_Reg // } void ArchDesc::buildMachRegisterNumbers(FILE *fp_hpp) { if (_register) {
RegDef *reg_def = NULL;
// Output a #define for the number of machine registers
defineRegCount(fp_hpp, _register);
// Count all the Save_On_Entry and Always_Save registers int saved_on_entry = 0; int c_saved_on_entry = 0;
_register->reset_RegDefs(); while( (reg_def = _register->iter_RegDefs()) != NULL ) { if( strcmp(reg_def->_callconv,"SOE") == 0 ||
strcmp(reg_def->_callconv,"AS") == 0 ) ++saved_on_entry; if( strcmp(reg_def->_c_conv,"SOE") == 0 ||
strcmp(reg_def->_c_conv,"AS") == 0 ) ++c_saved_on_entry;
}
fprintf(fp_hpp, "\n");
fprintf(fp_hpp, "// the number of save_on_entry + always_saved registers.\n");
fprintf(fp_hpp, "#define MAX_SAVED_ON_ENTRY_REG_COUNT %d\n", max(saved_on_entry,c_saved_on_entry));
fprintf(fp_hpp, "#define SAVED_ON_ENTRY_REG_COUNT %d\n", saved_on_entry);
fprintf(fp_hpp, "#define C_SAVED_ON_ENTRY_REG_COUNT %d\n", c_saved_on_entry);
// (1) // Build definition for enumeration of register numbers
fprintf(fp_hpp, "\n");
fprintf(fp_hpp, "// Enumerate machine register numbers starting after reserved regs.\n");
fprintf(fp_hpp, "// in the order of occurrence in the register block.\n");
fprintf(fp_hpp, "enum MachRegisterNumbers {\n");
// Output the register number for each register in the allocation classes
_register->reset_RegDefs(); int i = 0; while( (reg_def = _register->iter_RegDefs()) != NULL ) {
fprintf(fp_hpp," %s_num,", reg_def->_regname); for (int j = 0; j < 20-(int)strlen(reg_def->_regname); j++) fprintf(fp_hpp, " ");
fprintf(fp_hpp," // enum %3d, regnum %3d, reg encode %3s\n",
i++,
reg_def->register_num(),
reg_def->register_encode());
} // Finish defining enumeration
fprintf(fp_hpp, " _last_Mach_Reg // %d\n", i);
fprintf(fp_hpp, "};\n");
}
fprintf(fp_hpp, "\n// Size of register-mask in ints\n");
fprintf(fp_hpp, "#define RM_SIZE %d\n", RegisterForm::RegMask_Size());
fprintf(fp_hpp, "// Unroll factor for loops over the data in a RegMask\n");
fprintf(fp_hpp, "#define FORALL_BODY "); int len = RegisterForm::RegMask_Size(); for( int i = 0; i < len; i++ )
fprintf(fp_hpp, "BODY(%d) ",i);
fprintf(fp_hpp, "\n\n");
fprintf(fp_hpp,"class RegMask;\n"); // All RegMasks are declared "extern const ..." in ad_<arch>.hpp // fprintf(fp_hpp,"extern RegMask STACK_OR_STACK_SLOTS_mask;\n\n");
}
// Output enumeration of machine register encodings // (2) // // Enumerate machine registers starting after reserved regs. // // in the order of occurrence in the alloc_class(es). // enum MachRegisterEncodes { // EAX_enc = 0x00, // ... // } void ArchDesc::buildMachRegisterEncodes(FILE *fp_hpp) { if (_register) {
RegDef *reg_def = NULL;
RegDef *reg_def_next = NULL;
// (2) // Build definition for enumeration of encode values
fprintf(fp_hpp, "\n");
fprintf(fp_hpp, "// Enumerate machine registers starting after reserved regs.\n");
fprintf(fp_hpp, "// in the order of occurrence in the alloc_class(es).\n");
fprintf(fp_hpp, "enum MachRegisterEncodes {\n");
// Find max enum string length.
size_t maxlen = 0;
_register->reset_RegDefs();
reg_def = _register->iter_RegDefs(); while (reg_def != NULL) {
size_t len = strlen(reg_def->_regname); if (len > maxlen) maxlen = len;
reg_def = _register->iter_RegDefs();
}
// Output the register encoding for each register in the allocation classes
_register->reset_RegDefs();
reg_def_next = _register->iter_RegDefs(); while( (reg_def = reg_def_next) != NULL ) {
reg_def_next = _register->iter_RegDefs();
fprintf(fp_hpp," %s_enc", reg_def->_regname); for (size_t i = strlen(reg_def->_regname); i < maxlen; i++) fprintf(fp_hpp, " ");
fprintf(fp_hpp," = %3s%s\n", reg_def->register_encode(), reg_def_next == NULL? "" : "," );
} // Finish defining enumeration
fprintf(fp_hpp, "};\n");
} // Done with register form
}
// Declare an array containing the machine register names, strings. staticvoid declareRegNames(FILE *fp, RegisterForm *registers) { if (registers) { // fprintf(fp,"\n"); // fprintf(fp,"// An array of character pointers to machine register names.\n"); // fprintf(fp,"extern const char *regName[];\n");
}
}
// Declare an array containing the machine register sizes in 32-bit words. void ArchDesc::declareRegSizes(FILE *fp) { // regSize[] is not used
}
// Declare an array containing the machine register encoding values staticvoid declareRegEncodes(FILE *fp, RegisterForm *registers) { if (registers) { // // // // fprintf(fp,"\n"); // fprintf(fp,"// An array containing the machine register encode values\n"); // fprintf(fp,"extern const char regEncode[];\n");
}
}
// generate parameters for constants
uint i = 0;
Component *comp;
lst.reset(); if ((comp = lst.iter()) == NULL) {
assert(num_consts == 1, "Bad component list detected.\n"); switch( constant_type ) { case Form::idealI : {
fprintf(fp,is_ideal_bool ? "BoolTest::mask c%d" : "int32_t c%d", i); break;
} case Form::idealN : { fprintf(fp,"const TypeNarrowOop *c%d", i); break; } case Form::idealNKlass : { fprintf(fp,"const TypeNarrowKlass *c%d", i); break; } case Form::idealP : { fprintf(fp,"const TypePtr *c%d", i); break; } case Form::idealL : { fprintf(fp,"jlong c%d", i); break; } case Form::idealF : { fprintf(fp,"jfloat c%d", i); break; } case Form::idealD : { fprintf(fp,"jdouble c%d", i); break; } default:
assert(!is_ideal_bool, "Non-constant operand lacks component list."); break;
}
} // end if NULL else {
lst.reset(); while((comp = lst.iter()) != NULL) { if (!strcmp(comp->base_type(globals), "ConI")) { if (i > 0) fprintf(fp,", ");
fprintf(fp,"int32_t c%d", i);
i++;
} elseif (!strcmp(comp->base_type(globals), "ConP")) { if (i > 0) fprintf(fp,", ");
fprintf(fp,"const TypePtr *c%d", i);
i++;
} elseif (!strcmp(comp->base_type(globals), "ConN")) { if (i > 0) fprintf(fp,", ");
fprintf(fp,"const TypePtr *c%d", i);
i++;
} elseif (!strcmp(comp->base_type(globals), "ConNKlass")) { if (i > 0) fprintf(fp,", ");
fprintf(fp,"const TypePtr *c%d", i);
i++;
} elseif (!strcmp(comp->base_type(globals), "ConL")) { if (i > 0) fprintf(fp,", ");
fprintf(fp,"jlong c%d", i);
i++;
} elseif (!strcmp(comp->base_type(globals), "ConF")) { if (i > 0) fprintf(fp,", ");
fprintf(fp,"jfloat c%d", i);
i++;
} elseif (!strcmp(comp->base_type(globals), "ConD")) { if (i > 0) fprintf(fp,", ");
fprintf(fp,"jdouble c%d", i);
i++;
} elseif (!strcmp(comp->base_type(globals), "Bool")) { if (i > 0) fprintf(fp,", ");
fprintf(fp,"BoolTest::mask c%d", i);
i++;
}
}
} // finish line (1) and start line (2)
fprintf(fp,") : "); // generate initializers for constants
i = 0;
fprintf(fp,"_c%d(c%d)", i, i); for( i = 1; i < num_consts; ++i) {
fprintf(fp,", _c%d(c%d)", i, i);
} // The body for the constructor is empty
fprintf(fp," {}\n");
}
// --------------------------------------------------------------------------- // Utilities to generate format rules for machine operands and instructions // ---------------------------------------------------------------------------
// Generate the format rule for an operand void gen_oper_format(FILE *fp, FormDict &globals, OperandForm &oper, bool for_c_file = false) { if (!for_c_file) { // invoked after output #ifndef PRODUCT to ad_<arch>.hpp // compile the bodies separately, to cut down on recompilations
fprintf(fp," virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;\n");
fprintf(fp," virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const;\n"); return;
}
// Local pointer indicates remaining part of format rule int idx = 0; // position of operand in match rule
// Generate internal format function, used when stored locally
fprintf(fp, "\n#ifndef PRODUCT\n");
fprintf(fp,"void %sOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {\n", oper._ident); // Generate the user-defined portion of the format if (oper._format) { if ( oper._format->_strings.count() != 0 ) { // No initialization code for int_format
// Build the format from the entries in strings and rep_vars constchar *string = NULL;
oper._format->_rep_vars.reset();
oper._format->_strings.reset(); while ( (string = oper._format->_strings.iter()) != NULL ) {
// Check if this is a standard string or a replacement variable if ( string != NameList::_signal ) { // Normal string // Pass through to st->print
fprintf(fp," st->print_raw(\"%s\");\n", string);
} else { // Replacement variable constchar *rep_var = oper._format->_rep_vars.iter(); // Check that it is a local name, and an operand const Form* form = oper._localNames[rep_var]; if (form == NULL) {
globalAD->syntax_err(oper._linenum, "\'%s\' not found in format for %s\n", rep_var, oper._ident);
assert(form, "replacement variable was not found in local names");
}
OperandForm *op = form->is_operand(); // Get index if register or constant if ( op->_matrule && op->_matrule->is_base_register(globals) ) {
idx = oper.register_position( globals, rep_var);
} elseif (op->_matrule && op->_matrule->is_base_constant(globals)) {
idx = oper.constant_position( globals, rep_var);
} else {
idx = 0;
}
// output invocation of "$..."s format function if ( op != NULL ) op->int_format(fp, globals, idx);
if ( idx == -1 ) {
fprintf(stderr, "Using a name, %s, that isn't in match rule\n", rep_var);
assert( strcmp(op->_ident,"label")==0, "Unimplemented");
}
} // Done with a replacement variable
} // Done with all format strings
} else { // Default formats for base operands (RegI, RegP, ConI, ConP, ...)
oper.int_format(fp, globals, 0);
}
} else { // oper._format == NULL // Provide a few special case formats where the AD writer cannot. if ( strcmp(oper._ident,"Universe")==0 ) {
fprintf(fp, " st->print(\"$$univ\");\n");
} // labelOper::int_format is defined in ad_<...>.cpp
} // ALWAYS! Provide a special case output for condition codes. if( oper.is_ideal_bool() ) {
defineCCodeDump(&oper, fp,0);
}
fprintf(fp,"}\n");
// Generate external format function, when data is stored externally
fprintf(fp,"void %sOper::ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const {\n", oper._ident); // Generate the user-defined portion of the format if (oper._format) { if ( oper._format->_strings.count() != 0 ) {
// Check for a replacement string "$..." if ( oper._format->_rep_vars.count() != 0 ) { // Initialization code for ext_format
}
// Build the format from the entries in strings and rep_vars constchar *string = NULL;
oper._format->_rep_vars.reset();
oper._format->_strings.reset(); while ( (string = oper._format->_strings.iter()) != NULL ) {
// Check if this is a standard string or a replacement variable if ( string != NameList::_signal ) { // Normal string // Pass through to st->print
fprintf(fp," st->print_raw(\"%s\");\n", string);
} else { // Replacement variable constchar *rep_var = oper._format->_rep_vars.iter(); // Check that it is a local name, and an operand const Form* form = oper._localNames[rep_var]; if (form == NULL) {
globalAD->syntax_err(oper._linenum, "\'%s\' not found in format for %s\n", rep_var, oper._ident);
assert(form, "replacement variable was not found in local names");
}
OperandForm *op = form->is_operand(); // Get index if register or constant if ( op->_matrule && op->_matrule->is_base_register(globals) ) {
idx = oper.register_position( globals, rep_var);
} elseif (op->_matrule && op->_matrule->is_base_constant(globals)) {
idx = oper.constant_position( globals, rep_var);
} else {
idx = 0;
} // output invocation of "$..."s format function if ( op != NULL ) op->ext_format(fp, globals, idx);
// Lookup the index position of the replacement variable
idx = oper._components.operand_position_format(rep_var, &oper); if ( idx == -1 ) {
fprintf(stderr, "Using a name, %s, that isn't in match rule\n", rep_var);
assert( strcmp(op->_ident,"label")==0, "Unimplemented");
}
} // Done with a replacement variable
} // Done with all format strings
} else { // Default formats for base operands (RegI, RegP, ConI, ConP, ...)
oper.ext_format(fp, globals, 0);
}
} else { // oper._format == NULL // Provide a few special case formats where the AD writer cannot. if ( strcmp(oper._ident,"Universe")==0 ) {
fprintf(fp, " st->print(\"$$univ\");\n");
} // labelOper::ext_format is defined in ad_<...>.cpp
} // ALWAYS! Provide a special case output for condition codes. if( oper.is_ideal_bool() ) {
defineCCodeDump(&oper, fp,0);
}
fprintf(fp, "}\n");
fprintf(fp, "#endif\n");
}
// Generate the format rule for an instruction void gen_inst_format(FILE *fp, FormDict &globals, InstructForm &inst, bool for_c_file = false) { if (!for_c_file) { // compile the bodies separately, to cut down on recompilations // #ifndef PRODUCT region generated by caller
fprintf(fp," virtual void format(PhaseRegAlloc *ra, outputStream *st) const;\n"); return;
}
// Define the format function
fprintf(fp, "#ifndef PRODUCT\n");
fprintf(fp, "void %sNode::format(PhaseRegAlloc *ra, outputStream *st) const {\n", inst._ident);
// Generate the user-defined portion of the format if( inst._format ) { // If there are replacement variables, // Generate index values needed for determining the operand position if( inst._format->_rep_vars.count() )
inst.index_temps(fp, globals);
// Build the format from the entries in strings and rep_vars constchar *string = NULL;
inst._format->_rep_vars.reset();
inst._format->_strings.reset(); while( (string = inst._format->_strings.iter()) != NULL ) {
fprintf(fp," "); // Check if this is a standard string or a replacement variable if( string == NameList::_signal ) { // Replacement variable constchar* rep_var = inst._format->_rep_vars.iter();
inst.rep_var_format( fp, rep_var);
} elseif( string == NameList::_signal3 ) { // Replacement variable in raw text constchar* rep_var = inst._format->_rep_vars.iter(); const Form *form = inst._localNames[rep_var]; if (form == NULL) {
fprintf(stderr, "unknown replacement variable in format statement: '%s'\n", rep_var);
assert(false, "ShouldNotReachHere()");
}
OpClassForm *opc = form->is_opclass();
assert( opc, "replacement variable was not found in local names"); // Lookup the index position of the replacement variable int idx = inst.operand_position_format(rep_var); if ( idx == -1 ) {
assert( strcmp(opc->_ident,"label")==0, "Unimplemented");
assert( false, "ShouldNotReachHere()");
}
if (inst.is_noninput_operand(idx)) {
assert( false, "ShouldNotReachHere()");
} else { // Output the format call for this operand
fprintf(fp,"opnd_array(%d)",idx);
}
rep_var = inst._format->_rep_vars.iter();
inst._format->_strings.iter(); if ( strcmp(rep_var,"$constant") == 0 && opc->is_operand()) {
Form::DataType constant_type = form->is_operand()->is_base_constant(globals); if ( constant_type == Form::idealD ) {
fprintf(fp,"->constantD()");
} elseif ( constant_type == Form::idealF ) {
fprintf(fp,"->constantF()");
} elseif ( constant_type == Form::idealL ) {
fprintf(fp,"->constantL()");
} else {
fprintf(fp,"->constant()");
}
} elseif ( strcmp(rep_var,"$cmpcode") == 0) {
fprintf(fp,"->ccode()");
} else {
assert( false, "ShouldNotReachHere()");
}
} elseif( string == NameList::_signal2 ) // Raw program text
fputs(inst._format->_strings.iter(), fp); else
fprintf(fp,"st->print_raw(\"%s\");\n", string);
} // Done with all format strings
} // Done generating the user-defined portion of the format
// Add call debug info automatically
Form::CallType call_type = inst.is_ideal_call(); if( call_type != Form::invalid_type ) { switch( call_type ) { case Form::JAVA_DYNAMIC:
fprintf(fp," _method->print_short_name(st);\n"); break; case Form::JAVA_STATIC:
fprintf(fp," if( _method ) _method->print_short_name(st);\n");
fprintf(fp," else st->print(\" wrapper for: %%s\", _name);\n");
fprintf(fp," if( !_method ) dump_trap_args(st);\n"); break; case Form::JAVA_COMPILED: case Form::JAVA_INTERP: break; case Form::JAVA_RUNTIME: case Form::JAVA_LEAF: case Form::JAVA_NATIVE:
fprintf(fp," st->print(\" %%s\", _name);"); break; default:
assert(0,"ShouldNotReachHere");
}
fprintf(fp, " st->cr();\n" );
fprintf(fp, " if (_jvms) _jvms->format(ra, this, st); else st->print_cr(\" No JVM State Info\");\n" );
fprintf(fp, " st->print(\"# \");\n" );
fprintf(fp, " if( _jvms && _oop_map ) _oop_map->print_on(st);\n");
} elseif(inst.is_ideal_safepoint()) {
fprintf(fp, " st->print_raw(\"\");\n" );
fprintf(fp, " if (_jvms) _jvms->format(ra, this, st); else st->print_cr(\" No JVM State Info\");\n" );
fprintf(fp, " st->print(\"# \");\n" );
fprintf(fp, " if( _jvms && _oop_map ) _oop_map->print_on(st);\n");
} elseif( inst.is_ideal_if() ) {
fprintf(fp, " st->print(\" P=%%f C=%%f\",_prob,_fcnt);\n" );
} elseif( inst.is_ideal_mem() ) { // Print out the field name if available to improve readability
fprintf(fp, " if (ra->C->alias_type(adr_type())->field() != NULL) {\n");
fprintf(fp, " ciField* f = ra->C->alias_type(adr_type())->field();\n");
fprintf(fp, " st->print(\" %s Field: \");\n", commentSeperator);
fprintf(fp, " if (f->is_volatile())\n");
fprintf(fp, " st->print(\"volatile \");\n");
fprintf(fp, " f->holder()->name()->print_symbol_on(st);\n");
fprintf(fp, " st->print(\".\");\n");
fprintf(fp, " f->name()->print_symbol_on(st);\n");
fprintf(fp, " if (f->is_constant())\n");
fprintf(fp, " st->print(\" (constant)\");\n");
fprintf(fp, " } else {\n"); // Make sure 'Volatile' gets printed out
fprintf(fp, " if (ra->C->alias_type(adr_type())->is_volatile())\n");
fprintf(fp, " st->print(\"volatile!\");\n");
fprintf(fp, " }\n");
}
// Complete the definition of the format function
fprintf(fp, "}\n#endif\n");
}
void ArchDesc::declare_pipe_classes(FILE *fp_hpp) { if (!_pipeline) return;
//------------------------------declareClasses--------------------------------- // Construct the class hierarchy of MachNode classes from the instruction & // operand lists void ArchDesc::declareClasses(FILE *fp) {
// Declare an array containing the machine register names, strings.
declareRegNames(fp, _register);
// Declare an array containing the machine register encoding values
declareRegEncodes(fp, _register);
// Generate declarations for the total number of operands
fprintf(fp,"\n");
fprintf(fp,"// Total number of operands defined in architecture definition\n"); int num_operands = 0;
OperandForm *op; for (_operands.reset(); (op = (OperandForm*)_operands.iter()) != NULL; ) { // Ensure this is a machine-world instruction if (op->ideal_only()) continue;
++num_operands;
} int first_operand_class = num_operands;
OpClassForm *opc; for (_opclass.reset(); (opc = (OpClassForm*)_opclass.iter()) != NULL; ) { // Ensure this is a machine-world instruction if (opc->ideal_only()) continue;
++num_operands;
}
fprintf(fp,"#define FIRST_OPERAND_CLASS %d\n", first_operand_class);
fprintf(fp,"#define NUM_OPERANDS %d\n", num_operands);
fprintf(fp,"\n"); // Generate declarations for the total number of instructions
fprintf(fp,"// Total number of instructions defined in architecture definition\n");
fprintf(fp,"#define NUM_INSTRUCTIONS %d\n",instructFormCount());
// Generate Machine Classes for each operand defined in AD file
fprintf(fp,"\n");
fprintf(fp,"//----------------------------Declare classes derived from MachOper----------\n"); // Iterate through all operands
_operands.reset();
OperandForm *oper; for( ; (oper = (OperandForm*)_operands.iter()) != NULL;) { // Ensure this is a machine-world instruction if (oper->ideal_only() ) continue; // The declaration of labelOper is in machine-independent file: machnode if ( strcmp(oper->_ident,"label") == 0 ) continue; // The declaration of methodOper is in machine-independent file: machnode if ( strcmp(oper->_ident,"method") == 0 ) continue;
// Build class definition for this operand
fprintf(fp,"\n");
fprintf(fp,"class %sOper : public MachOper { \n",oper->_ident);
fprintf(fp,"private:\n"); // Operand definitions that depend upon number of input edges
{
uint num_edges = oper->num_edges(_globalNames); if( num_edges != 1 ) { // Use MachOper::num_edges() {return 1;}
fprintf(fp," virtual uint num_edges() const { return %d; }\n",
num_edges );
} if( num_edges > 0 ) {
in_RegMask(fp);
}
}
// Support storing constants inside the MachOper
declareConstStorage(fp,_globalNames,oper);
// Support storage of the condition codes if( oper->is_ideal_bool() ) {
fprintf(fp," virtual int ccode() const { \n");
fprintf(fp," switch (_c0) {\n");
fprintf(fp," case BoolTest::eq : return equal();\n");
fprintf(fp," case BoolTest::gt : return greater();\n");
fprintf(fp," case BoolTest::lt : return less();\n");
fprintf(fp," case BoolTest::ne : return not_equal();\n");
fprintf(fp," case BoolTest::le : return less_equal();\n");
fprintf(fp," case BoolTest::ge : return greater_equal();\n");
fprintf(fp," case BoolTest::overflow : return overflow();\n");
fprintf(fp," case BoolTest::no_overflow: return no_overflow();\n");
fprintf(fp," default : ShouldNotReachHere(); return 0;\n");
fprintf(fp," }\n");
fprintf(fp," };\n");
}
// Support storage of the condition codes if( oper->is_ideal_bool() ) {
fprintf(fp," virtual void negate() { \n");
fprintf(fp," _c0 = (BoolTest::mask)((int)_c0^0x4); \n");
fprintf(fp," };\n");
}
// Clone function
fprintf(fp," virtual MachOper *clone() const;\n");
// Support setting a spill offset into a constant operand. // We only support setting an 'int' offset, while in the // LP64 build spill offsets are added with an AddP which // requires a long constant. Thus we don't support spilling // in frames larger than 4Gig. if( oper->has_conI(_globalNames) ||
oper->has_conL(_globalNames) )
fprintf(fp, " virtual void set_con( jint c0 ) { _c0 = c0; }\n");
// virtual functions for encoding and format // fprintf(fp," virtual void encode() const {\n %s }\n", // (oper->_encrule)?(oper->_encrule->_encrule):""); // Check the interface type, and generate the correct query functions // encoding queries based upon MEMORY_INTER, REG_INTER, CONST_INTER.
// virtual function to look up ideal return type of machine instruction // // (1) virtual const Type *type() const { return .....; } // if ((oper->_matrule) && (oper->_matrule->_lChild == NULL) &&
(oper->_matrule->_rChild == NULL)) { unsignedint position = 0; constchar *opret, *opname, *optype;
oper->_matrule->base_operand(position,_globalNames,opret,opname,optype);
fprintf(fp," virtual const Type *type() const {"); constchar *type = getIdealType(optype); if( type != NULL ) {
Form::DataType data_type = oper->is_base_constant(_globalNames); // Check if we are an ideal pointer type if( data_type == Form::idealP || data_type == Form::idealN || data_type == Form::idealNKlass ) { // Return the ideal type we already have: <TypePtr *>
fprintf(fp," return _c0;");
} else { // Return the appropriate bottom type
fprintf(fp," return %s;", getIdealType(optype));
}
} else {
fprintf(fp," ShouldNotCallThis(); return Type::BOTTOM;");
}
fprintf(fp," }\n");
} else { // Check for user-defined stack slots, based upon sRegX
Form::DataType data_type = oper->is_user_name_for_sReg(); if( data_type != Form::none ){ constchar *type = NULL; switch( data_type ) { case Form::idealI: type = "TypeInt::INT"; break; case Form::idealP: type = "TypePtr::BOTTOM";break; case Form::idealF: type = "Type::FLOAT"; break; case Form::idealD: type = "Type::DOUBLE"; break; case Form::idealL: type = "TypeLong::LONG"; break; case Form::none: // fall through default:
assert( false, "No support for this type of stackSlot");
}
fprintf(fp," virtual const Type *type() const { return %s; } // stackSlotX\n", type);
}
}
// // virtual functions for defining the encoding interface. // // Access the linearized ideal register mask, // map to physical register encoding if ( oper->_matrule && oper->_matrule->is_base_register(_globalNames) ) { // Just use the default virtual 'reg' call
} elseif ( oper->ideal_to_sReg_type(oper->_ident) != Form::none ) { // Special handling for operand 'sReg', a Stack Slot Register. // Map linearized ideal register mask to stack slot number
fprintf(fp," virtual int reg(PhaseRegAlloc *ra_, const Node *node) const {\n");
fprintf(fp," return (int)OptoReg::reg2stack(ra_->get_reg_first(node));/* sReg */\n");
fprintf(fp," }\n");
fprintf(fp," virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const {\n");
fprintf(fp," return (int)OptoReg::reg2stack(ra_->get_reg_first(node->in(idx)));/* sReg */\n");
fprintf(fp," }\n");
}
// Output the operand specific access functions used by an enc_class // These are only defined when we want to override the default virtual func if (oper->_interface != NULL) {
fprintf(fp,"\n"); // Check if it is a Memory Interface if ( oper->_interface->is_MemInterface() != NULL ) {
MemInterface *mem_interface = oper->_interface->is_MemInterface(); constchar *base = mem_interface->_base; if( base != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "base", base);
} char *index = mem_interface->_index; if( index != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "index", index);
} constchar *scale = mem_interface->_scale; if( scale != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "scale", scale);
} constchar *disp = mem_interface->_disp; if( disp != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "disp", disp);
oper->disp_is_oop(fp, _globalNames);
} if( oper->stack_slots_only(_globalNames) ) { // should not call this:
fprintf(fp," virtual int constant_disp() const { return Type::OffsetBot; }");
} elseif ( disp != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "constant_disp", disp);
}
} // end Memory Interface // Check if it is a Conditional Interface elseif (oper->_interface->is_CondInterface() != NULL) {
CondInterface *cInterface = oper->_interface->is_CondInterface(); constchar *equal = cInterface->_equal; if( equal != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "equal", equal);
} constchar *not_equal = cInterface->_not_equal; if( not_equal != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "not_equal", not_equal);
} constchar *less = cInterface->_less; if( less != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "less", less);
} constchar *greater_equal = cInterface->_greater_equal; if( greater_equal != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "greater_equal", greater_equal);
} constchar *less_equal = cInterface->_less_equal; if( less_equal != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "less_equal", less_equal);
} constchar *greater = cInterface->_greater; if( greater != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "greater", greater);
} constchar *overflow = cInterface->_overflow; if( overflow != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "overflow", overflow);
} constchar *no_overflow = cInterface->_no_overflow; if( no_overflow != NULL ) {
define_oper_interface(fp, *oper, _globalNames, "no_overflow", no_overflow);
}
} // end Conditional Interface // Check if it is a Constant Interface elseif (oper->_interface->is_ConstInterface() != NULL ) {
assert( oper->num_consts(_globalNames) == 1, "Must have one constant when using CONST_INTER encoding"); if (!strcmp(oper->ideal_type(_globalNames), "ConI")) { // Access the locally stored constant
fprintf(fp," virtual intptr_t constant() const {");
fprintf(fp, " return (intptr_t)_c0;");
fprintf(fp," }\n");
} elseif (!strcmp(oper->ideal_type(_globalNames), "ConP")) { // Access the locally stored constant
fprintf(fp," virtual intptr_t constant() const {");
fprintf(fp, " return _c0->get_con();");
fprintf(fp, " }\n"); // Generate query to determine if this pointer is an oop
fprintf(fp," virtual relocInfo::relocType constant_reloc() const {");
fprintf(fp, " return _c0->reloc();");
fprintf(fp, " }\n");
} elseif (!strcmp(oper->ideal_type(_globalNames), "ConN")) { // Access the locally stored constant
fprintf(fp," virtual intptr_t constant() const {");
fprintf(fp, " return _c0->get_ptrtype()->get_con();");
fprintf(fp, " }\n"); // Generate query to determine if this pointer is an oop
fprintf(fp," virtual relocInfo::relocType constant_reloc() const {");
fprintf(fp, " return _c0->get_ptrtype()->reloc();");
fprintf(fp, " }\n");
} elseif (!strcmp(oper->ideal_type(_globalNames), "ConNKlass")) { // Access the locally stored constant
fprintf(fp," virtual intptr_t constant() const {");
fprintf(fp, " return _c0->get_ptrtype()->get_con();");
fprintf(fp, " }\n"); // Generate query to determine if this pointer is an oop
fprintf(fp," virtual relocInfo::relocType constant_reloc() const {");
fprintf(fp, " return _c0->get_ptrtype()->reloc();");
fprintf(fp, " }\n");
} elseif (!strcmp(oper->ideal_type(_globalNames), "ConL")) {
fprintf(fp," virtual intptr_t constant() const {"); // We don't support addressing modes with > 4Gig offsets. // Truncate to int.
fprintf(fp, " return (intptr_t)_c0;");
fprintf(fp, " }\n");
fprintf(fp," virtual jlong constantL() const {");
fprintf(fp, " return _c0;");
fprintf(fp, " }\n");
} elseif (!strcmp(oper->ideal_type(_globalNames), "ConF")) {
fprintf(fp," virtual intptr_t constant() const {");
fprintf(fp, " ShouldNotReachHere(); return 0; ");
fprintf(fp, " }\n");
fprintf(fp," virtual jfloat constantF() const {");
fprintf(fp, " return (jfloat)_c0;");
fprintf(fp, " }\n");
} elseif (!strcmp(oper->ideal_type(_globalNames), "ConD")) {
fprintf(fp," virtual intptr_t constant() const {");
fprintf(fp, " ShouldNotReachHere(); return 0; ");
fprintf(fp, " }\n");
fprintf(fp," virtual jdouble constantD() const {");
fprintf(fp, " return _c0;");
fprintf(fp, " }\n");
}
} elseif (oper->_interface->is_RegInterface() != NULL) { // make sure that a fixed format string isn't used for an // operand which might be assigned to multiple registers. // Otherwise the opto assembly output could be misleading. if (oper->_format->_strings.count() != 0 && !oper->is_bound_register()) {
syntax_err(oper->_linenum, "Only bound registers can have fixed formats: %s\n",
oper->_ident);
}
} else {
assert( false, "ShouldNotReachHere();");
}
}
fprintf(fp,"\n"); // // Currently all XXXOper::hash() methods are identical (990820) // declare_hash(fp); // // Currently all XXXOper::Cmp() methods are identical (990820) // declare_cmp(fp);
// Do not place dump_spec() and Name() into PRODUCT code // int_format and ext_format are not needed in PRODUCT code either
fprintf(fp, "#ifndef PRODUCT\n");
// Declare int_format() and ext_format()
gen_oper_format(fp, _globalNames, *oper);
// Machine independent print functionality for debugging // IF we have constants, create a dump_spec function for the derived class // // (1) virtual void dump_spec() const { // (2) st->print("#%d", _c#); // Constant != ConP // OR _c#->dump_on(st); // Type ConP // ... // (3) }
uint num_consts = oper->num_consts(_globalNames); if( num_consts > 0 ) { // line (1)
fprintf(fp, " virtual void dump_spec(outputStream *st) const {\n"); // generate format string for st->print // Iterate over the component list & spit out the right thing
uint i = 0; constchar *type = oper->ideal_type(_globalNames);
Component *comp;
oper->_components.reset(); if ((comp = oper->_components.iter()) == NULL) {
assert(num_consts == 1, "Bad component list detected.\n");
i = dump_spec_constant( fp, type, i, oper ); // Check that type actually matched
assert( i != 0, "Non-constant operand lacks component list.");
} // end if NULL else { // line (2) // dump all components
oper->_components.reset(); while((comp = oper->_components.iter()) != NULL) {
type = comp->base_type(_globalNames);
i = dump_spec_constant( fp, type, i, NULL );
}
} // finish line (3)
fprintf(fp," }\n");
}
// Close definition of this XxxMachOper
fprintf(fp,"};\n");
}
// Generate Machine Classes for each instruction defined in AD file
fprintf(fp,"\n");
fprintf(fp,"//----------------------------Declare classes for Pipelines-----------------\n");
declare_pipe_classes(fp);
// Generate Machine Classes for each instruction defined in AD file
fprintf(fp,"\n");
fprintf(fp,"//----------------------------Declare classes derived from MachNode----------\n");
_instructions.reset();
InstructForm *instr; for( ; (instr = (InstructForm*)_instructions.iter()) != NULL; ) { // Ensure this is a machine-world instruction if ( instr->ideal_only() ) continue;
// Build class definition for this instruction
fprintf(fp,"\n");
fprintf(fp,"class %sNode : public %s { \n",
instr->_ident, instr->mach_base_class(_globalNames) );
fprintf(fp,"private:\n");
fprintf(fp," MachOper *_opnd_array[%d];\n", instr->num_opnds() ); if ( instr->is_ideal_jump() ) {
fprintf(fp, " GrowableArray<Label*> _index2label;\n");
}
fprintf(fp, "public:\n");
Attribute *att = instr->_attribs; // Fields of the node specified in the ad file. while (att != NULL) { if (strncmp(att->_ident, "ins_field_", 10) == 0) { constchar *field_name = att->_ident+10; constchar *field_type = att->_val;
fprintf(fp, " %s _%s;\n", field_type, field_name);
}
att = (Attribute *)att->_next;
}
// If this instruction contains a labelOper // Declare Node::methods that set operand Label's contents int label_position = instr->label_position(); if( label_position != -1 ) { // Set/Save the label, stored in labelOper::_branch_label
fprintf(fp," virtual void label_set( Label* label, uint block_num );\n");
fprintf(fp," virtual void save_label( Label** label, uint* block_num );\n");
}
// If this instruction contains a methodOper // Declare Node::methods that set operand method's contents int method_position = instr->method_position(); if( method_position != -1 ) { // Set the address method, stored in methodOper::_method
fprintf(fp," virtual void method_set( intptr_t method );\n");
}
// virtual functions for attributes // // Each instruction attribute results in a virtual call of same name. // The ins_cost is not handled here.
Attribute *attr = instr->_attribs;
Attribute *avoid_back_to_back_attr = NULL; while (attr != NULL) { if (strcmp (attr->_ident, "ins_is_TrapBasedCheckNode") == 0) {
fprintf(fp, " virtual bool is_TrapBasedCheckNode() const { return %s; }\n", attr->_val);
} elseif (strcmp (attr->_ident, "ins_cost") != 0 &&
strncmp(attr->_ident, "ins_field_", 10) != 0 && // Must match function in node.hpp: return type bool, no prefix "ins_".
strcmp (attr->_ident, "ins_is_TrapBasedCheckNode") != 0 &&
strcmp (attr->_ident, "ins_short_branch") != 0) {
fprintf(fp, " virtual int %s() const { return %s; }\n", attr->_ident, attr->_val);
} if (strcmp(attr->_ident, "ins_avoid_back_to_back") == 0) {
avoid_back_to_back_attr = attr;
}
attr = (Attribute *)attr->_next;
}
// virtual functions for encode and format
// Virtual function for evaluating the constant. if (instr->is_mach_constant()) {
fprintf(fp," virtual void eval_constant(Compile* C);\n");
}
// Output the opcode function and the encode function here using the // encoding class information in the _insencode slot. if ( instr->_insencode ) { if (instr->postalloc_expands()) {
fprintf(fp," virtual bool requires_postalloc_expand() const { return true; }\n");
fprintf(fp," virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_);\n");
} else {
fprintf(fp," virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;\n");
}
}
// virtual function for getting the size of an instruction if ( instr->_size ) {
fprintf(fp," virtual uint size(PhaseRegAlloc *ra_) const;\n");
}
// Return the top-level ideal opcode. // Use MachNode::ideal_Opcode() for nodes based on MachNode class // if the ideal_Opcode == Op_Node. if ( strcmp("Node", instr->ideal_Opcode(_globalNames)) != 0 ||
strcmp("MachNode", instr->mach_base_class(_globalNames)) != 0 ) {
fprintf(fp," virtual int ideal_Opcode() const { return Op_%s; }\n",
instr->ideal_Opcode(_globalNames) );
}
if (instr->needs_constant_base() &&
!instr->is_mach_constant()) { // These inherit the function from MachConstantNode.
fprintf(fp," virtual uint mach_constant_base_node_input() const { "); if (instr->is_ideal_call() != Form::invalid_type &&
instr->is_ideal_call() != Form::JAVA_LEAF) { // MachConstantBase goes behind arguments, but before jvms.
fprintf(fp,"assert(tf() && tf()->domain(), \"\"); return tf()->domain()->cnt();");
} else {
fprintf(fp,"return req()-1;");
}
fprintf(fp," }\n");
}
// Allow machine-independent optimization, invert the sense of the IF test if( instr->is_ideal_if() ) {
fprintf(fp," virtual void negate() { \n"); // Identify which operand contains the negate(able) ideal condition code int idx = 0;
instr->_components.reset(); for( Component *comp; (comp = instr->_components.iter()) != NULL; ) { // Check that component is an operand
Form *form = (Form*)_globalNames[comp->_type];
OperandForm *opForm = form ? form->is_operand() : NULL; if( opForm == NULL ) continue;
// Lookup the position of the operand in the instruction. if( opForm->is_ideal_bool() ) {
idx = instr->operand_position(comp->_name, comp->_usedef);
assert( idx != NameList::Not_in_list, "Did not find component in list that contained it."); break;
}
}
fprintf(fp," opnd_array(%d)->negate();\n", idx);
fprintf(fp," _prob = 1.0f - _prob;\n");
fprintf(fp," };\n");
}
// Identify which input register matches the input register.
uint matching_input = instr->two_address(_globalNames);
// Generate the method if it returns != 0 otherwise use MachNode::two_adr() if( matching_input != 0 ) {
fprintf(fp," virtual uint two_adr() const ");
fprintf(fp,"{ return oper_input_base()"); for( uint i = 2; i <= matching_input; i++ )
fprintf(fp," + opnd_array(%d)->num_edges()",i-1);
fprintf(fp,"; }\n");
}
// Declare cisc_version, if applicable // MachNode *cisc_version( int offset /* ,... */ );
instr->declare_cisc_version(*this, fp);
// If there is an explicit peephole rule, build it if ( instr->peepholes() != NULL ) {
fprintf(fp," virtual int peephole(Block* block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc* ra_);\n");
}
// Output the declaration for number of relocation entries if ( instr->reloc(_globalNames) != 0 ) {
fprintf(fp," virtual int reloc() const;\n");
}
if (instr->alignment() != 1) {
fprintf(fp," virtual int alignment_required() const { return %d; }\n", instr->alignment());
fprintf(fp," virtual int compute_padding(int current_offset) const;\n");
}
// Starting point for inputs matcher wants. // Use MachNode::oper_input_base() for nodes based on MachNode class // if the base == 1. if ( instr->oper_input_base(_globalNames) != 1 ||
strcmp("MachNode", instr->mach_base_class(_globalNames)) != 0 ) {
fprintf(fp," virtual uint oper_input_base() const { return %d; }\n",
instr->oper_input_base(_globalNames));
}
// Make the constructor and following methods 'public:'
fprintf(fp,"public:\n");
bool node_flags_set = false; // flag: if this instruction matches an ideal 'Copy*' node if ( instr->is_ideal_copy() != 0 ) {
fprintf(fp,"init_flags(Flag_is_Copy");
node_flags_set = true;
}
// Is an instruction is a constant? If so, get its type
Form::DataType data_type; constchar *opType = NULL; constchar *result = NULL;
data_type = instr->is_chain_of_constant(_globalNames, opType, result); // Check if this instruction is a constant if ( data_type != Form::none ) { if ( node_flags_set ) {
fprintf(fp," | Flag_is_Con");
} else {
fprintf(fp,"init_flags(Flag_is_Con");
node_flags_set = true;
}
}
// flag: if this instruction is cisc alternate if ( can_cisc_spill() && instr->is_cisc_alternate() ) { if ( node_flags_set ) {
fprintf(fp," | Flag_is_cisc_alternate");
} else {
fprintf(fp,"init_flags(Flag_is_cisc_alternate");
node_flags_set = true;
}
}
// flag: if this instruction has short branch form if ( instr->has_short_branch_form() ) { if ( node_flags_set ) {
fprintf(fp," | Flag_may_be_short_branch");
} else {
fprintf(fp,"init_flags(Flag_may_be_short_branch");
node_flags_set = true;
}
}
// flag: if this instruction should not be generated back to back. if (avoid_back_to_back_attr != NULL) { if (node_flags_set) {
fprintf(fp," | (%s)", avoid_back_to_back_attr->_val);
} else {
fprintf(fp,"init_flags((%s)", avoid_back_to_back_attr->_val);
node_flags_set = true;
}
}
// Check if machine instructions that USE memory, but do not DEF memory, // depend upon a node that defines memory in machine-independent graph. if ( instr->needs_anti_dependence_check(_globalNames) ) { if ( node_flags_set ) {
fprintf(fp," | Flag_needs_anti_dependence_check");
} else {
fprintf(fp,"init_flags(Flag_needs_anti_dependence_check");
node_flags_set = true;
}
}
// flag: if this instruction is implemented with a call if ( instr->_has_call ) { if ( node_flags_set ) {
fprintf(fp," | Flag_has_call");
} else {
fprintf(fp,"init_flags(Flag_has_call");
node_flags_set = true;
}
}
if ( node_flags_set ) {
fprintf(fp,"); ");
}
fprintf(fp,"}\n");
// size_of, used by base class's clone to obtain the correct size.
fprintf(fp," virtual uint size_of() const {");
fprintf(fp, " return sizeof(%sNode);", instr->_ident);
fprintf(fp, " }\n");
// Virtual methods which are only generated to override base class if( instr->expands() || instr->needs_projections() ||
instr->has_temps() ||
instr->is_mach_constant() ||
instr->needs_constant_base() ||
(instr->_matrule != NULL &&
instr->num_opnds() != instr->num_unique_opnds()) ) {
fprintf(fp," virtual MachNode *Expand(State *state, Node_List &proj_list, Node* mem);\n");
}
// Declare short branch methods, if applicable
instr->declare_short_branch_methods(fp);
// See if there is an "ins_pipe" declaration for this instruction if (instr->_ins_pipe) {
fprintf(fp," static const Pipeline *pipeline_class();\n");
fprintf(fp," virtual const Pipeline *pipeline() const;\n");
}
// Generate virtual function for MachNodeX::bottom_type when necessary // // Note on accuracy: Pointer-types of machine nodes need to be accurate, // or else alias analysis on the matched graph may produce bad code. // Moreover, the aliasing decisions made on machine-node graph must be // no less accurate than those made on the ideal graph, or else the graph // may fail to schedule. (Reason: Memory ops which are reordered in // the ideal graph might look interdependent in the machine graph, // thereby removing degrees of scheduling freedom that the optimizer // assumed would be available.) // // %%% We should handle many of these cases with an explicit ADL clause: // instruct foo() %{ ... bottom_type(TypeRawPtr::BOTTOM); ... %} if( data_type != Form::none ) { // A constant's bottom_type returns a Type containing its constant value
// !!!!! // Convert all ints, floats, ... to machine-independent TypeXs // as is done for pointers // // Construct appropriate constant type containing the constant value.
fprintf(fp," virtual const class Type *bottom_type() const {\n"); switch( data_type ) { case Form::idealI:
fprintf(fp," return TypeInt::make(opnd_array(1)->constant());\n"); break; case Form::idealP: case Form::idealN: case Form::idealNKlass:
fprintf(fp," return opnd_array(1)->type();\n"); break; case Form::idealD:
fprintf(fp," return TypeD::make(opnd_array(1)->constantD());\n"); break; case Form::idealF:
fprintf(fp," return TypeF::make(opnd_array(1)->constantF());\n"); break; case Form::idealL:
fprintf(fp," return TypeLong::make(opnd_array(1)->constantL());\n"); break; default:
assert( false, "Unimplemented()" ); break;
}
fprintf(fp," };\n");
} /* else if ( instr->_matrule && instr->_matrule->_rChild && ( strcmp("ConvF2I",instr->_matrule->_rChild->_opType)==0 || strcmp("ConvD2I",instr->_matrule->_rChild->_opType)==0 ) ) { // !!!!! !!!!! // Provide explicit bottom type for conversions to int // On Intel the result operand is a stackSlot, untyped. fprintf(fp," virtual const class Type *bottom_type() const {"); fprintf(fp, " return TypeInt::INT;"); fprintf(fp, " };\n");
}*/ elseif( instr->is_ideal_copy() &&
!strcmp(instr->_matrule->_lChild->_opType,"stackSlotP") ) { // !!!!! // Special hack for ideal Copy of pointer. Bottom type is oop or not depending on input.
fprintf(fp," const Type *bottom_type() const { return in(1)->bottom_type(); } // Copy?\n");
} elseif( instr->is_ideal_loadPC() ) { // LoadPCNode provides the return address of a call to native code. // Define its bottom type to be TypeRawPtr::BOTTOM instead of TypePtr::BOTTOM // since it is a pointer to an internal VM location and must have a zero offset. // Allocation detects derived pointers, in part, by their non-zero offsets.
fprintf(fp," const Type *bottom_type() const { return TypeRawPtr::BOTTOM; } // LoadPC?\n");
} elseif( instr->is_ideal_box() ) { // BoxNode provides the address of a stack slot. // Define its bottom type to be TypeRawPtr::BOTTOM instead of TypePtr::BOTTOM // This prevent s insert_anti_dependencies from complaining. It will // complain if it sees that the pointer base is TypePtr::BOTTOM since // it doesn't understand what that might alias.
fprintf(fp," const Type *bottom_type() const { return TypeRawPtr::BOTTOM; } // Box?\n");
} elseif (instr->_matrule && instr->_matrule->_rChild &&
(!strcmp(instr->_matrule->_rChild->_opType,"CMoveP") || !strcmp(instr->_matrule->_rChild->_opType,"CMoveN")) ) { int offset = 1; // Special special hack to see if the Cmp? has been incorporated in the conditional move
MatchNode *rl = instr->_matrule->_rChild->_lChild; if (rl && !strcmp(rl->_opType, "Binary") && rl->_rChild && strncmp(rl->_rChild->_opType, "Cmp", 3) == 0) {
offset = 2;
fprintf(fp," const Type *bottom_type() const { if (req() == 3) return in(2)->bottom_type();\n\tconst Type *t = in(oper_input_base()+%d)->bottom_type(); return (req() <= oper_input_base()+%d) ? t : t->meet(in(oper_input_base()+%d)->bottom_type()); } // %s\n",
offset, offset+1, offset+1, instr->_matrule->_rChild->_opType);
} else { // Special hack for ideal CMove; ideal type depends on inputs
fprintf(fp," const Type *bottom_type() const { const Type *t = in(oper_input_base()+%d)->bottom_type(); return (req() <= oper_input_base()+%d) ? t : t->meet(in(oper_input_base()+%d)->bottom_type()); } // %s\n",
offset, offset+1, offset+1, instr->_matrule->_rChild->_opType);
}
} elseif (instr->is_tls_instruction()) { // Special hack for tlsLoadP
fprintf(fp," const Type *bottom_type() const { return TypeRawPtr::BOTTOM; } // tlsLoadP\n");
} elseif ( instr->is_ideal_if() ) {
fprintf(fp," const Type *bottom_type() const { return TypeTuple::IFBOTH; } // matched IfNode\n");
} elseif ( instr->is_ideal_membar() ) {
fprintf(fp," const Type *bottom_type() const { return TypeTuple::MEMBAR; } // matched MemBar\n");
}
// Check where 'ideal_type' must be customized /* if ( instr->_matrule && instr->_matrule->_rChild && ( strcmp("ConvF2I",instr->_matrule->_rChild->_opType)==0 || strcmp("ConvD2I",instr->_matrule->_rChild->_opType)==0 ) ) { fprintf(fp," virtual uint ideal_reg() const { return Compile::current()->matcher()->base2reg[Type::Int]; }\n");
}*/
// Analyze machine instructions that either USE or DEF memory. int memory_operand = instr->memory_operand(_globalNames); if ( memory_operand != InstructForm::NO_MEMORY_OPERAND ) { if( memory_operand == InstructForm::MANY_MEMORY_OPERANDS ) {
fprintf(fp," virtual const TypePtr *adr_type() const;\n");
}
fprintf(fp," virtual const MachOper *memory_operand() const;\n");
}
fprintf(fp, "#ifndef PRODUCT\n");
// virtual function for generating the user's assembler output
gen_inst_format(fp, _globalNames,*instr);
fprintf(fp,"\n");
fprintf(fp,"// MACROS to inline and constant fold State::valid(index)...\n");
fprintf(fp,"// when given a constant 'index' in dfa_<arch>.cpp\n");
fprintf(fp,"#define STATE__NOT_YET_VALID(index) ");
fprintf(fp," ( (%s) == 0 )\n", state__valid);
fprintf(fp,"\n");
fprintf(fp,"#define STATE__VALID_CHILD(state,index) ");
fprintf(fp," ( state && (state->%s) )\n", state__valid);
fprintf(fp,"\n");
fprintf(fp, "//---------------------------State-------------------------------------------\n");
fprintf(fp,"// State contains an integral cost vector, indexed by machine operand opcodes,\n");
fprintf(fp,"// a rule vector consisting of machine operand/instruction opcodes, and also\n");
fprintf(fp,"// indexed by machine operand opcodes, pointers to the children in the label\n");
fprintf(fp,"// tree generated by the Label routines in ideal nodes (currently limited to\n");
fprintf(fp,"// two for convenience, but this could change).\n");
fprintf(fp,"class State : public ArenaObj {\n");
fprintf(fp,"private:\n");
fprintf(fp," unsigned int _cost[_LAST_MACH_OPER]; // Costs, indexed by operand opcodes\n");
fprintf(fp," uint16_t _rule[_LAST_MACH_OPER]; // Rule and validity, indexed by operand opcodes\n");
fprintf(fp," // Lowest bit encodes validity\n");
fprintf(fp,"public:\n");
fprintf(fp," int _id; // State identifier\n");
fprintf(fp," Node *_leaf; // Ideal (non-machine-node) leaf of match tree\n");
fprintf(fp," State *_kids[2]; // Children of state node in label tree\n");
fprintf(fp,"\n");
fprintf(fp," State(void);\n");
fprintf(fp," DEBUG_ONLY( ~State(void); )\n");
fprintf(fp,"\n");
fprintf(fp," // Methods created by ADLC and invoked by Reduce\n");
fprintf(fp," MachOper *MachOperGenerator(int opcode);\n");
fprintf(fp," MachNode *MachNodeGenerator(int opcode);\n");
fprintf(fp,"\n");
fprintf(fp," // Assign a state to a node, definition of method produced by ADLC\n");
fprintf(fp," bool DFA( int opcode, const Node *ideal );\n");
fprintf(fp,"\n");
fprintf(fp," bool valid(uint index) {\n");
fprintf(fp," return %s;\n", state__valid);
fprintf(fp," }\n");
fprintf(fp," unsigned int rule(uint index) {\n");
fprintf(fp," return _rule[index] >> 1;\n");
fprintf(fp," }\n");
fprintf(fp," unsigned int cost(uint index) {\n");
fprintf(fp," return _cost[index];\n");
fprintf(fp," }\n");
fprintf(fp,"\n");
fprintf(fp,"#ifndef PRODUCT\n");
fprintf(fp," void dump(); // Debugging prints\n");
fprintf(fp," void dump(int depth);\n");
fprintf(fp,"#endif\n"); if (_dfa_small) { // Generate the routine name we'll need for (int i = 1; i < _last_opcode; i++) { if (_mlistab[i] == NULL) continue;
fprintf(fp, " void _sub_Op_%s(const Node *n);\n", NodeClassNames[i]);
}
}
fprintf(fp,"};\n");
fprintf(fp,"\n");
fprintf(fp,"\n");
}
//---------------------------buildMachOperEnum--------------------------------- // Build enumeration for densely packed operands. // This enumeration is used to index into the arrays in the State objects // that indicate cost and a successful rule match.
// Information needed to generate the ReduceOp mapping for the DFA class OutputMachOperands : public OutputMap { public:
OutputMachOperands(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD)
: OutputMap(hpp, cpp, globals, AD, "MachOperands") {};
void ArchDesc::buildMachOperEnum(FILE *fp_hpp) { // Construct the table for MachOpcodes
OutputMachOperands output_mach_operands(fp_hpp, fp_hpp, _globalNames, *this);
build_map(output_mach_operands);
}
//---------------------------buildMachEnum---------------------------------- // Build enumeration for all MachOpers and all MachNodes
// Information needed to generate the ReduceOp mapping for the DFA class OutputMachOpcodes : public OutputMap { int begin_inst_chain_rule; int end_inst_chain_rule; int begin_rematerialize; int end_rematerialize; int end_instructions; public:
OutputMachOpcodes(FILE *hpp, FILE *cpp, FormDict &globals, ArchDesc &AD)
: OutputMap(hpp, cpp, globals, AD, "MachOpcodes"),
begin_inst_chain_rule(-1), end_inst_chain_rule(-1),
begin_rematerialize(-1), end_rematerialize(-1),
end_instructions(-1)
{};
void record_position(OutputMap::position place, int idx ) { switch(place) { case OutputMap::BEGIN_INST_CHAIN_RULES :
begin_inst_chain_rule = idx; break; case OutputMap::END_INST_CHAIN_RULES :
end_inst_chain_rule = idx; break; case OutputMap::BEGIN_REMATERIALIZE :
begin_rematerialize = idx; break; case OutputMap::END_REMATERIALIZE :
end_rematerialize = idx; break; case OutputMap::END_INSTRUCTIONS :
end_instructions = idx; break; default: break;
}
}
};
void ArchDesc::buildMachOpcodesEnum(FILE *fp_hpp) { // Construct the table for MachOpcodes
OutputMachOpcodes output_mach_opcodes(fp_hpp, fp_hpp, _globalNames, *this);
build_map(output_mach_opcodes);
}
// Generate an enumeration of the pipeline states, and both // the functional units (resources) and the masks for // specifying resources void ArchDesc::build_pipeline_enums(FILE *fp_hpp) { int stagelen = (int)strlen("undefined"); int stagenum = 0;
if (_pipeline) { // Find max enum string length constchar *stage; for ( _pipeline->_stages.reset(); (stage = _pipeline->_stages.iter()) != NULL; ) { int len = (int)strlen(stage); if (stagelen < len) stagelen = len;
}
}
// Generate a list of stages
fprintf(fp_hpp, "\n");
fprintf(fp_hpp, "// Pipeline Stages\n");
fprintf(fp_hpp, "enum machPipelineStages {\n");
fprintf(fp_hpp, " stage_%-*s = 0,\n", stagelen, "undefined");
if( _pipeline ) { constchar *resource; int reslen = 0;
// Generate a list of resources, and masks for ( _pipeline->_reslist.reset(); (resource = _pipeline->_reslist.iter()) != NULL; ) { int len = (int)strlen(resource); if (reslen < len)
reslen = len;
}
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