|
/top,core_top,majority_integration,protocol_integration,comm_integration,comm_integration_stage,message,integration_fault_model,finite_sets_below_extra,exact_comm_stage,fault_assumptions_stage,pigeonhole,tau_declaration,node_functions_stage,node,local,exact_comm,node_functions,protocol,majority,majority_stage,majority_properties,finite_seqs,exact_reduce_integration,ordered_message,exact_reduce,k_ordered,reduce_choice,reduce_properties,ordered_finite_sequences,relations_extra,select_minmax,exact_reduce_stage,reduce_synch,timing_integration,timing_integration_stage,timing_window,timing_imprecision,inverse_clocks,physical_clocks,abs_props,minmax_ineq,floor_ceiling_ineq,bounded_ints,inexact_comm_stage,real_finite_sequences,inexact_comm,reduce_synch_stage,clock_shift,inexact_reduce_stage,inexact_reduce,convergence_top,median_stage,median_overlap,middle_third_stage,middle_third_overlap,middle_third_pigeonhole,pigeonhole_int,weber_stage,weber_overlap,virtual_clock_top,virtual_clock_1,synch_protocol_invariants,synch_constant_definitions,synch_parameter_constraints,clock_minmax,function_image_nonempty,interval_clocks,virtual_clocks,event_sequences,virtual_clock_2
structures/sort_array,permutations,min_array_def,majority_seq,min_seq,sort_seq,max_array_def,below_arrays,seqs,sort_seq_lems,max_seq,permutations_seq,sort_array_def
reals/bound_defs,real_fun_ops,sigma_below,bounded_reals,sigma,reals_complete_more,sigma_nat
finite_sets/func_composition,finite_sets_minmax,finite_sets_inductions,finite_sets_card_eq,finite_sets_minmax_props,finite_sets_below
top:core_top,virtual_clock_top
core_top:majority_integration,exact_reduce_integration,reduce_synch,inexact_reduce,convergence_top
majority_integration:protocol_integration,majority
protocol_integration:comm_integration,protocol
comm_integration:comm_integration_stage,exact_comm
comm_integration_stage:message,integration_fault_model,exact_comm_stage
message:
integration_fault_model:finite_sets_below_extra
finite_sets_below_extra:finite_sets@finite_sets_below
exact_comm_stage:fault_assumptions_stage
fault_assumptions_stage:pigeonhole,node_functions_stage
pigeonhole:tau_declaration
tau_declaration:
node_functions_stage:node
node:finite_sets_below_extra,structures@seqs,local
local:structures@seqs
exact_comm:node_functions,exact_comm_stage
node_functions:node_functions_stage
protocol:node_functions
majority:majority_stage,exact_comm,protocol
majority_stage:exact_comm_stage,majority_properties
majority_properties:finite_seqs,finite_sets@finite_sets_card_eq,pigeonhole,node
finite_seqs:structures@seqs,structures@majority_seq
exact_reduce_integration:ordered_message,protocol_integration,exact_reduce
ordered_message:message
exact_reduce:exact_comm,protocol,k_ordered,exact_reduce_stage
k_ordered:reduce_choice,node_functions,select_minmax
reduce_choice:fault_assumptions_stage,reduce_properties,finite_sets@finite_sets_minmax
reduce_properties:ordered_finite_sequences,finite_sets@finite_sets_card_eq,node
ordered_finite_sequences:structures@sort_seq_lems,relations_extra,finite_seqs,pigeonhole,finite_sets@finite_sets_below,finite_sets@finite_sets_card_eq
relations_extra:
select_minmax:finite_sets@finite_sets_minmax,node,relations_extra
exact_reduce_stage:reduce_choice,exact_comm_stage,select_minmax
reduce_synch:reals@sigma_nat,reals@real_fun_ops,timing_integration,k_ordered,protocol,reduce_synch_stage
timing_integration:timing_integration_stage,inexact_comm
timing_integration_stage:timing_window,integration_fault_model,inexact_comm_stage,finite_sets@finite_sets_minmax,finite_sets@finite_sets_below
timing_window:timing_imprecision
timing_imprecision:inverse_clocks
inverse_clocks:physical_clocks,bounded_ints
physical_clocks:abs_props,floor_ceiling_ineq
abs_props:minmax_ineq
minmax_ineq:
floor_ceiling_ineq:
bounded_ints:reals@bounded_reals
inexact_comm_stage:fault_assumptions_stage,real_finite_sequences
real_finite_sequences:ordered_finite_sequences,reals@sigma_below
inexact_comm:node_functions,inexact_comm_stage
reduce_synch_stage:clock_shift,timing_integration_stage,inexact_reduce_stage
clock_shift:inverse_clocks
inexact_reduce_stage:reduce_choice,inexact_comm_stage,select_minmax
inexact_reduce:inexact_comm,protocol,k_ordered,inexact_reduce_stage,reals@sigma_nat
convergence_top:median_stage,middle_third_stage,weber_stage
median_stage:inexact_reduce_stage,median_overlap
median_overlap:reduce_properties
middle_third_stage:inexact_reduce_stage,middle_third_overlap
middle_third_overlap:reduce_properties,middle_third_pigeonhole
middle_third_pigeonhole:pigeonhole_int,pigeonhole
pigeonhole_int:pigeonhole
weber_stage:weber_overlap,inexact_reduce_stage
weber_overlap:reduce_properties
virtual_clock_top:virtual_clock_1,virtual_clock_2
virtual_clock_1:synch_protocol_invariants,virtual_clocks
synch_protocol_invariants:synch_constant_definitions,clock_minmax,interval_clocks
synch_constant_definitions:synch_parameter_constraints,physical_clocks
synch_parameter_constraints:
clock_minmax:physical_clocks,finite_sets@finite_sets_minmax_props,function_image_nonempty
function_image_nonempty:
interval_clocks:physical_clocks
virtual_clocks:interval_clocks,inverse_clocks,event_sequences
event_sequences:
virtual_clock_2:synch_protocol_invariants,virtual_clocks
[ Dauer der Verarbeitung: 0.15 Sekunden
(vorverarbeitet)
]
|
