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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id:
http://devicetree.org/schemas/dpll/dpll-device.yaml#
$schema:
http://devicetree.org/meta-schemas/core.yaml#
title: Digital Phase-Locked Loop (DPLL) Device
maintainers:
- Ivan Vecera <ivecera@redhat.com>
description:
Digital Phase-Locked Loop (DPLL) device is used for precise clock
synchronization in networking and telecom hardware. The device can
have one or more channels (DPLLs) and one or more physical input and
output pins. Each DPLL channel can either produce pulse-per-clock signal
or drive ethernet equipment clock. The type of each channel can be
indicated by dpll-types property.
properties:
$nodename:
pattern: "^dpll(@.*)?$"
"#address-cells":
const: 0
"#size-cells":
const: 0
dpll-types:
description: List of DPLL channel types, one per DPLL instance.
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
items:
enum: [pps, eec]
input-pins:
type: object
description: DPLL input pins
unevaluatedProperties: false
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^pin@[0-9a-f]+$":
$ref: /schemas/dpll/dpll-pin.yaml
unevaluatedProperties: false
required:
- "#address-cells"
- "#size-cells"
output-pins:
type: object
description: DPLL output pins
unevaluatedProperties: false
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^pin@[0-9]+$":
$ref: /schemas/dpll/dpll-pin.yaml
unevaluatedProperties: false
required:
- "#address-cells"
- "#size-cells"
additionalProperties: true
