# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id:
http://devicetree.org/schemas/spi/fsl,dspi.yaml#
$schema:
http://devicetree.org/meta-schemas/core.yaml#
title: ARM Freescale DSPI controller
maintainers:
- Frank Li <Frank.Li@nxp.com>
properties:
compatible:
oneOf:
- enum:
- fsl,vf610-dspi
- fsl,ls1021a-v1.0-dspi
- fsl,ls1012a-dspi
- fsl,ls1028a-dspi
- fsl,ls1043a-dspi
- fsl,ls1046a-dspi
- fsl,ls1088a-dspi
- fsl,ls2080a-dspi
- fsl,ls2085a-dspi
- fsl,lx2160a-dspi
- nxp,s32g2-dspi
- items:
- enum:
- fsl,ls1012a-dspi
- fsl,ls1028a-dspi
- fsl,ls1043a-dspi
- fsl,ls1046a-dspi
- fsl,ls1088a-dspi
- const: fsl,ls1021a-v1.0-dspi
- items:
- const: fsl,ls2080a-dspi
- const: fsl,ls2085a-dspi
- items:
- const: fsl,lx2160a-dspi
- const: fsl,ls2085a-dspi
- items:
- const: nxp,s32g3-dspi
- const: nxp,s32g2-dspi
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: dspi
dmas:
items:
- description: DMA controller phandle and request line for TX
- description: DMA controller phandle and request line for RX
dma-names:
items:
- const: tx
- const: rx
spi-num-chipselects:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The number of the chip native chipselect signals.
cs-gpios don't count against this number.
big-endian: true
bus-num:
$ref: /schemas/types.yaml#/definitions/uint32
description: SoC-specific identifier for the SPI controller.
required:
- compatible
- reg
- clocks
- clock-names
- spi-num-chipselects
allOf:
- $ref: spi-controller.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/vf610-clock.h>
spi@4002c000 {
compatible = "fsl,vf610-dspi";
reg = <0x4002c000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks VF610_CLK_DSPI0>;
clock-names = "dspi";
spi-num-chipselects = <5>;
bus-num = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dspi0_1>;
big-endian;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <16000000>;
spi-cpol;
spi-cpha;
spi-cs-setup-delay-ns = <100>;
spi-cs-hold-delay-ns = <50>;
};
};
# S32G3 in target mode
- |
spi@401d4000 {
compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";
reg = <0x401d4000 0x1000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 26>;
clock-names = "dspi";
spi-num-chipselects = <8>;
bus-num = <0>;
dmas = <&edma0 0 7>, <&edma0 0 8>;
dma-names = "tx", "rx";
spi-slave;
};
