/* Flush just one page in the current TLB set. We need to be very careful about the icache here, there is no way to invalidate a
specific icache page. */
/* Flush current user mapping. */ staticinlinevoid
flush_tlb(void)
{
flush_tlb_current(current->active_mm);
}
/* Flush someone else's user mapping. */ staticinlinevoid
flush_tlb_other(struct mm_struct *mm)
{ unsignedlong *mmc = &mm->context[smp_processor_id()]; /* Check it's not zero first to avoid cacheline ping pong
when possible. */ if (*mmc) *mmc = 0;
}
#ifndef CONFIG_SMP /* Flush everything (kernel mapping may also have changed
due to vmalloc/vfree). */ staticinlinevoid flush_tlb_all(void)
{
tbia();
}
/* Flush a specified user mapping. */ staticinlinevoid
flush_tlb_mm(struct mm_struct *mm)
{ if (mm == current->active_mm)
flush_tlb_current(mm); else
flush_tlb_other(mm);
}
if (mm == current->active_mm)
flush_tlb_current_page(mm, vma, addr); else
flush_tlb_other(mm);
}
/* Flush a specified range of user mapping. On the Alpha we flush
the whole user tlb. */ staticinlinevoid
flush_tlb_range(struct vm_area_struct *vma, unsignedlong start, unsignedlong end)
{
flush_tlb_mm(vma->vm_mm);
}
Die Informationen auf dieser Webseite wurden
nach bestem Wissen sorgfältig zusammengestellt. Es wird jedoch weder Vollständigkeit, noch Richtigkeit,
noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.