// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
*
https://beagley-ai.org/
*
* Copyright (C) 2024 Texas Instruments Incorporated -
https://www.ti.com/
* Copyright (C) 2024 Robert Nelson, BeagleBoard.org Foundation
*/
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-j722s.dtsi"
/ {
compatible = "beagle,am67a-beagley-ai", "ti,j722s";
model = "BeagleBoard.org BeagleY-AI";
aliases {
serial0 = &wkup_uart0;
serial2 = &main_uart0;
mmc1 = &sdhci1;
rtc0 = &rtc;
};
chosen {
stdout-path = &main_uart0;
};
memory@80000000 {
/* 4G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
<0x00000008 0x80000000 0x00000000 0x80000000>;
device_type = "memory";
bootph-pre-ram;
};
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
no-map;
};
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: memory@a0000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0000000 0x00 0x100000>;
no-map;
};
wkup_r5fss0_core0_memory_region: memory@a0100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
mcu_r5fss0_core0_dma_memory_region: memory@a1000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1000000 0x00 0x100000>;
no-map;
};
mcu_r5fss0_core0_memory_region: memory@a1100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa1100000 0x00 0xf00000>;
no-map;
};
main_r5fss0_core0_dma_memory_region: memory@a2000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa2000000 0x00 0x100000>;
no-map;
};
main_r5fss0_core0_memory_region: memory@a2100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa2100000 0x00 0xf00000>;
no-map;
};
c7x_0_dma_memory_region: memory@a3000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa3000000 0x00 0x100000>;
no-map;
};
c7x_0_memory_region: memory@a3100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa3100000 0x00 0xf00000>;
no-map;
};
c7x_1_dma_memory_region: memory@a4000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa4000000 0x00 0x100000>;
no-map;
};
c7x_1_memory_region: memory@a4100000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa4100000 0x00 0xf00000>;
no-map;
};
rtos_ipc_memory_region: memory@a5000000 {
reg = <0x00 0xa5000000 0x00 0x1c00000>;
alignment = <0x1000>;
no-map;
};
};
vsys_5v0: regulator-1 {
compatible = "regulator-fixed";
regulator-name = "vsys_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
bootph-all;
};
vdd_3v3: regulator-2 {
compatible = "regulator-fixed";
regulator-name = "vdd_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vsys_5v0>;
regulator-always-on;
regulator-boot-on;
};
vdd_mmc1: regulator-3 {
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
pinctrl-names = "default";
pinctrl-0 = <&vdd_3v3_sd_pins_default>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
enable-active-high;
gpio = <&main_gpio1 50 GPIO_ACTIVE_HIGH>;
bootph-all;
};
vdd_sd_dv: regulator-4 {
compatible = "regulator-gpio";
regulator-name = "tlv71033";
pinctrl-names = "default";
pinctrl-0 = <&vdd_sd_dv_pins_default>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
vin-supply = <&vsys_5v0>;
gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
states = <1800000 0x0>,
<3300000 0x1>;
bootph-all;
};
vsys_io_1v8: regulator-5 {
compatible = "regulator-fixed";
regulator-name = "vsys_io_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vsys_io_1v2: regulator-6 {
compatible = "regulator-fixed";
regulator-name = "vsys_io_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins_default>;
led-0 {
gpios = <&main_gpio0 11 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led-1 {
gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
function = LED_FUNCTION_HEARTBEAT;
default-state = "on";
};
};
};
&main_pmx0 {
main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D23) I2C0_SCL */
J722S_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (B22) I2C0_SDA */
>;
bootph-all;
};
main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01c8, PIN_INPUT, 0) /* (A22) UART0_RXD */
J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */
>;
bootph-all;
};
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0244, PIN_OUTPUT, 7) /* (A24) MMC1_SDWP.GPIO1_49 */
>;
bootph-all;
};
main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x023c, PIN_INPUT, 0) /* (H22) MMC1_CMD */
J722S_IOPAD(0x0234, PIN_OUTPUT, 0) /* (H24) MMC1_CLK */
J722S_IOPAD(0x0230, PIN_INPUT, 0) /* (H23) MMC1_DAT0 */
J722S_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H20) MMC1_DAT1 */
J722S_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (J23) MMC1_DAT2 */
J722S_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */
J722S_IOPAD(0x0240, PIN_INPUT, 7) /* (B24) MMC1_SDCD.GPIO1_48 */
>;
bootph-all;
};
mdio_pins_default: mdio-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
>;
};
rgmii1_pins_default: rgmii1-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */
J722S_IOPAD(0x0150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */
J722S_IOPAD(0x0154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */
J722S_IOPAD(0x0158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */
J722S_IOPAD(0x0148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */
J722S_IOPAD(0x0144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */
J722S_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */
J722S_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */
J722S_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */
J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */
J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
>;
};
led_pins_default: led-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x002c, PIN_OUTPUT, 7) /* (K26) OSPI0_CSn0.GPIO0_11 */
J722S_IOPAD(0x0030, PIN_OUTPUT, 7) /* (K23) OSPI0_CSn1.GPIO0_12 */
>;
};
pmic_irq_pins_default: pmic-irq-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) /* (B23) EXTINTn */
>;
};
vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins {
pinctrl-single,pins = <
J722S_IOPAD(0x0254, PIN_OUTPUT, 7) /* (E25) USB0_DRVVBUS.GPIO1_50 */
>;
};
};
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins_default>;
status = "okay";
};
&cpsw3g_mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins_default>;
status = "okay";
cpsw3g_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
ti,min-output-impedance;
};
};
&cpsw_port1 {
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
status = "okay";
};
&main_gpio1 {
bootph-all;
status = "okay";
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
bootph-all;
status = "okay";
};
&mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */
J722S_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (C6) WKUP_UART0_RTSn */
J722S_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */
J722S_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */
>;
bootph-all;
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
pinctrl-single,pins = <
J722S_MCU_IOPAD(0x04c, PIN_INPUT_PULLUP, 0) /* (C7) WKUP_I2C0_SCL */
J722S_MCU_IOPAD(0x050, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_I2C1_SDA */
>;
bootph-all;
};
};
&wkup_uart0 {
/* WKUP UART0 is used by Device Manager firmware */
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
bootph-all;
status = "reserved";
};
&wkup_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <100000>;
bootph-all;
status = "okay";
tps65219: pmic@30 {
compatible = "ti,tps65219";
reg = <0x30>;
buck1-supply = <&vsys_5v0>;
buck2-supply = <&vsys_5v0>;
buck3-supply = <&vsys_5v0>;
ldo1-supply = <&vdd_3v3>;
ldo3-supply = <&vdd_3v3>;
ldo4-supply = <&vdd_3v3>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_irq_pins_default>;
interrupt-parent = <&gic500>;
interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
bootph-all;
system-power-controller;
ti,power-button;
regulators {
buck1_reg: buck1 {
regulator-name = "VDD_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
buck2_reg: buck2 {
regulator-name = "VDD_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: ldo1 {
regulator-name = "VDDSHV5_SDIO";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-allow-bypass;
regulator-boot-on;
regulator-always-on;
};
ldo2_reg: ldo2 {
regulator-name = "VDD_1V2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-boot-on;
regulator-always-on;
};
ldo3_reg: ldo3 {
regulator-name = "VDDA_PHY_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo4_reg: ldo4 {
regulator-name = "VDDA_PLL_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
};
};
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
};
rtc: rtc@68 {
compatible = "dallas,ds1340";
reg = <0x68>;
};
};
&sdhci1 {
/* SD/MMC */
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vdd_sd_dv>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
disable-wp;
cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>;
cd-debounce-delay-ms = <100>;
bootph-all;
ti,fails-without-test-cd;
status = "okay";
};
&mailbox0_cluster0 {
status = "okay";
mbox_wkup_r5_0: mbox-wkup-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster1 {
status = "okay";
mbox_mcu_r5_0: mbox-mcu-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster2 {
status = "okay";
mbox_c7x_0: mbox-c7x-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster3 {
status = "okay";
mbox_main_r5_0: mbox-main-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
mbox_c7x_1: mbox-c7x-1 {
ti,mbox-rx = <2 0 0>;
ti,mbox-tx = <3 0 0>;
};
};
/* Timers are used by Remoteproc firmware */
&main_timer0 {
status = "reserved";
};
&main_timer1 {
status = "reserved";
};
&main_timer2 {
status = "reserved";
};
&wkup_r5fss0 {
status = "okay";
};
&wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
};
&mcu_r5fss0 {
status = "okay";
};
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
};
&main_r5fss0 {
status = "okay";
};
&main_r5fss0_core0 {
mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&c7x_0 {
mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
memory-region = <&c7x_0_dma_memory_region>,
<&c7x_0_memory_region>;
status = "okay";
};
&c7x_1 {
mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
memory-region = <&c7x_1_dma_memory_region>,
<&c7x_1_memory_region>;
status = "okay";
};
