Quelle  loongson-2k2000.dtsi   Sprache: unbekannt

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2023 Loongson Technology Corporation Limited
 */

/dts-v1/;

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/loongson,ls2k-clk.h>

/ {
 #address-cells = <2>;
 #size-cells = <2>;

 cpus {
  #address-cells = <1>;
  #size-cells = <0>;

  cpu0: cpu@1 {
   compatible = "loongson,la364";
   device_type = "cpu";
   reg = <0x0>;
   clocks = <&clk LOONGSON2_NODE_CLK>;
  };

  cpu1: cpu@2 {
   compatible = "loongson,la364";
   device_type = "cpu";
   reg = <0x1>;
   clocks = <&clk LOONGSON2_NODE_CLK>;
  };
 };

 ref_100m: clock-ref-100m {
  compatible = "fixed-clock";
  #clock-cells = <0>;
  clock-frequency = <100000000>;
  clock-output-names = "ref_100m";
 };

 cpuintc: interrupt-controller {
  compatible = "loongson,cpu-interrupt-controller";
  #interrupt-cells = <1>;
  interrupt-controller;
 };

 thermal-zones {
  cpu-thermal {
   polling-delay-passive = <1000>;
   polling-delay = <5000>;
   thermal-sensors = <&tsensor 0>;

   trips {
    cpu-alert {
     temperature = <40000>;
     hysteresis = <2000>;
     type = "active";
    };

    cpu-crit {
     temperature = <85000>;
     hysteresis = <5000>;
     type = "critical";
    };
   };
  };
 };

 bus@10000000 {
  compatible = "simple-bus";
  ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
    <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
    <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
    <0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
  #address-cells = <2>;
  #size-cells = <2>;

  isa@18400000 {
   compatible = "isa";
   #size-cells = <1>;
   #address-cells = <2>;
   ranges = <1 0x0 0x0 0x18400000 0x4000>;
  };

  clk: clock-controller@10010480 {
   compatible = "loongson,ls2k2000-clk";
   reg = <0x0 0x10010480 0x0 0x100>;
   #clock-cells = <1>;
   clocks = <&ref_100m>;
   clock-names = "ref_100m";
  };

  pmc: power-management@100d0000 {
   compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon";
   reg = <0x0 0x100d0000 0x0 0x58>;
   interrupt-parent = <&eiointc>;
   interrupts = <47>;
   loongson,suspend-address = <0x0 0x1c000500>;

   syscon-reboot {
    compatible = "syscon-reboot";
    offset = <0x30>;
    mask = <0x1>;
   };

   syscon-poweroff {
    compatible = "syscon-poweroff";
    regmap = <&pmc>;
    offset = <0x14>;
    mask = <0x3c00>;
    value = <0x3c00>;
   };
  };

  tsensor: thermal-sensor@1fe01460 {
   compatible = "loongson,ls2k2000-thermal";
   reg = <0x0 0x1fe01460 0x0 0x30>,
         <0x0 0x1fe0019c 0x0 0x4>;
   interrupt-parent = <&liointc>;
   interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
   #thermal-sensor-cells = <1>;
  };

  liointc: interrupt-controller@1fe01400 {
   compatible = "loongson,liointc-1.0";
   reg = <0x0 0x1fe01400 0x0 0x64>;

   interrupt-controller;
   #interrupt-cells = <2>;
   interrupt-parent = <&cpuintc>;
   interrupts = <2>;
   interrupt-names = "int0";
   loongson,parent_int_map = <0xffffffff>, /* int0 */
        <0x00000000>, /* int1 */
        <0x00000000>, /* int2 */
        <0x00000000>; /* int3 */
  };

  eiointc: interrupt-controller@1fe01600 {
   compatible = "loongson,ls2k2000-eiointc";
   reg = <0x0 0x1fe01600 0x0 0xea00>;
   interrupt-controller;
   #interrupt-cells = <1>;
   interrupt-parent = <&cpuintc>;
   interrupts = <3>;
  };

  pic: interrupt-controller@10000000 {
   compatible = "loongson,pch-pic-1.0";
   reg = <0x0 0x10000000 0x0 0x400>;
   interrupt-controller;
   #interrupt-cells = <2>;
   loongson,pic-base-vec = <0>;
   interrupt-parent = <&eiointc>;
  };

  msi: msi-controller@1fe01140 {
   compatible = "loongson,pch-msi-1.0";
   reg = <0x0 0x1fe01140 0x0 0x8>;
   interrupt-controller;
   #interrupt-cells = <1>;
   msi-controller;
   loongson,msi-base-vec = <64>;
   loongson,msi-num-vecs = <192>;
   interrupt-parent = <&eiointc>;
  };

  pwm@100a0000 {
   compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
   reg = <0x0 0x100a0000 0x0 0x10>;
   interrupt-parent = <&pic>;
   interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
   clocks = <&clk LOONGSON2_MISC_CLK>;
   #pwm-cells = <3>;
   status = "disabled";
  };

  pwm@100a0100 {
   compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
   reg = <0x0 0x100a0100 0x0 0x10>;
   interrupt-parent = <&pic>;
   interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
   clocks = <&clk LOONGSON2_MISC_CLK>;
   #pwm-cells = <3>;
   status = "disabled";
  };

  pwm@100a0200 {
   compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
   reg = <0x0 0x100a0200 0x0 0x10>;
   interrupt-parent = <&pic>;
   interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;
   clocks = <&clk LOONGSON2_MISC_CLK>;
   #pwm-cells = <3>;
   status = "disabled";
  };

  pwm@100a0300 {
   compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
   reg = <0x0 0x100a0300 0x0 0x10>;
   interrupt-parent = <&pic>;
   interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
   clocks = <&clk LOONGSON2_MISC_CLK>;
   #pwm-cells = <3>;
   status = "disabled";
  };

  pwm@100a0400 {
   compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
   reg = <0x0 0x100a0400 0x0 0x10>;
   interrupt-parent = <&pic>;
   interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
   clocks = <&clk LOONGSON2_MISC_CLK>;
   #pwm-cells = <3>;
   status = "disabled";
  };

  pwm@100a0500 {
   compatible = "loongson,ls2k2000-pwm", "loongson,ls7a-pwm";
   reg = <0x0 0x100a0500 0x0 0x10>;
   interrupt-parent = <&pic>;
   interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
   clocks = <&clk LOONGSON2_MISC_CLK>;
   #pwm-cells = <3>;
   status = "disabled";
  };

  rtc0: rtc@100d0100 {
   compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc";
   reg = <0x0 0x100d0100 0x0 0x100>;
   interrupt-parent = <&pic>;
   interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
   status = "disabled";
  };

  i2c@1fe00120 {
   compatible = "loongson,ls2k-i2c";
   reg = <0x0 0x1fe00120 0x0 0x8>;
   interrupt-parent = <&liointc>;
   interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
   status = "disabled";
  };

  i2c@1fe00130 {
   compatible = "loongson,ls2k-i2c";
   reg = <0x0 0x1fe00130 0x0 0x8>;
   interrupt-parent = <&liointc>;
   interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
   status = "disabled";
  };

  uart0: serial@1fe001e0 {
   compatible = "ns16550a";
   reg = <0x0 0x1fe001e0 0x0 0x10>;
   clock-frequency = <100000000>;
   interrupt-parent = <&liointc>;
   interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
   no-loopback-test;
   status = "disabled";
  };

  emmc: mmc@79990000 {
   compatible = "loongson,ls2k2000-mmc";
   reg = <0x0 0x79990000 0x0 0x1000>;
   interrupt-parent = <&pic>;
   interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
   clocks = <&clk LOONGSON2_EMMC_CLK>;
   status = "disabled";
  };

  mmc@79991000 {
   compatible = "loongson,ls2k2000-mmc";
   reg = <0x0 0x79991000 0x0 0x1000>;
   interrupt-parent = <&pic>;
   interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
   clocks = <&clk LOONGSON2_EMMC_CLK>;
   status = "disabled";
  };

  pcie@1a000000 {
   compatible = "loongson,ls2k-pci";
   reg = <0x0 0x1a000000 0x0 0x02000000>,
         <0xfe 0x0 0x0 0x20000000>;
   #address-cells = <3>;
   #size-cells = <2>;
   device_type = "pci";
   msi-parent = <&msi>;
   bus-range = <0x0 0xff>;
   ranges = <0x01000000 0x0 0x00008000 0x0 0x18408000 0x0 0x00008000>,
     <0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>;

   gmac0: ethernet@3,0 {
    reg = <0x1800 0x0 0x0 0x0 0x0>;
    interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
          <13 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-names = "macirq", "eth_lpi";
    interrupt-parent = <&pic>;
    status = "disabled";
   };

   gmac1: ethernet@3,1 {
    reg = <0x1900 0x0 0x0 0x0 0x0>;
    interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
          <15 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-names = "macirq", "eth_lpi";
    interrupt-parent = <&pic>;
    status = "disabled";
   };

   gmac2: ethernet@3,2 {
    reg = <0x1a00 0x0 0x0 0x0 0x0>;
    interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
          <18 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-names = "macirq", "eth_lpi";
    interrupt-parent = <&pic>;
    status = "disabled";
   };

   xhci0: usb@4,0 {
    reg = <0x2000 0x0 0x0 0x0 0x0>;
    interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-parent = <&pic>;
    status = "disabled";
   };

   xhci1: usb@19,0 {
    reg = <0xc800 0x0 0x0 0x0 0x0>;
    interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-parent = <&pic>;
    status = "disabled";
   };

   display@6,1 {
    reg = <0x3100 0x0 0x0 0x0 0x0>;
    interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-parent = <&pic>;
    status = "disabled";
   };

   i2s@7,0 {
    reg = <0x3800 0x0 0x0 0x0 0x0>;
    interrupts = <78 IRQ_TYPE_LEVEL_HIGH>,
          <79 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-names = "tx", "rx";
    interrupt-parent = <&pic>;
    status = "disabled";
   };

   sata: sata@8,0 {
    reg = <0x4000 0x0 0x0 0x0 0x0>;
    interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-parent = <&pic>;
    status = "disabled";
   };

   pcie@9,0 {
    reg = <0x4800 0x0 0x0 0x0 0x0>;
    #address-cells = <3>;
    #size-cells = <2>;
    device_type = "pci";
    interrupt-parent = <&pic>;
    #interrupt-cells = <1>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
    ranges;
   };

   pcie@a,0 {
    reg = <0x5000 0x0 0x0 0x0 0x0>;
    #address-cells = <3>;
    #size-cells = <2>;
    device_type = "pci";
    interrupt-parent = <&pic>;
    #interrupt-cells = <1>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
    ranges;
   };

   pcie@b,0 {
    reg = <0x5800 0x0 0x0 0x0 0x0>;
    #address-cells = <3>;
    #size-cells = <2>;
    device_type = "pci";
    interrupt-parent = <&pic>;
    #interrupt-cells = <1>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
    ranges;
   };

   pcie@c,0 {
    reg = <0x6000 0x0 0x0 0x0 0x0>;
    #address-cells = <3>;
    #size-cells = <2>;
    device_type = "pci";
    interrupt-parent = <&pic>;
    #interrupt-cells = <1>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
    ranges;
   };

   pcie@d,0 {
    reg = <0x6800 0x0 0x0 0x0 0x0>;
    #address-cells = <3>;
    #size-cells = <2>;
    device_type = "pci";
    interrupt-parent = <&pic>;
    #interrupt-cells = <1>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
    ranges;
   };

   pcie@e,0 {
    reg = <0x7000 0x0 0x0 0x0 0x0>;
    #address-cells = <3>;
    #size-cells = <2>;
    device_type = "pci";
    interrupt-parent = <&pic>;
    #interrupt-cells = <1>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
    ranges;
   };

   pcie@f,0 {
    reg = <0x7800 0x0 0x0 0x0 0x0>;
    #address-cells = <3>;
    #size-cells = <2>;
    device_type = "pci";
    interrupt-parent = <&pic>;
    #interrupt-cells = <1>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
    ranges;
   };

   pcie@10,0 {
    reg = <0x8000 0x0 0x0 0x0 0x0>;
    #address-cells = <3>;
    #size-cells = <2>;
    device_type = "pci";
    interrupt-parent = <&pic>;
    #interrupt-cells = <1>;
    interrupt-map-mask = <0x0 0x0 0x0 0x0>;
    interrupt-map = <0x0 0x0 0x0 0x0 &pic 30 IRQ_TYPE_LEVEL_HIGH>;
    ranges;
   };
  };
 };
};