#ifdefined(CONFIG_X86_32) /* * This lock provides nmi access to the CMOS/RTC registers. It has some * special properties. It is owned by a CPU and stores the index register * currently being accessed (if owned). The idea here is that it works * like a normal lock (normally). However, in an NMI, the NMI code will * first check to see if its CPU owns the lock, meaning that the NMI * interrupted during the read/write of the device. If it does, it goes ahead * and performs the access and then restores the index register. If it does * not, it locks normally. * * Note that since we are working with NMIs, we need this lock even in * a non-SMP machine just to mark that the lock is owned. * * This only works with compare-and-swap. There is no other way to * atomically claim the lock and set the owner.
*/ #include <linux/smp.h> externvolatileunsignedlong cmos_lock;
/* * All of these below must be called with interrupts off, preempt * disabled, etc.
*/
staticinlinevoid lock_cmos(unsignedchar reg)
{ unsignedlongnew; new = ((smp_processor_id() + 1) << 8) | reg; for (;;) { if (cmos_lock) {
cpu_relax(); continue;
} if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0) return;
}
}
#define lock_cmos_suffix(reg) \
unlock_cmos(); \
local_irq_restore(cmos_flags); \
} while (0) #else #define lock_cmos_prefix(reg) do {} while (0) #define lock_cmos_suffix(reg) do {} while (0) #define lock_cmos(reg) do { } while (0) #define unlock_cmos() do { } while (0) #define do_i_have_lock_cmos() 0 #define current_lock_cmos_reg() 0 #endif
/* * The yet supported machines all access the RTC index register via * an ISA port access but the way to access the date register differs ...
*/ #define CMOS_READ(addr) rtc_cmos_read(addr) #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr) unsignedchar rtc_cmos_read(unsignedchar addr); void rtc_cmos_write(unsignedchar val, unsignedchar addr);
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