// SPDX-License-Identifier: GPL-2.0-only /* * pata_triflex.c - Compaq PATA for new ATA layer * (C) 2005 Red Hat Inc * Alan Cox <alan@lxorguk.ukuu.org.uk> * * based upon * * triflex.c * * IDE Chipset driver for the Compaq TriFlex IDE controller. * * Known to work with the Compaq Workstation 5x00 series. * * Copyright (C) 2002 Hewlett-Packard Development Group, L.P. * Author: Torben Mathiasen <torben.mathiasen@hp.com> * * Loosely based on the piix & svwks drivers. * * Documentation: * Not publicly available.
*/
/** * triflex_prereset - probe begin * @link: ATA link * @deadline: deadline jiffies for the operation * * Set up cable type and use generic probe init
*/
if (!pci_test_config_bits(pdev, &triflex_enable_bits[ap->port_no])) return -ENOENT;
return ata_sff_prereset(link, deadline);
}
/** * triflex_load_timing - timing configuration * @ap: ATA interface * @adev: Device on the bus * @speed: speed to configure * * The Triflex has one set of timings per device per channel. This * means we must do some switching. As the PIO and DMA timings don't * match we have to do some reloading unlike PIIX devices where tuning * tricks can avoid it.
*/
switch(speed)
{ case XFER_MW_DMA_2:
timing = 0x0103;break; case XFER_MW_DMA_1:
timing = 0x0203;break; case XFER_MW_DMA_0:
timing = 0x0808;break; case XFER_SW_DMA_2: case XFER_SW_DMA_1: case XFER_SW_DMA_0:
timing = 0x0F0F;break; case XFER_PIO_4:
timing = 0x0202;break; case XFER_PIO_3:
timing = 0x0204;break; case XFER_PIO_2:
timing = 0x0404;break; case XFER_PIO_1:
timing = 0x0508;break; case XFER_PIO_0:
timing = 0x0808;break; default:
BUG();
}
triflex_timing &= ~ (0xFFFF << (16 * is_slave));
triflex_timing |= (timing << (16 * is_slave));
if (triflex_timing != old_triflex_timing)
pci_write_config_dword(pdev, channel_offset, triflex_timing);
}
/** * triflex_set_piomode - set initial PIO mode data * @ap: ATA interface * @adev: ATA device * * Use the timing loader to set up the PIO mode. We have to do this * because DMA start/stop will only be called once DMA occurs. If there * has been no DMA then the PIO timings are still needed.
*/ staticvoid triflex_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
triflex_load_timing(ap, adev, adev->pio_mode);
}
/** * triflex_bmdma_start - DMA start callback * @qc: Command in progress * * Usually drivers set the DMA timing at the point the set_dmamode call * is made. Triflex however requires we load new timings on the * transition or keep matching PIO/DMA pairs (ie MWDMA2/PIO4 etc). * We load the DMA timings just before starting DMA and then restore * the PIO timing when the DMA is finished.
*/
/** * triflex_bmdma_stop - DMA stop callback * @qc: ATA command * * We loaded new timings in dma_start, as a result we need to restore * the PIO timings in dma_stop so that the next command issue gets the * right clock values.
*/
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