/* * If the GPU managed to complete this jobs fence, the timeout has * fired before free-job worker. The timeout is spurious, so bail out.
*/ if (dma_fence_is_signaled(submit->out_fence)) return DRM_GPU_SCHED_STAT_NO_HANG;
/* * If the GPU is still making forward progress on the front-end (which * should never loop) we shift out the timeout to give it a chance to * finish the job.
*/
dma_addr = gpu_read(gpu, VIVS_FE_DMA_ADDRESS);
change = dma_addr - gpu->hangcheck_dma_addr; if (submit->exec_state == ETNA_PIPE_3D) { /* guard against concurrent usage from perfmon_sample */
mutex_lock(&gpu->lock);
gpu_write(gpu, VIVS_MC_PROFILE_CONFIG0,
VIVS_MC_PROFILE_CONFIG0_FE_CURRENT_PRIM <<
VIVS_MC_PROFILE_CONFIG0_FE__SHIFT);
primid = gpu_read(gpu, VIVS_MC_PROFILE_FE_READ);
mutex_unlock(&gpu->lock);
} if (gpu->state == ETNA_GPU_STATE_RUNNING &&
(gpu->completed_fence != gpu->hangcheck_fence ||
change < 0 || change > 16 ||
(submit->exec_state == ETNA_PIPE_3D &&
gpu->hangcheck_primid != primid))) {
gpu->hangcheck_dma_addr = dma_addr;
gpu->hangcheck_primid = primid;
gpu->hangcheck_fence = gpu->completed_fence; return DRM_GPU_SCHED_STAT_NO_HANG;
}
int etnaviv_sched_push_job(struct etnaviv_gem_submit *submit)
{ struct etnaviv_gpu *gpu = submit->gpu; int ret;
/* * Hold the sched lock across the whole operation to avoid jobs being * pushed out of order with regard to their sched fence seqnos as * allocated in drm_sched_job_arm.
*/
mutex_lock(&gpu->sched_lock);
drm_sched_job_arm(&submit->sched_job);
submit->out_fence = dma_fence_get(&submit->sched_job.s_fence->finished);
ret = xa_alloc_cyclic(&gpu->user_fences, &submit->out_fence_id,
submit->out_fence, xa_limit_32b,
&gpu->next_user_fence, GFP_KERNEL); if (ret < 0) {
drm_sched_job_cleanup(&submit->sched_job); goto out_unlock;
}
/* the scheduler holds on to the job now */
kref_get(&submit->refcount);
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