if (i915_gem_object_is_volatile(obj))
obj->mm.madv = I915_MADV_DONTNEED;
/* Make the pages coherent with the GPU (flushing any swapin). */ if (obj->cache_dirty) {
WARN_ON_ONCE(IS_DGFX(i915));
obj->write_domain = 0; if (i915_gem_object_has_struct_page(obj))
drm_clflush_sg(pages);
obj->cache_dirty = false;
}
/* * Calculate the supported page-sizes which fit into the given * sg_page_sizes. This will give us the page-sizes which we may be able * to use opportunistically when later inserting into the GTT. For * example if phys=2G, then in theory we should be able to use 1G, 2M, * 64K or 4K pages, although in practice this will depend on a number of * other factors.
*/
obj->mm.page_sizes.sg = 0;
for_each_set_bit(i, &supported, ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) { if (obj->mm.page_sizes.phys & ~0u << i)
obj->mm.page_sizes.sg |= BIT(i);
}
GEM_BUG_ON(!HAS_PAGE_SIZES(i915, obj->mm.page_sizes.sg));
/* Ensure that the associated pages are gathered from the backing storage * and pinned into our object. i915_gem_object_pin_pages() may be called * multiple times before they are released by a single call to * i915_gem_object_unpin_pages() - once the pages are no longer referenced * either as a result of memory pressure (reaping pages under the shrinker) * or as the object is itself released.
*/ int __i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
{ int err;
assert_object_held(obj);
assert_object_held_shared(obj);
if (unlikely(!i915_gem_object_has_pages(obj))) {
GEM_BUG_ON(i915_gem_object_has_pinned_pages(obj));
err = ____i915_gem_object_get_pages(obj); if (err) return err;
int __i915_gem_object_put_pages(struct drm_i915_gem_object *obj)
{ struct sg_table *pages;
if (i915_gem_object_has_pinned_pages(obj)) return -EBUSY;
/* May be called by shrinker from within get_pages() (on another bo) */
assert_object_held_shared(obj);
i915_gem_object_release_mmap_offset(obj);
/* * ->put_pages might need to allocate memory for the bit17 swizzle * array, hence protect them from being reaped by removing them from gtt * lists early.
*/
pages = __i915_gem_object_unset_pages(obj);
/* * XXX Temporary hijinx to avoid updating all backends to handle * NULL pages. In the future, when we have more asynchronous * get_pages backends we should be better able to handle the * cancellation of the async task in a more uniform manner.
*/ if (!IS_ERR_OR_NULL(pages))
obj->ops->put_pages(obj, pages);
switch (type) { default:
MISSING_CASE(type);
fallthrough; /* to use PAGE_KERNEL anyway */ case I915_MAP_WB: /* * On 32b, highmem using a finite set of indirect PTE (i.e. * vmap) to provide virtual mappings of the high pages. * As these are finite, map_new_virtual() must wait for some * other kmap() to finish when it runs out. If we map a large * number of objects, there is no method for it to tell us * to release the mappings, and we deadlock. * * However, if we make an explicit vmap of the page, that * uses a larger vmalloc arena, and also has the ability * to tell us to release unwanted mappings. Most importantly, * it will fail and propagate an error instead of waiting * forever. * * So if the page is beyond the 32b boundary, make an explicit * vmap.
*/ if (n_pages == 1 && !PageHighMem(sg_page(obj->mm.pages->sgl))) return page_address(sg_page(obj->mm.pages->sgl));
pgprot = PAGE_KERNEL; break; case I915_MAP_WC:
pgprot = pgprot_writecombine(PAGE_KERNEL_IO); break;
}
if (n_pages > ARRAY_SIZE(stack)) { /* Too big for stack -- allocate temporary array instead */
pages = kvmalloc_array(n_pages, sizeof(*pages), GFP_KERNEL); if (!pages) return ERR_PTR(-ENOMEM);
}
i = 0;
for_each_sgt_page(page, iter, obj->mm.pages)
pages[i++] = page;
vaddr = vmap(pages, n_pages, 0, pgprot); if (pages != stack)
kvfree(pages);
/* For a 3840x2160 32 bits Framebuffer, this should require ~64K */
pages = kmalloc_array(n_pages, sizeof(*pages), GFP_ATOMIC); if (!pages) return NULL;
/* * The scanout buffer pages are not mapped, so for each pixel, * use kmap_local_page_try_from_panic() to map the page, and write the pixel. * Try to keep the map from the previous pixel, to avoid too much map/unmap.
*/ staticvoid i915_gem_object_panic_page_set_pixel(struct drm_scanout_buffer *sb, unsignedint x, unsignedint y, u32 color)
{ unsignedint new_page; unsignedint offset; struct intel_framebuffer *fb = (struct intel_framebuffer *)sb->private; struct i915_panic_data *panic = to_i915_panic_data(fb);
if (fb->panic_tiling)
offset = fb->panic_tiling(sb->width, x, y); else
offset = y * sb->pitch[0] + x * sb->format->cpp[0];
/* * Setup the gem framebuffer for drm_panic access. * Use current vaddr if it exists, or setup a list of pages. * pfn is not supported yet.
*/ int i915_gem_object_panic_setup(struct drm_scanout_buffer *sb)
{ enum i915_map_type has_type; struct intel_framebuffer *fb = (struct intel_framebuffer *)sb->private; struct i915_panic_data *panic = to_i915_panic_data(fb); struct drm_i915_gem_object *obj = to_intel_bo(intel_fb_bo(&fb->base)); void *ptr;
ptr = page_unpack_bits(obj->mm.mapping, &has_type); if (ptr) { if (i915_gem_object_has_iomem(obj))
iosys_map_set_vaddr_iomem(&sb->map[0], (void __iomem *)ptr); else
iosys_map_set_vaddr(&sb->map[0], ptr);
if (fb->panic_tiling)
sb->set_pixel = i915_gem_object_panic_map_set_pixel; return 0;
} if (i915_gem_object_has_struct_page(obj)) {
panic->pages = i915_gem_object_panic_pages(obj); if (!panic->pages) return -ENOMEM;
panic->page = -1;
sb->set_pixel = i915_gem_object_panic_page_set_pixel; return 0;
} return -EOPNOTSUPP;
}
/* get, pin, and map the pages of the object into kernel space */ void *i915_gem_object_pin_map(struct drm_i915_gem_object *obj, enum i915_map_type type)
{ enum i915_map_type has_type; bool pinned; void *ptr; int err;
if (!i915_gem_object_has_struct_page(obj) &&
!i915_gem_object_has_iomem(obj)) return ERR_PTR(-ENXIO);
if (WARN_ON_ONCE(obj->flags & I915_BO_ALLOC_GPU_ONLY)) return ERR_PTR(-EINVAL);
assert_object_held(obj);
pinned = !(type & I915_MAP_OVERRIDE);
type &= ~I915_MAP_OVERRIDE;
if (!atomic_inc_not_zero(&obj->mm.pages_pin_count)) { if (unlikely(!i915_gem_object_has_pages(obj))) {
GEM_BUG_ON(i915_gem_object_has_pinned_pages(obj));
err = ____i915_gem_object_get_pages(obj); if (err) return ERR_PTR(err);
/* * For discrete our CPU mappings needs to be consistent in order to * function correctly on !x86. When mapping things through TTM, we use * the same rules to determine the caching type. * * The caching rules, starting from DG1: * * - If the object can be placed in device local-memory, then the * pages should be allocated and mapped as write-combined only. * * - Everything else is always allocated and mapped as write-back, * with the guarantee that everything is also coherent with the * GPU. * * Internal users of lmem are already expected to get this right, so no * fudging needed there.
*/ if (i915_gem_object_placement_possible(obj, INTEL_MEMORY_LOCAL)) { if (type != I915_MAP_WC && !obj->mm.n_placements) {
ptr = ERR_PTR(-ENODEV); goto err_unpin;
}
type = I915_MAP_WC;
} elseif (IS_DGFX(to_i915(obj->base.dev))) {
type = I915_MAP_WB;
}
ptr = page_unpack_bits(obj->mm.mapping, &has_type); if (ptr && has_type != type) { if (pinned) {
ptr = ERR_PTR(-EBUSY); goto err_unpin;
}
unmap_object(obj, ptr);
ptr = obj->mm.mapping = NULL;
}
if (!ptr) {
err = i915_gem_object_wait_moving_fence(obj, true); if (err) {
ptr = ERR_PTR(err); goto err_unpin;
}
/* * We allow removing the mapping from underneath pinned pages! * * Furthermore, since this is an unsafe operation reserved only * for construction time manipulation, we ignore locking prudence.
*/
unmap_object(obj, page_mask_bits(fetch_and_zero(&obj->mm.mapping)));
{ constbool dma = iter == &obj->mm.get_dma_page ||
iter == &obj->ttm.get_io_page; unsignedint idx, count; struct scatterlist *sg;
might_sleep();
GEM_BUG_ON(n >= obj->base.size >> PAGE_SHIFT); if (!i915_gem_object_has_pinned_pages(obj))
assert_object_held(obj);
/* As we iterate forward through the sg, we record each entry in a * radixtree for quick repeated (backwards) lookups. If we have seen * this index previously, we will have an entry for it. * * Initial lookup is O(N), but this is amortized to O(1) for * sequential page access (where each new request is consecutive * to the previous one). Repeated lookups are O(lg(obj->base.size)), * i.e. O(1) with a large constant!
*/ if (n < READ_ONCE(iter->sg_idx)) goto lookup;
mutex_lock(&iter->lock);
/* We prefer to reuse the last sg so that repeated lookup of this * (or the subsequent) sg are fast - comparing against the last * sg is faster than going through the radixtree.
*/
while (idx + count <= n) { void *entry; unsignedlong i; int ret;
/* If we cannot allocate and insert this entry, or the * individual pages from this range, cancel updating the * sg_idx so that on this lookup we are forced to linearly * scan onwards, but on future lookups we will try the * insertion again (in which case we need to be careful of * the error return reporting that we have already inserted * this index).
*/
ret = radix_tree_insert(&iter->radix, idx, sg); if (ret && ret != -EEXIST) goto scan;
entry = xa_mk_value(idx); for (i = 1; i < count; i++) {
ret = radix_tree_insert(&iter->radix, idx + i, entry); if (ret && ret != -EEXIST) goto scan;
}
if (unlikely(n < idx)) /* insertion completed by another thread */ goto lookup;
/* In case we failed to insert the entry into the radixtree, we need * to look beyond the current sg.
*/ while (idx + count <= n) {
idx += count;
sg = ____sg_next(sg);
count = dma ? __sg_dma_page_count(sg) : __sg_page_count(sg);
}
/* If this index is in the middle of multi-page sg entry, * the radix tree will contain a value entry that points * to the start of that range. We will return the pointer to * the base page and the offset of this page within the * sg entry's range.
*/
*offset = 0; if (unlikely(xa_is_value(sg))) { unsignedlong base = xa_to_value(sg);
sg = i915_gem_object_get_sg(obj, n, &offset); return nth_page(sg_page(sg), offset);
}
/* Like i915_gem_object_get_page(), but mark the returned page dirty */ struct page *
__i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj, pgoff_t n)
{ struct page *page;
page = i915_gem_object_get_page(obj, n); if (!obj->mm.dirty)
set_page_dirty(page);
Die Informationen auf dieser Webseite wurden
nach bestem Wissen sorgfältig zusammengestellt. Es wird jedoch weder Vollständigkeit, noch Richtigkeit,
noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.