/* * i2c master auxiliary bus transfer function. * Requires the i2c operations to be correctly setup before. * Disables SLV0 and checks for NACK status internally. * Assumes that only SLV0 is used for transfers.
*/ staticint inv_mpu_i2c_master_xfer(conststruct inv_mpu6050_state *st)
{ /* use 50hz frequency for xfer */ constunsignedint freq = 50; constunsignedint period_ms = 1000 / freq;
uint8_t d; unsignedint user_ctrl; int ret; unsignedint status;
/* set sample rate */
d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(freq);
ret = regmap_write(st->map, st->reg->sample_rate_div, d); if (ret) return ret;
/* start i2c master */
user_ctrl = st->chip_config.user_ctrl | INV_MPU6050_BIT_I2C_MST_EN;
ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); if (ret) goto error_restore_rate;
/* wait for xfer: 1 period + half-period margin */
msleep(period_ms + period_ms / 2);
/* stop i2c master */
user_ctrl = st->chip_config.user_ctrl;
ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); if (ret) goto error_stop_i2c;
/* restore sample rate */
d = st->chip_config.divider;
ret = regmap_write(st->map, st->reg->sample_rate_div, d); if (ret) goto error_restore_rate;
/* disable i2c slave */
ret = regmap_write(st->map, INV_MPU6050_REG_I2C_SLV_CTRL(0), 0); if (ret) goto error_disable_i2c;
/* check i2c status */
ret = regmap_read(st->map, INV_MPU6050_REG_I2C_MST_STATUS, &status); if (ret) return ret;
if (status & INV_MPU6050_BIT_I2C_SLV0_NACK) return -EIO;
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