/* data bit timings */ #define CEC_TIM_DATA_BIT_0_LOW 1500 #define CEC_TIM_DATA_BIT_0_LOW_MIN 1300 #define CEC_TIM_DATA_BIT_0_LOW_MAX 1700 #define CEC_TIM_DATA_BIT_1_LOW 600 #define CEC_TIM_DATA_BIT_1_LOW_MIN 400 #define CEC_TIM_DATA_BIT_1_LOW_MAX 800 #define CEC_TIM_DATA_BIT_TOTAL 2400 #define CEC_TIM_DATA_BIT_TOTAL_MIN 2050 #define CEC_TIM_DATA_BIT_TOTAL_MAX 2750 /* earliest safe time to sample the bit state */ #define CEC_TIM_DATA_BIT_SAMPLE 850 /* earliest time the bit is back to 1 (T7 + 50) */ #define CEC_TIM_DATA_BIT_HIGH 1750
/* when idle, sample once per millisecond */ #define CEC_TIM_IDLE_SAMPLE 1000 /* when processing the start bit, sample twice per millisecond */ #define CEC_TIM_START_BIT_SAMPLE 500 /* when polling for a state change, sample once every 50 microseconds */ #define CEC_TIM_SAMPLE 50
/* * Total data bit time that is too short/long for a valid bit, * used for error injection.
*/ #define CEC_TIM_DATA_BIT_TOTAL_SHORT 1800 #define CEC_TIM_DATA_BIT_TOTAL_LONG 2900
/* * Total start bit time that is too short/long for a valid bit, * used for error injection.
*/ #define CEC_TIM_START_BIT_TOTAL_SHORT 4100 #define CEC_TIM_START_BIT_TOTAL_LONG 5000
/* Data bits are 0-7, EOM is bit 8 and ACK is bit 9 */ #define EOM_BIT 8 #define ACK_BIT 9
staticbool cec_pin_read(struct cec_pin *pin)
{ bool v = call_pin_op(pin, read);
cec_pin_update(pin, v, false); return v;
}
staticvoid cec_pin_insert_glitch(struct cec_pin *pin, bool rising_edge)
{ /* * Insert a short glitch after the falling or rising edge to * simulate reflections on the CEC line. This can be used to * test deglitch filters, which should be present in CEC devices * to deal with noise on the line.
*/ if (!pin->tx_glitch_high_usecs || !pin->tx_glitch_low_usecs) return; if (rising_edge) {
udelay(pin->tx_glitch_high_usecs);
call_void_pin_op(pin, low);
udelay(pin->tx_glitch_low_usecs);
call_void_pin_op(pin, high);
} else {
udelay(pin->tx_glitch_low_usecs);
call_void_pin_op(pin, high);
udelay(pin->tx_glitch_high_usecs);
call_void_pin_op(pin, low);
}
}
staticvoid cec_pin_to_idle(struct cec_pin *pin)
{ /* * Reset all status fields, release the bus and * go to idle state.
*/
pin->rx_bit = pin->tx_bit = 0;
pin->rx_msg.len = 0;
memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
pin->ts = ns_to_ktime(0);
pin->tx_generated_poll = false;
pin->tx_post_eom = false; if (pin->state >= CEC_ST_TX_WAIT &&
pin->state <= CEC_ST_TX_LOW_DRIVE)
pin->tx_toggle ^= 1; if (pin->state >= CEC_ST_RX_START_BIT_LOW &&
pin->state <= CEC_ST_RX_LOW_DRIVE)
pin->rx_toggle ^= 1;
pin->state = CEC_ST_IDLE;
}
/* * Handle Transmit-related states * * Basic state changes when transmitting: * * Idle -> Tx Wait (waiting for the end of signal free time) -> * Tx Start Bit Low -> Tx Start Bit High -> * * Regular data bits + EOM: * Tx Data 0 Low -> Tx Data 0 High -> * or: * Tx Data 1 Low -> Tx Data 1 High -> * * First 4 data bits or Ack bit: * Tx Data 0 Low -> Tx Data 0 High -> * or: * Tx Data 1 Low -> Tx Data 1 High -> Tx Data 1 Pre Sample -> * Tx Data 1 Post Sample -> * * After the last Ack go to Idle. * * If it detects a Low Drive condition then: * Tx Wait For High -> Idle * * If it loses arbitration, then it switches to state Rx Data Post Sample.
*/ staticvoid cec_pin_tx_states(struct cec_pin *pin, ktime_t ts)
{ bool v; bool is_ack_bit, ack;
switch (pin->state) { case CEC_ST_TX_WAIT_FOR_HIGH: if (cec_pin_read(pin))
cec_pin_to_idle(pin); break;
case CEC_ST_TX_START_BIT_LOW_CUSTOM:
pin->state = CEC_ST_TX_START_BIT_HIGH_CUSTOM; /* Generate start bit */
cec_pin_high(pin); break;
case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE: case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT: case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG: if (pin->tx_nacked) {
cec_pin_to_idle(pin);
pin->tx_msg.len = 0; if (pin->tx_generated_poll) break;
pin->work_tx_ts = ts;
pin->work_tx_status = CEC_TX_STATUS_NACK;
wake_up_interruptible(&pin->kthread_waitq); break;
}
fallthrough; case CEC_ST_TX_DATA_BIT_0_HIGH: case CEC_ST_TX_DATA_BIT_0_HIGH_SHORT: case CEC_ST_TX_DATA_BIT_0_HIGH_LONG: case CEC_ST_TX_DATA_BIT_1_HIGH: case CEC_ST_TX_DATA_BIT_1_HIGH_SHORT: case CEC_ST_TX_DATA_BIT_1_HIGH_LONG: /* * If the read value is 1, then all is OK, otherwise we have a * low drive condition. * * Special case: when we generate a poll message due to an * Arbitration Lost error injection, then ignore this since * the pin can actually be low in that case.
*/ if (!cec_pin_read(pin) && !pin->tx_generated_poll) { /* * It's 0, so someone detected an error and pulled the * line low for 1.5 times the nominal bit period.
*/
pin->tx_msg.len = 0;
pin->state = CEC_ST_TX_WAIT_FOR_HIGH;
pin->work_tx_ts = ts;
pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
pin->tx_low_drive_cnt++;
wake_up_interruptible(&pin->kthread_waitq); break;
}
fallthrough; case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM: if (tx_last_bit(pin)) { /* Error Injection: just stop sending after this bit */
cec_pin_to_idle(pin);
pin->tx_msg.len = 0; if (pin->tx_generated_poll) break;
pin->work_tx_ts = ts;
pin->work_tx_status = CEC_TX_STATUS_OK;
wake_up_interruptible(&pin->kthread_waitq); break;
}
pin->tx_bit++;
fallthrough; case CEC_ST_TX_START_BIT_HIGH: case CEC_ST_TX_START_BIT_HIGH_SHORT: case CEC_ST_TX_START_BIT_HIGH_LONG: case CEC_ST_TX_START_BIT_HIGH_CUSTOM: if (tx_low_drive(pin)) { /* Error injection: go to low drive */
cec_pin_low(pin);
pin->state = CEC_ST_TX_LOW_DRIVE;
pin->tx_msg.len = 0; if (pin->tx_generated_poll) break;
pin->work_tx_ts = ts;
pin->work_tx_status = CEC_TX_STATUS_LOW_DRIVE;
pin->tx_low_drive_cnt++;
wake_up_interruptible(&pin->kthread_waitq); break;
} if (pin->tx_bit / 10 >= pin->tx_msg.len + pin->tx_extra_bytes) {
cec_pin_to_idle(pin);
pin->tx_msg.len = 0; if (pin->tx_generated_poll) break;
pin->work_tx_ts = ts;
pin->work_tx_status = CEC_TX_STATUS_OK;
wake_up_interruptible(&pin->kthread_waitq); break;
}
switch (pin->tx_bit % 10) { default: { /* * In the CEC_ERROR_INJ_TX_ADD_BYTES case we transmit * extra bytes, so pin->tx_bit / 10 can become >= 16. * Generate bit values for those extra bytes instead * of reading them from the transmit buffer.
*/ unsignedint idx = (pin->tx_bit / 10);
u8 val = idx;
if (idx < pin->tx_msg.len)
val = pin->tx_msg.msg[idx];
v = val & (1 << (7 - (pin->tx_bit % 10)));
v = !pin->tx_post_eom && tx_byte_idx == tot_len - 1; if (tot_len > 1 && tx_byte_idx == tot_len - 2 &&
tx_early_eom(pin)) { /* Error injection: set EOM one byte early */
v = true;
pin->tx_post_eom = true;
} elseif (v && tx_no_eom(pin)) { /* Error injection: no EOM */
v = false;
}
pin->state = v ? CEC_ST_TX_DATA_BIT_1_LOW :
CEC_ST_TX_DATA_BIT_0_LOW; break;
} case ACK_BIT:
pin->state = CEC_ST_TX_DATA_BIT_1_LOW; break;
} if (tx_custom_bit(pin))
pin->state = CEC_ST_TX_DATA_BIT_LOW_CUSTOM;
cec_pin_low(pin); break;
case CEC_ST_TX_DATA_BIT_0_LOW: case CEC_ST_TX_DATA_BIT_1_LOW:
v = pin->state == CEC_ST_TX_DATA_BIT_1_LOW;
is_ack_bit = pin->tx_bit % 10 == ACK_BIT; if (v && (pin->tx_bit < 4 || is_ack_bit)) {
pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE;
} elseif (!is_ack_bit && tx_short_bit(pin)) { /* Error Injection: send an invalid (too short) bit */
pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_SHORT :
CEC_ST_TX_DATA_BIT_0_HIGH_SHORT;
} elseif (!is_ack_bit && tx_long_bit(pin)) { /* Error Injection: send an invalid (too long) bit */
pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH_LONG :
CEC_ST_TX_DATA_BIT_0_HIGH_LONG;
} else {
pin->state = v ? CEC_ST_TX_DATA_BIT_1_HIGH :
CEC_ST_TX_DATA_BIT_0_HIGH;
}
cec_pin_high(pin); break;
case CEC_ST_TX_DATA_BIT_LOW_CUSTOM:
pin->state = CEC_ST_TX_DATA_BIT_HIGH_CUSTOM;
cec_pin_high(pin); break;
case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE: /* Read the CEC value at the sample time */
v = cec_pin_read(pin);
is_ack_bit = pin->tx_bit % 10 == ACK_BIT; /* * If v == 0 and we're within the first 4 bits * of the initiator, then someone else started * transmitting and we lost the arbitration * (i.e. the logical address of the other * transmitter has more leading 0 bits in the * initiator).
*/ if (!v && !is_ack_bit && !pin->tx_generated_poll) {
pin->tx_msg.len = 0;
pin->work_tx_ts = ts;
pin->work_tx_status = CEC_TX_STATUS_ARB_LOST;
wake_up_interruptible(&pin->kthread_waitq);
pin->rx_bit = pin->tx_bit;
pin->tx_bit = 0;
memset(pin->rx_msg.msg, 0, sizeof(pin->rx_msg.msg));
pin->rx_msg.msg[0] = pin->tx_msg.msg[0];
pin->rx_msg.msg[0] &= (0xff << (8 - pin->rx_bit));
pin->rx_msg.len = 0;
pin->ts = ktime_sub_us(ts, CEC_TIM_DATA_BIT_SAMPLE);
pin->state = CEC_ST_RX_DATA_POST_SAMPLE;
pin->rx_bit++; break;
}
pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE; if (!is_ack_bit && tx_short_bit(pin)) { /* Error Injection: send an invalid (too short) bit */
pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT;
} elseif (!is_ack_bit && tx_long_bit(pin)) { /* Error Injection: send an invalid (too long) bit */
pin->state = CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG;
} if (!is_ack_bit) break; /* Was the message ACKed? */
ack = cec_msg_is_broadcast(&pin->tx_msg) ? v : !v; if (!ack && (!pin->tx_ignore_nack_until_eom ||
pin->tx_bit / 10 == pin->tx_msg.len - 1) &&
!pin->tx_post_eom) { /* * Note: the CEC spec is ambiguous regarding * what action to take when a NACK appears * before the last byte of the payload was * transmitted: either stop transmitting * immediately, or wait until the last byte * was transmitted. * * Most CEC implementations appear to stop * immediately, and that's what we do here * as well.
*/
pin->tx_nacked = true;
} break;
case CEC_ST_TX_PULSE_LOW_CUSTOM:
cec_pin_high(pin);
pin->state = CEC_ST_TX_PULSE_HIGH_CUSTOM; break;
case CEC_ST_TX_PULSE_HIGH_CUSTOM:
cec_pin_to_idle(pin); break;
default: break;
}
}
/* * Handle Receive-related states * * Basic state changes when receiving: * * Rx Start Bit Low -> Rx Start Bit High -> * Regular data bits + EOM: * Rx Data Sample -> Rx Data Post Sample -> Rx Data High -> * Ack bit 0: * Rx Ack Low -> Rx Ack Low Post -> Rx Data High -> * Ack bit 1: * Rx Ack High Post -> Rx Data High -> * Ack bit 0 && EOM: * Rx Ack Low -> Rx Ack Low Post -> Rx Ack Finish -> Idle
*/ staticvoid cec_pin_rx_states(struct cec_pin *pin, ktime_t ts)
{
s32 delta; bool v; bool ack; bool bcast, for_us;
u8 dest;
u8 poll;
switch (pin->state) { /* Receive states */ case CEC_ST_RX_START_BIT_LOW:
v = cec_pin_read(pin); if (!v) break;
pin->state = CEC_ST_RX_START_BIT_HIGH;
delta = ktime_us_delta(ts, pin->ts); /* Start bit low is too short, go back to idle */ if (delta < CEC_TIM_START_BIT_LOW_MIN - CEC_TIM_IDLE_SAMPLE) { if (!pin->rx_start_bit_low_too_short_cnt++) {
pin->rx_start_bit_low_too_short_ts = ktime_to_ns(pin->ts);
pin->rx_start_bit_low_too_short_delta = delta;
}
cec_pin_to_idle(pin); break;
} if (rx_arb_lost(pin, &poll)) {
cec_msg_init(&pin->tx_msg, poll >> 4, poll & 0xf);
pin->tx_generated_poll = true;
pin->tx_extra_bytes = 0;
pin->state = CEC_ST_TX_START_BIT_HIGH;
pin->ts = ts;
} break;
case CEC_ST_RX_START_BIT_HIGH:
v = cec_pin_read(pin);
delta = ktime_us_delta(ts, pin->ts); /* * Unfortunately the spec does not specify when to give up * and go to idle. We just pick TOTAL_LONG.
*/ if (v && delta > CEC_TIM_START_BIT_TOTAL_LONG) {
pin->rx_start_bit_too_long_cnt++;
cec_pin_to_idle(pin); break;
} if (v) break; /* Start bit is too short, go back to idle */ if (delta < CEC_TIM_START_BIT_TOTAL_MIN - CEC_TIM_IDLE_SAMPLE) { if (!pin->rx_start_bit_too_short_cnt++) {
pin->rx_start_bit_too_short_ts = ktime_to_ns(pin->ts);
pin->rx_start_bit_too_short_delta = delta;
}
cec_pin_to_idle(pin); break;
} if (rx_low_drive(pin)) { /* Error injection: go to low drive */
cec_pin_low(pin);
pin->state = CEC_ST_RX_LOW_DRIVE;
pin->rx_low_drive_cnt++; break;
}
pin->state = CEC_ST_RX_DATA_SAMPLE;
pin->ts = ts;
pin->rx_eom = false; break;
case CEC_ST_RX_DATA_SAMPLE:
v = cec_pin_read(pin);
pin->state = CEC_ST_RX_DATA_POST_SAMPLE; switch (pin->rx_bit % 10) { default: if (pin->rx_bit / 10 < CEC_MAX_MSG_SIZE)
pin->rx_msg.msg[pin->rx_bit / 10] |=
v << (7 - (pin->rx_bit % 10)); break; case EOM_BIT:
pin->rx_eom = v;
pin->rx_msg.len = pin->rx_bit / 10 + 1; break; case ACK_BIT: break;
}
pin->rx_bit++; break;
case CEC_ST_RX_DATA_POST_SAMPLE:
pin->state = CEC_ST_RX_DATA_WAIT_FOR_LOW; break;
case CEC_ST_RX_DATA_WAIT_FOR_LOW:
v = cec_pin_read(pin);
delta = ktime_us_delta(ts, pin->ts); /* * Unfortunately the spec does not specify when to give up * and go to idle. We just pick TOTAL_LONG.
*/ if (v && delta > CEC_TIM_DATA_BIT_TOTAL_LONG) {
pin->rx_data_bit_too_long_cnt++;
cec_pin_to_idle(pin); break;
} if (v) break;
if (rx_low_drive(pin)) { /* Error injection: go to low drive */
cec_pin_low(pin);
pin->state = CEC_ST_RX_LOW_DRIVE;
pin->rx_low_drive_cnt++; break;
}
/* * Go to low drive state when the total bit time is * too short.
*/ if (delta < CEC_TIM_DATA_BIT_TOTAL_MIN && !pin->rx_no_low_drive) { if (!pin->rx_data_bit_too_short_cnt++) {
pin->rx_data_bit_too_short_ts = ktime_to_ns(pin->ts);
pin->rx_data_bit_too_short_delta = delta;
}
cec_pin_low(pin);
pin->state = CEC_ST_RX_LOW_DRIVE;
pin->rx_low_drive_cnt++; break;
}
pin->ts = ts; if (pin->rx_bit % 10 != 9) {
pin->state = CEC_ST_RX_DATA_SAMPLE; break;
}
dest = cec_msg_destination(&pin->rx_msg);
bcast = dest == CEC_LOG_ADDR_BROADCAST; /* for_us == broadcast or directed to us */
for_us = bcast || (pin->la_mask & (1 << dest)); /* ACK bit value */
ack = bcast ? 1 : !for_us;
if (for_us && rx_nack(pin)) { /* Error injection: toggle the ACK bit */
ack = !ack;
}
if (ack) { /* No need to write to the bus, just wait */
pin->state = CEC_ST_RX_ACK_HIGH_POST; break;
}
cec_pin_low(pin);
pin->state = CEC_ST_RX_ACK_LOW; break;
case CEC_ST_RX_ACK_LOW:
cec_pin_high(pin);
pin->state = CEC_ST_RX_ACK_LOW_POST; break;
case CEC_ST_RX_ACK_LOW_POST: case CEC_ST_RX_ACK_HIGH_POST:
v = cec_pin_read(pin); if (v && pin->rx_eom) {
pin->work_rx_msg = pin->rx_msg;
pin->work_rx_msg.rx_ts = ktime_to_ns(ts);
wake_up_interruptible(&pin->kthread_waitq);
pin->ts = ts;
pin->state = CEC_ST_RX_ACK_FINISH; break;
}
pin->rx_bit++;
pin->state = CEC_ST_RX_DATA_WAIT_FOR_LOW; break;
case CEC_ST_RX_ACK_FINISH:
cec_pin_to_idle(pin); break;
ts = ktime_get(); if (ktime_to_ns(pin->timer_ts)) {
delta = ktime_us_delta(ts, pin->timer_ts);
pin->timer_cnt++; if (delta > 100 && pin->state != CEC_ST_IDLE) { /* Keep track of timer overruns */
pin->timer_sum_overrun += delta;
pin->timer_100us_overruns++; if (delta > 300)
pin->timer_300us_overruns++; if (delta > pin->timer_max_overrun)
pin->timer_max_overrun = delta;
}
} if (adap->monitor_pin_cnt)
cec_pin_read(pin);
if (pin->wait_usecs) { /* * If we are monitoring the pin, then we have to * sample at regular intervals.
*/ if (pin->wait_usecs > 150) {
pin->wait_usecs -= 100;
pin->timer_ts = ktime_add_us(ts, 100);
hrtimer_forward_now(timer, us_to_ktime(100)); return HRTIMER_RESTART;
} if (pin->wait_usecs > 100) {
pin->wait_usecs /= 2;
pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
hrtimer_forward_now(timer,
us_to_ktime(pin->wait_usecs)); return HRTIMER_RESTART;
}
pin->timer_ts = ktime_add_us(ts, pin->wait_usecs);
hrtimer_forward_now(timer,
us_to_ktime(pin->wait_usecs));
pin->wait_usecs = 0; return HRTIMER_RESTART;
}
switch (pin->state) { /* Transmit states */ case CEC_ST_TX_WAIT_FOR_HIGH: case CEC_ST_TX_START_BIT_LOW: case CEC_ST_TX_START_BIT_HIGH: case CEC_ST_TX_START_BIT_HIGH_SHORT: case CEC_ST_TX_START_BIT_HIGH_LONG: case CEC_ST_TX_START_BIT_LOW_CUSTOM: case CEC_ST_TX_START_BIT_HIGH_CUSTOM: case CEC_ST_TX_DATA_BIT_0_LOW: case CEC_ST_TX_DATA_BIT_0_HIGH: case CEC_ST_TX_DATA_BIT_0_HIGH_SHORT: case CEC_ST_TX_DATA_BIT_0_HIGH_LONG: case CEC_ST_TX_DATA_BIT_1_LOW: case CEC_ST_TX_DATA_BIT_1_HIGH: case CEC_ST_TX_DATA_BIT_1_HIGH_SHORT: case CEC_ST_TX_DATA_BIT_1_HIGH_LONG: case CEC_ST_TX_DATA_BIT_1_HIGH_PRE_SAMPLE: case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE: case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_SHORT: case CEC_ST_TX_DATA_BIT_1_HIGH_POST_SAMPLE_LONG: case CEC_ST_TX_DATA_BIT_LOW_CUSTOM: case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM: case CEC_ST_TX_PULSE_LOW_CUSTOM: case CEC_ST_TX_PULSE_HIGH_CUSTOM:
cec_pin_tx_states(pin, ts); break;
/* Receive states */ case CEC_ST_RX_START_BIT_LOW: case CEC_ST_RX_START_BIT_HIGH: case CEC_ST_RX_DATA_SAMPLE: case CEC_ST_RX_DATA_POST_SAMPLE: case CEC_ST_RX_DATA_WAIT_FOR_LOW: case CEC_ST_RX_ACK_LOW: case CEC_ST_RX_ACK_LOW_POST: case CEC_ST_RX_ACK_HIGH_POST: case CEC_ST_RX_ACK_FINISH:
cec_pin_rx_states(pin, ts); break;
case CEC_ST_IDLE: case CEC_ST_TX_WAIT: if (!cec_pin_high(pin)) { /* Start bit, switch to receive state */
pin->ts = ts;
pin->state = CEC_ST_RX_START_BIT_LOW; /* * If a transmit is pending, then that transmit should * use a signal free time of no more than * CEC_SIGNAL_FREE_TIME_NEW_INITIATOR since it will * have a new initiator due to the receive that is now * starting.
*/ if (pin->tx_msg.len && pin->tx_signal_free_time >
CEC_SIGNAL_FREE_TIME_NEW_INITIATOR)
pin->tx_signal_free_time =
CEC_SIGNAL_FREE_TIME_NEW_INITIATOR; break;
} if (ktime_to_ns(pin->ts) == 0)
pin->ts = ts; if (pin->tx_msg.len) { /* * Check if the bus has been free for long enough * so we can kick off the pending transmit.
*/
delta = ktime_us_delta(ts, pin->ts); if (delta / CEC_TIM_DATA_BIT_TOTAL >=
pin->tx_signal_free_time) {
pin->tx_nacked = false; if (tx_custom_start(pin))
pin->state = CEC_ST_TX_START_BIT_LOW_CUSTOM; else
pin->state = CEC_ST_TX_START_BIT_LOW; /* Generate start bit */
cec_pin_low(pin); break;
} if (delta / CEC_TIM_DATA_BIT_TOTAL >=
pin->tx_signal_free_time - 1)
pin->state = CEC_ST_TX_WAIT; break;
} if (pin->tx_custom_pulse && pin->state == CEC_ST_IDLE) {
pin->tx_custom_pulse = false; /* Generate custom pulse */
cec_pin_low(pin);
pin->state = CEC_ST_TX_PULSE_LOW_CUSTOM; break;
} if (pin->state != CEC_ST_IDLE || pin->ops->enable_irq == NULL ||
pin->enable_irq_failed || adap->is_configuring ||
adap->is_configured || adap->monitor_all_cnt || !adap->monitor_pin_cnt) break; /* Switch to interrupt mode */
atomic_set(&pin->work_irq_change, CEC_PIN_IRQ_ENABLE);
pin->state = CEC_ST_RX_IRQ;
wake_up_interruptible(&pin->kthread_waitq); return HRTIMER_NORESTART;
case CEC_ST_TX_LOW_DRIVE: case CEC_ST_RX_LOW_DRIVE:
cec_pin_high(pin);
cec_pin_to_idle(pin); break;
default: break;
}
switch (pin->state) { case CEC_ST_TX_START_BIT_LOW_CUSTOM: case CEC_ST_TX_DATA_BIT_LOW_CUSTOM: case CEC_ST_TX_PULSE_LOW_CUSTOM:
usecs = pin->tx_custom_low_usecs; break; case CEC_ST_TX_START_BIT_HIGH_CUSTOM: case CEC_ST_TX_DATA_BIT_HIGH_CUSTOM: case CEC_ST_TX_PULSE_HIGH_CUSTOM:
usecs = pin->tx_custom_high_usecs; break; default:
usecs = states[pin->state].usecs; break;
}
/* * If a receive is in progress, then this transmit should use * a signal free time of max CEC_SIGNAL_FREE_TIME_NEW_INITIATOR * since when it starts transmitting it will have a new initiator.
*/ if (pin->state != CEC_ST_IDLE &&
signal_free_time > CEC_SIGNAL_FREE_TIME_NEW_INITIATOR)
signal_free_time = CEC_SIGNAL_FREE_TIME_NEW_INITIATOR;
pin->tx_signal_free_time = signal_free_time;
pin->tx_extra_bytes = 0;
pin->tx_msg = *msg; if (msg->len > 1) { /* Error injection: add byte to the message */
pin->tx_extra_bytes = tx_add_bytes(pin);
} if (msg->len > 2 && tx_remove_byte(pin)) { /* Error injection: remove byte from the message */
pin->tx_msg.len--;
}
pin->work_tx_status = 0;
pin->tx_bit = 0;
cec_pin_start_timer(pin); return 0;
}
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