/* * To update the PMIC firmware, the user must be able to access * page 0 (user registers) and page 1 (NVM control and configuration).
*/ #define TPS6594_PMIC_MAX_POS 0x200
if (gpio_ret)
ret = regmap_set_bits(regmap, TPS6594_REG_FSM_I2C_TRIGGERS,
TPS6594_BIT_TRIGGER_I2C(5) | TPS6594_BIT_TRIGGER_I2C(6)); else
ret = regmap_clear_bits(regmap, TPS6594_REG_FSM_I2C_TRIGGERS,
TPS6594_BIT_TRIGGER_I2C(5) | TPS6594_BIT_TRIGGER_I2C(6)); if (ret) return ret;
if (ddr_ret)
ret = regmap_set_bits(regmap, TPS6594_REG_FSM_I2C_TRIGGERS,
TPS6594_BIT_TRIGGER_I2C(7)); else
ret = regmap_clear_bits(regmap, TPS6594_REG_FSM_I2C_TRIGGERS,
TPS6594_BIT_TRIGGER_I2C(7));
switch (cmd) { case PMIC_GOTO_STANDBY: /* Disable LP mode on TPS6594 Family PMIC */ if (pfsm->chip_id != TPS65224 && pfsm->chip_id != TPS652G1) {
ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2,
TPS6594_BIT_LP_STANDBY_SEL);
if (ret) return ret;
}
/* Force trigger */
ret = regmap_write_bits(pfsm->regmap, TPS6594_REG_FSM_I2C_TRIGGERS,
TPS6594_BIT_TRIGGER_I2C(0), TPS6594_BIT_TRIGGER_I2C(0)); break; case PMIC_GOTO_LP_STANDBY: /* TPS65224/TPS652G1 does not support LP STANDBY */ if (pfsm->chip_id == TPS65224 || pfsm->chip_id == TPS652G1) return ret;
/* Enable LP mode */
ret = regmap_set_bits(pfsm->regmap, TPS6594_REG_RTC_CTRL_2,
TPS6594_BIT_LP_STANDBY_SEL); if (ret) return ret;
/* Force trigger */
ret = regmap_write_bits(pfsm->regmap, TPS6594_REG_FSM_I2C_TRIGGERS,
TPS6594_BIT_TRIGGER_I2C(0), TPS6594_BIT_TRIGGER_I2C(0)); break; case PMIC_UPDATE_PGM: /* Force trigger */
ret = regmap_write_bits(pfsm->regmap, TPS6594_REG_FSM_I2C_TRIGGERS,
TPS6594_BIT_TRIGGER_I2C(3), TPS6594_BIT_TRIGGER_I2C(3)); break; case PMIC_SET_ACTIVE_STATE: /* Modify NSLEEP1-2 bits */
ret = regmap_set_bits(pfsm->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS,
TPS6594_BIT_NSLEEP1B | TPS6594_BIT_NSLEEP2B); break; case PMIC_SET_MCU_ONLY_STATE: /* TPS65224/TPS652G1 does not support MCU_ONLY_STATE */ if (pfsm->chip_id == TPS65224 || pfsm->chip_id == TPS652G1) return ret;
if (copy_from_user(&state_opt, argp, sizeof(state_opt))) return -EFAULT;
/* Configure retention triggers */
ret = tps6594_pfsm_configure_ret_trig(pfsm->regmap, state_opt.gpio_retention,
state_opt.ddr_retention); if (ret) return ret;
/* Modify NSLEEP1-2 bits */
ret = regmap_clear_bits(pfsm->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS,
TPS6594_BIT_NSLEEP1B); if (ret) return ret;
ret = regmap_set_bits(pfsm->regmap, TPS6594_REG_FSM_NSLEEP_TRIGGERS,
TPS6594_BIT_NSLEEP2B); break; case PMIC_SET_RETENTION_STATE: if (copy_from_user(&state_opt, argp, sizeof(state_opt))) return -EFAULT;
if (state_opt.mcu_only_startup_dest)
ret = regmap_write_bits(pfsm->regmap, regmap_reg,
mask, TPS6594_STARTUP_DEST_MCU_ONLY); else
ret = regmap_write_bits(pfsm->regmap, regmap_reg,
mask, TPS6594_STARTUP_DEST_ACTIVE); if (ret) return ret;
/* Configure retention triggers */
ret = tps6594_pfsm_configure_ret_trig(pfsm->regmap, state_opt.gpio_retention,
state_opt.ddr_retention); if (ret) return ret;
/* Modify NSLEEP1-2 bits */ if (pfsm->chip_id == TPS65224 || pfsm->chip_id == TPS652G1)
ret = regmap_clear_bits(pfsm->regmap,
TPS6594_REG_FSM_NSLEEP_TRIGGERS,
TPS6594_BIT_NSLEEP1B); else
ret = regmap_clear_bits(pfsm->regmap,
TPS6594_REG_FSM_NSLEEP_TRIGGERS,
TPS6594_BIT_NSLEEP2B); break;
}
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