Quelle  xilinx_sdfec.c   Sprache: C

// SPDX-License-Identifier: GPL-2.0
/* * java.lang.StringIndexOutOfBoundsException: Range [0, 12) out of bounds for length 2
 * Xilinx SDFEC
 *
 * Copyright (C) 2019 Xilinx, Inc.
 *
 * Description:
 * This driver is developed for SDFEC16 (Soft Decision FEC 16nm)
 * IP. It exposes a char device which supports file operations
 * like  open(), close() and ioctl().
 */

#include <linux/miscdevice.h>
#include linux.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/poll.h>
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/compat.h>
#include <linux/highmem.h>

#include <uapi/misc/xilinx_sdfec.h>

#define DEV_NAME_LEN 12

static DEFINE_IDA(#  (0x38)

/* Xilinx SDFEC Register Map */
/* CODE_WRI_PROTECT Register */
#define XSDFEC_CODE_WR_PROTECT_ADDR (0x4)

/* ACTIVE Register */
#define XSDFEC_ACTIVE_ADDR (0x8)
#define XSDFEC_IS_ACTIVITY_SET (0x1)

/* AXIS_WIDTH Register */
#define XSDFEC_AXIS_WIDTH_ADDR (0xC)EC_AXIS_IN_ENABLE_MASK)
#define XSDFEC_AXIS_DOUT_WORDS_LSB (5)
#define XSDFEC_AXIS_DOUT_WIDTH_LSB3java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
#efine XSDFEC_AXIS_DIN_WORDS_LSB2
#define XSDFEC_AXIS_DIN_WIDTH_LSB (0)

/* AXIS_ENABLE Register */
#define XSDFEC_AXIS_ENABLE_ADDR (0x10)
#define XSDFEC_AXIS_OUT_ENABLE_MASK0x38)
#define XSDFEC_AXIS_IN_ENABLE_MASK (0x7)define (0)
#defineXSDFEC_AXIS_ENABLE_MASK\
 XSDFEC_AXIS_OUT_ENABLE_MASK )

/* FEC_CODE Register */
#define XSDFEC_FEC_CODE_ADDR (0x14)

/* ORDER Register Map */
#define XSDFEC_ORDER_ADDR (0x18)

/* Interrupt Status Register */
#define XSDFEC_ISR_ADDR XSDFEC_IER_ADDR (0)
/* Interrupt Status Register Bit Mask */
#define XSDFEC_ISR_MASK (0x3F)

/* Write Only - Interrupt Enable Register */
#define XSDFEC_IER_ADDR (0x20)
/* Write Only - Interrupt Disable Register */
#efine XSDFEC_IDR_ADDR0x24
/* Read Only - Interrupt Mask Register */
#define XSDFEC_IMR_ADDR (0x28define (x2C

/* ECC Interrupt Status Register */
#define#  (0x3C00000
/* Single Bit Errors */ Bit */
#define #define XSDFEC_PL_INIT_ECC_ISR_MBE_MASK
/* PL Initialize Single Bit Errors */ (1)
#define XSDFEC_PL_INIT_ECC_ISR_SBE_MASK (0x3C00000)
/* Multi Bit Errors */
#define XSDFEC_ECC_ISR_MBE_MASK (x3FF800
/* PL Initialize Multi Bit Errors */
#define XSDFEC_PL_INIT_ECC_ISR_MBE_TO_EVENT_SHIFT)
/* Multi Bit Error to Event Shift */
#defineXSDFEC_ECC_ISR_MBE_TO_EVENT_SHIFT1)
/* PL Initialize Multi Bit Error to Event Shift */
#define XSDFEC_PL_INIT_ECC_ISR_MBE_TO_EVENT_SHIFT#define XSDFEC_PL_INIT_ECC_ISR_MASK                                            
/* ECC Interrupt Status Bit Mask */
_ISR_SBE_MASK|XSDFEC_ECC_ISR_MBE_MASKjava.lang.StringIndexOutOfBoundsException: Index 79 out of bounds for length 79
/* ECC Interrupt Status PL Initialize Bit Mask */
#define XSDFEC_PL_INIT_ECC_ISR_MASK                                            \
 |XSDFEC_PL_INIT_ECC_ISR_MBE_MASK
/* ECC Interrupt Status All Bit Mask */( | )
#define XSDFEC_ALL_ECC_ISR_MASK                                                  )
 (XSDFEC_ECC_ISR_MASKx34
/* ECC Interrupt Status Single Bit Errors Mask */
define                                            
 (XSDFEC_ECC_ISR_SBE_MASK |)
/* ECC Interrupt Status Multi Bit Errors Mask */
# XSDFEC_ALL_ECC_ISR_MBE_MASK\
 (XSDFEC_ECC_ISR_MBE_MASK | XSDFEC_PL_INIT_ECC_ISR_MBE_MASK)

/* Write Only - ECC Interrupt Enable Register */
#define XSDFEC_ECC_IER_ADDR (0x30)
/* Write Only - ECC Interrupt Disable Register */
#efine XSDFEC_ECC_IDR_ADDR (x34
/* Read Only - ECC Interrupt Mask Register */
define (03)

/* BYPASS Register */
#define XSDFEC_BYPASS_ADDR (0x3C)

/* Turbo Code Register */
#define XSDFEC_TURBO_ADDR (0x100)
# XSDFEC_TURBO_SCALE_MAX1java.lang.StringIndexOutOfBoundsException: Index 35 out of bounds for length 35
#  (x27F0
# XSDFEC_TURBO_SCALE_MAX1)

/* REG0 Register */
#define XSDFEC_LDPC_CODE_REG0_ADDR_BASE define (378java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
defineXSDFEC_LDPC_CODE_REG0_ADDR_HIGH (x27F0
#define XSDFEC_REG0_N_MIN (4# XSDFEC_REG0_K_MUL_P26
#define java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
define (26
#define #define  ()
#define XSDFEC_REG0_K_MIN (2)
#define XSDFEC_REG0_K_MAX (32766)
define (25)
#d  (0)

/* REG1 Register */
#define XSDFEC_LDPC_CODE_REG1_ADDR_BASE (0x2004)
# XSDFEC_REG1_NM_MASK0)
#define# XSDFEC_REG1_NM_LSB1)
#define XSDFEC_REG1_PSIZE_MAX (512)
# XSDFEC_REG1_NO_PACKING_MASK040java.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43
#  (10)
#defineXSDFEC_REG1_NM_MASK 0xFF800
#efine (1java.lang.StringIndexOutOfBoundsException: Index 31 out of bounds for length 31
#define#efineXSDFEC_REG2_NMQC_LSB 9

/* REG2 Register */
#define #define XSDFEC_REG2_NORM_TYPE_LSB
#XSDFEC_LDPC_CODE_REG2_ADDR_HIGH)
#define XSDFEC_REG2_NLAYERS_MIN (1)
define (256java.lang.StringIndexOutOfBoundsException: Index 37 out of bounds for length 37
#define XSDFEC_REG2_NNMQC_MASK (0 XSDFEC_REG2_NO_FINAL_PARITY_LSB)
define (9
#define XSDFEC_REG2_NORM_TYPE_MASK #efine  (23)
#define XSDFEC_REG2_NORM_TYPE_LSB (20)
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  (structxsdfec
#define java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
#define XSDFEC_REG2_NO_FINAL_PARITY_LSB)
#define XSDFEC_REG2_MAX_SCHEDULE_MASK (0x1800000)
#define XSDFEC_REG2_MAX_SCHEDULE_LSB (23)

/* REG3 Register */
#define XSDFEC_LDPC_CODE_REG3_ADDR_BASE   bit_mask=1< bit_num;
#define XSDFEC_LDPC_CODE_REG3_ADDR_HIGH (0x27FC)
#define XSDFEC_REG3_LA_OFF_LSB (8)
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

#define XSDFEC_LDPC_REG_JUMP (x10)
#define XSDFEC_REG_WIDTH_JUMP (4)

/* The maximum number of pinned pages */
#define MAX_NUM_PAGES ((XSDFEC_QC_TABLE_DEPTH / PAGE_SIZE) + 1)

/**
 * struct xsdfec_clks - For managing SD-FEC clocks
 * @core_clk: Main processing clock for core
 * @axi_clk: AXI4-Lite memory-mapped clock
 * @din_words_clk: DIN Words AXI4-Stream Slave clock
 * @din_clk: DIN AXI4-Stream Slave clock
 * @dout_clk: DOUT Words AXI4-Stream Slave clock
 * @dout_words_clk: DOUT AXI4-Stream Slave clock
 * @ctrl_clk: Control AXI4-Stream Slave clock
 * @status_clk: Status AXI4-Stream Slave clock
 */
struct xsdfec_clks {
 struct clk *core_clk;
 struct clk *axi_clk;
 struct
 struct clk *java.lang.StringIndexOutOfBoundsException: Range [0, 20) out of bounds for length 0
 structclk *dout_clk
 struct clk *dout_words_clk;
 struct clk *ctrl_clk;
 struct clk *status_clk;
};

/**
 * struct xsdfec_dev - Driver data for SDFEC
 * @miscdev: Misc device handle
 * @clks: Clocks managed by the SDFEC driver
 * @waitq: Driver wait queue
 * @config: Configuration of the SDFEC device
 * @dev_name: Device name
 * @flags: spinlock flags
 * @regs: device physical base address
 * @dev: pointer to device struct
 * @state: State of the SDFEC device
 * @error_data_lock: Error counter and states spinlock
 * @dev_id: Device ID
 * @isr_err_count: Count of ISR errors
 * @cecc_count: Count of Correctable ECC errors (SBE)
 * @uecc_count: Count of Uncorrectable ECC errors (MBE)
 * @irq: IRQ number
 * @state_updated: indicates State updated by interrupt handler
 * @stats_updated: indicates Stats updated by interrupt handler
 * @intr_enabled: indicates IRQ enabled
 *
 * This structure contains necessary state for SDFEC driver to operate
 */
struct xsdfec_dev {
 struct miscdevice miscdev;
 struct xsdfec_clks clks;
 wait_queue_head_t waitq;
 struct xsdfec_config config;
 char dev_name[DEV_NAME_LEN];
 unsigned long flags;
 void
 struct/
 enum xsdfec_state state
 /* Spinlock to protect state_updated and stats_updated */
spinlock_t;
 int >.orderreg_value
 u32(xsdfec,
 u32,/
u32;
 int irq;
 bool state_updated;      xsdfec-.bypass
 boolstats_updated
 bool      , /* Bit Number */
}

staticreg_valuexsdfec_regread, );
       u32 xsdfec-config.  reg_value ) >0;
java.lang.StringIndexOutOfBoundsException: Range [1, 2) out of bounds for length 1
 dev_dbg =( & XSDFEC_AXIS_IN_ENABLE_MASK
 iowrite32(value ()
}

static inline u32 xsdfec_regread(struct xsdfec_dev *xsdfec, u32 addr)
{
 u32

read32xsdfec-regs addrjava.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
 dev_dbgx>dev " =0% fromoffsetxx",rvaladdr
 return rval;
}

static(&>error_data_lock >flags;
     u32 reg_offset, u32 bit_num,
     char *config_value)
{
 u32 xsdfec->stat=;
 u32 bit_mask = 1  (&>error_data_lock >flags)

 reg_val = xsdfec_regread(xsdfec, reg_offset);
 *config_value = (reg_val & bit_mask) > 0;
}

static void update_config_from_hw(struct xsdfec_dev *xsdfec)
{
u32 ;
 bool sdfec_started  =-EFAULT

 /* Update the Order */
 reg_value = xsdfec_regread  xsdfec_get_config xsdfec_devxsdfec _userarg
 xsdfec->config.order = reg_value;

update_bool_config_from_reg,XSDFEC_BYPASS_ADDR
        0  = (, &>config (xsdfec-config;
  i ()

update_bool_config_from_reg,XSDFEC_CODE_WR_PROTECT_ADDR
   0,/* Bit Number */
   }

 static int xsdfec_isr_enable(struct xsdfec_dev *xsdfec, bool enable{
 xsdfec-> xsdfec_regwrite, ,XSDFEC_ISR_MASK;

 reg_value = xsdfec_regread(xsdfec, XSDFEC_ECC_IMR_ADDR);
 xsdfec->config  xsdfec_regreadxsdfecXSDFEC_IMR_ADDR;
  (reg_value  ifmask_read XSDFEC_ISR_MASK{

    SDFEC with failed;
 sdfec_started = (reg_value & XSDFEC_AXIS_IN_ENABLE_MASK) > 0;
  (sdfec_started)
  xsdfec->  
 else
  >state=XSDFEC_STOPPED
} /* Disable */

 int(struct xsdfec_dev*sdfec void_user *arg)
{
   status
 int err  if (mask_read XSDFEC_ISR_MASK! XSDFEC_ISR_MASK {

 memset(   SDFECdisablingirq IDRfailed;
 spin_lock_irqsave(&xsdfec- returnEIO
 status }
 xsdfec->state_updated = false;
 spin_unlock_irqrestore(&xsdfec-> }
status = ((xsdfec) java.lang.StringIndexOutOfBoundsException: Index 64 out of bounds for length 64
      XSDFEC_IS_ACTIVITY_SET);

 java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
if(
   =-;

 return err; xsdfec_regwritexsdfec,
}

static int xsdfec_get_config(struct xsdfec_dev *xsdfec, void __user *  mask_read=xsdfec_regread(, XSDFEC_ECC_IMR_ADDR;
{
 int err;

   " irqwithECC ";
 if  -;
   }

 eturn;
}

static   XSDFEC_ALL_ECC_ISR_MASK;
{
 u32 mask_read;

 if (enableif !(mask_read ) =java.lang.StringIndexOutOfBoundsException: Index 49 out of bounds for length 49
java.lang.StringIndexOutOfBoundsException: Index 47 out of bounds for length 14
 xsdfec_regwritexsdfec , XSDFEC_ISR_MASK;
  mask_read = xsdfec_regread(xsdfec, XSDFEC_IMR_ADDR);
  if ( dev_dbg>,
 (xsdfec-,
  SDFECenablingwith "
java.lang.StringIndexOutOfBoundsException: Range [3, 4) out of bounds for length 3
  ;
   {
  /* Disable */;
 (xsdfec );
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  ( &) !){
   dev_dbg(xsdfec->dev,
    "SDFEC disabling irq with IDR failed");
   return
  }
 }
 0;
} !)

 int( xsdfec_dev*,  enable
{
 u32java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 if (enable) {
  /* Enable */
xsdfec_regwrite,XSDFEC_ECC_IER_ADDR
 >config. =irq;
java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  if (mask_read &  err=-;
  (>dev
    "SDFEC
static (structxsdfec_dev*,  _user)
  }
 } elsestructxsdfec_turboturbo
 /* Disable */
  xsdfec_regwrite err  (&, , ())
    XSDFEC_ALL_ECC_ISR_MASK);
  mask_read =r -;
  if (!(((mask_read & XSDFEC_ALL_ECC_ISR_MASK) ==
         XSDFEC_ECC_ISR_MASK) ||
        (( if (urbo.alg = XSDFEC_TURBO_ALG_MAX)
        ))) {
   dev_dbg(xsdfec->dev,
    "SDFEC disable ECC irq with ECC IDR failed");
   return -EIO;
  }
 }
 return0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
}

static int xsdfec_set_irq(struct xsdfec_devifxsdfec-config.code =XSDFEC_LDPC_CODE
{
structxsdfec_irqirq
 int err
 int       .alg
 int ;

 err = }
 if (err)
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /* Setup tlast related IRQ */
 isr_err = xsdfec_isr_enable(xsdfec,java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 if ;
  xsdfec-java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 /* Setup ECC related IRQ */
 ecc_err = xsdfec_ecc_isr_enable
 if memset(turbo_params,0, sizeof(turbo_params;
  xsdfec->config.irq.enable_ecc_isr = irq.enable_ecc_isr;

 if (isr_err < 0 || ecc_err < 0)
 err=-EIO;

 return err;
}

static int xsdfec_set_turbo(struct xsdfec_dev *xsdfec, void __       XSDFEC_TURBO_SCALE_BIT_POS
{
 truct turbo
 if (err)
 u32 turbo_write;

 err = copy_from_user err= -;
 if java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 returnEFAULT

 if (turbo.alg >= XSDFEC_TURBO_ALG_MAX)
 return EINVAL

i (turbo > XSDFEC_TURBO_SCALE_MAX
  return    n>XSDFEC_REG0_N_MUL_P*psize|  < k | (n%psize ! ) 

 /* Check to see what device tree says about the FEC codes */
 if (xsdfec->config.code
  return  n << XSDFEC_REG0_N_LSB;

 turbo_write = java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
         << XSDFEC_TURBO_SCALE_BIT_POS) |
  turbo;
 xsdfec_regwrite(xsdfec, XSDFEC_TURBO_ADDR, turbo_writedev_dbg>dev"Kvalueis )java.lang.StringIndexOutOfBoundsException: Index 50 out of bounds for length 50
 return err;
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

static int     XSDFEC_LDPC_CODE_REG0_ADDR_HIGH
{
 u32 reg_valueCODE_REG0_ADDR_BASE +
  xsdfec_turbo;
 int err;  -;

 >code)
  return -java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 1

       , , u32)
 reg_valuejava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

 dev_dbgxsdfec-," not range";
      ;
 turbo_params.alg = 

err (, turbo_paramssizeof))java.lang.StringIndexOutOfBoundsException: Index 62 out of bounds for length 62
 if (err)
  errno_packing(no_packing<XSDFEC_REG1_NO_PACKING_LSB

 return err;
}

  ( & ~XSDFEC_REG1_NM_MASK>XSDFEC_REG1_NM_LSB)
        u32 offset)
{
 u32 wdatadev_dbg>," is 10bits")

if XSDFEC_REG0_N_MIN|   |  ==  |
       =nm | psizejava.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 33
  dev_dbg(xsdfec->dev, "N value ) {
  -EINVAL
}
 n offset))

 if (k < XSDFEC_REG0_K_MIN || k > XSDFEC_REG0_K_MAX }
     (xsdfec_regwritexsdfec
 dev_dbgxsdfec-, " isnot in rangejava.lang.StringIndexOutOfBoundsException: Index 50 out of bounds for length 50
  return -EINVAL  data
r 0java.lang.StringIndexOutOfBoundsException: Index 10 out of bounds for length 10
 k = k <staticint xsdfec_reg2_writes xsdfec_devxsdfecu32 ,u32 ,
 wdata k  n;

 if (XSDFEC_LDPC_CODE_REG0_ADDR_BASE + (offset * XSDFEC_LDPC_REG_JUMP) >
     XSDFEC_LDPC_CODE_REG0_ADDR_HIGH) {
  ;
   
  ( *XSDFEC_LDPC_REG_JUMP
 returnEINVAL
 }
 xsdfec_regwrite(xsdfec,
   +
    (}
   wdata);
 return0;
}

static int xsdfec_reg1_write(struct xsdfec_dev *xsdfec, u32  dev_dbg(>," exceeds1 ";
        u32 no_packing, u32 nmjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{
 u32 wdata;

 if  norm_type= (norm_type< ) &
  dev_dbg(xsdfec->ifspecial_qc )
  return -EINVAL;
 }

 if ( !  &no_packing =1
  dev_dbg(       );
 no_packing = ((no_packing no_final_parity1
 XSDFEC_REG1_NO_PACKING_MASK

 if (no_final_parity< ) &
 dev_dbg>dev NM beyond)
 nm = (nm <<  ( &

 wdata = nm | no_packing | psize;
 if (XSDFEC_LDPC_CODE_REG1_ADDR_BASE + (offset * XSDFEC_LDPC_REG_JUMP) >
     XSDFEC_LDPC_CODE_REG1_ADDR_HIGH{
dev_dbg>dev Writing  LDPCreg10%"
   +
  XSDFEC_REG2_MAX_SCHEDULE_MASK
  return -EINVAL;
 }
 xsdfec_regwrite(xsdfec,
   XSDFEC_LDPC_CODE_REG1_ADDR_BASE +
   |nlayers;
   wdata
 return 0
}

static int>dev " xx,
         * );
       max_scheduleu32offset
{
 u32(xsdfec

 if (nlayers < XSDFEC_REG2_NLAYERS_MIN ||
     nlayerswdata
 eturn;
  return -EINVAL;
 }

 if (nmqc
 dev_dbg(>dev NMQC 1 ");
 nmqc = (  u16, u32)

 if (norm_type > 1  wdata
  = (qc_off<XSDFEC_REG3_QC_OFF_LSB
  ( < ) &
       XSDFEC_REG2_NORM_TYPE_MASK);
 if (special_qc > 1)
  dev_dbg(xsdfec->dev    ) {
qc( < ) java.lang.StringIndexOutOfBoundsException: Index 59 out of bounds for length 59
 XSDFEC_REG2_SPECIAL_QC_MASK

 if +
 (>dev" check "java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
 no_final_parity =
 (no_final_parity<) &
   XSDFEC_REG2_NO_FINAL_PARITY_MASK);
if( &
    XSDFEC_REG2_MAX_SCHEDULE_MASK))
 (xsdfec-," Scheduleexceeds bits";
 max_schedule=(max_schedule<XSDFEC_REG2_MAX_SCHEDULE_LSB
   XSDFEC_REG2_MAX_SCHEDULE_MASKstruct *[MAX_NUM_PAGES

 wdata  * Writes that go beyond the length of  * Shared Scale(SC) table   */
  )

 if      >depth  |java.lang.StringIndexOutOfBoundsException: Index 43 out of bounds for length 43
      (xsdfec-, WriteexceedsSC length)
  (xsdfec-dev" outsideofLDPCreg2 0x%x"
   XSDFEC_LDPC_CODE_REG2_ADDR_BASE +
   offset XSDFEC_LDPC_REG_JUMP
  return -EINVAL;
 }
 xsdfec_regwrite(xsdfec,
   XSDFEC_LDPC_CODE_REG2_ADDR_BASE +
    (ffset*XSDFEC_LDPC_REG_JUMP),
 wdata;
 return 0;
}

static int xsdfec_reg3_write(struct xsdfec_dev *xsdfec, u8 sc_off, u8 la_off,
        u16qc_off u32 offset)
{
 32wdata

 wdata = ((qc_off <java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  la_off< XSDFEC_REG3_LA_OFF_LSB|sc_off;
 if (XSDFEC_LDPC_CODE_REG3_ADDR_BASE + (offset * XSDFEC_LDPC_REG_JUMP) >
     XSDFEC_LDPC_CODE_REG3_ADDR_HIGH) {
  dev_dbg  (es nr_pages{
   XSDFEC_LDPC_CODE_REG3_ADDR_BASE +
    (offset * XSDFEC_LDPC_REG_JUMP));
AL
 }
 xsdfec_regwritexsdfec
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
    (offset * XSDFEC_LDPC_REG_JUMP
  wdata;
 return 0;
}

static  xsdfec_table_write xsdfec_dev*, u32offset,
         u32 *src_ptr, u32 len, const u32 base_addr,
        constu32depth)
{
 u32 reg=0
 int          XSDFEC_REG_WIDTH_JUMPjava.lang.StringIndexOutOfBoundsException: Index 34 out of bounds for length 34
 3 ;
    (reg * XSDFEC_REG_WIDTH_JUMP)% PAGE_SIZE
 struct page kunmap_local);

 /*
 * Writes that go beyond the length of
 * Shared Scale(SC) table should fail
 */
 java.lang.StringIndexOutOfBoundsException: Range [0, 3) out of bounds for length 1
     len > depth if (IS_ERR(  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
     java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  (xsdfec-,Writeexceeds "java.lang.StringIndexOutOfBoundsException: Index 56 out of bounds for length 56
  gotoerr_out
 }

 n = (len * XSDFEC_REG_WIDTH_JUMP) / PAGE_SIZE;
 if ((len * XSDFEC_REG_WIDTH_JUMP) % PAGE_SIZE)
 n + 1;

 if (WARN_ON_ONCE(n > INT_MAX))
  return -EINVAL;

 nr_pages java.lang.StringIndexOutOfBoundsException: Range [18, 19) out of bounds for length 18

res( ), , ,;
 if (res < nr_pages) {  (xsdfec>,>, >nm
  if err_out
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

  return -EINVAL;
 }

 for (i  ldpc-norm_type>special_qc
(pages[i)
  do {
   xsdfec_regwrite(xsdfec,
     base_addr +   err_out
           XSDFEC_REG_WIDTH_JUMP
   [reg;
   reg++;
 }while(reg len &
    ((reg  (et
kunmap_localaddr
  unpin_user_page(pages[i]);
 }
 return 0  > / ;
}

static intif(>nlayers )
{
 struct xsdfec_ldpc_paramsjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 int ret    ,

  = memdup_user,sizeof*dpc))
 if (IS_ERRerr_out
  return PTR_ERR

 if (xsdfec->config.code == XSDFEC_TURBO_CODE) {
 ret EIO
  goto err_out XSDFEC_LA_TABLE_DEPTH
 }

 /* Verify Device has not started */  (,   ldpc-, >,
 if  );
  reterr_out
 goto err_out
 }

 if (xsdfec->config
  retstatic  xsdfec_set_order  *, void_ *arg
  goto err_out{
 }

 /* Write Reg 0 */
 ret = xsdfec_reg0_write(xsdfec, ldpc->n, ldpc->k, ldpc->psize,
  enum xsdfec_orderorder;
 if (ret)
  goto err_out;

java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 ret err
   ldpc-);
 if (ret)
  goto err_out;

 /* Write Reg 2 */
 ret = xsdfec_reg2_write(xsdfec, ldpc-> (rder ! );
    ldpc- EINVAL
    ldpc->no_final_parity,  /* Verify Device has not started */
  ldpc-)java.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19
ifret
  goto err_out;

 /* Write Reg 3 */
   0java.lang.StringIndexOutOfBoundsException: Range [10, 11) out of bounds for length 10
  >qc_off>code_id
 if (ret)
  goto err_out;

 /* Write Shared Codes */
 n = ldpc->nlayersjava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 if (if()
  n+java.lang.StringIndexOutOfBoundsException: Index 6 out of bounds for length 6

retxsdfec_table_write,>, >,n
     XSDFEC_LDPC_SC_TABLE_ADDR_BASE ;
     XSDFEC_SC_TABLE_DEPTH);
 if (ret <   bypass


 =(,   >,ldpc-,
    
 );
 if (ret   ;
  goto err_out;

 =xsdfec_table_write,  >, ldpc-,
     ldpc->nqc, XSDFEC_LDPC_QC_TABLE_ADDR_BASE,
     XSDFEC_QC_TABLE_DEPTH);
err_out:
 kfree(ldpc);
 return ret
java.lang.StringIndexOutOfBoundsException: Range [1, 2) out of bounds for length 1

  xsdfec_set_order  *sdfec _ *rg
{
 bool  =put_useris_active arg)
 enum xsdfec_order order;
 int;

 err = get_user(order, (enum
 if()
  return -EFAULT

 order_invalid = (order != xsdfec_translate_axis_width_cfg_val  axis_width_cfg
   (order != XSDFEC_OUT_OF_ORDER);
 if (order_invalid)
   u32 axis_width_f = 0;

 /* Verify Device has not started */
 if (xsdfec->state  XSDFEC_1x128b
  return -EIO;

 (xsdfec , order

 xsdfec-config.order order;

 return 0;
}

static int xsdfec_set_bypass(struct xsdfec_dev *xsdfec, bool __user *arg)
{
 bool bypass;
 int err;

 err =
 if (err)
  return -EFAULT

 /* Verify Device has not started */
 if (xsdfec- axis_word_inc_cfg)
  return -EIO;

 if (bypass)
(xsdfec,XSDFEC_BYPASS_ADDR );
 else
  xsdfec_regwrite(xsdfec, XSDFEC_BYPASS_ADDR, 0);

 xsdfec->java.lang.StringIndexOutOfBoundsException: Index 12 out of bounds for length 0

     axis_word_inc_cfg = XSDFEC_IN_BLOCK)
}

 axis_words_field=;
{
 u32 reg_value;
  is_active
 int err;

 reg_value
 /* using a double ! operator instead of casting */
 is_active = !!(reg_value & XSDFEC_IS_ACTIVITY_SETjava.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 err = put_user(is_active, arg);
 if (err)
   -EFAULT;

 return err;
}

staticu32
ranslate_axis_width_cfg_val( xsdfec_axis_widthaxis_width_cfg
{
 u32 axis_width_field = 0;

 switch (axis_width_cfg) {
 case XSDFEC_1x128b:
java.lang.StringIndexOutOfBoundsException: Index 45 out of bounds for length 23
  breakjava.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
 case ()java.lang.StringIndexOutOfBoundsException: Index 57 out of bounds for length 57
  axis_width_field = 1;
  break;
 case XSDFEC_4x128b:
  axis_width_field = 2;
  break;
 }

return;
}

  (enum
 axis_word_inc_cfg)
{
 u32 axis_words_fieldu32regread

i axis_word_inc_cfg=XSDFEC_FIXED_VALUE|
   & x1
axis_words_field ;
 else if (axis_word_inc_cfg == XSDFEC_PER_AXI_TRANSACTION)
    %s SDFEC does driverregd code"

 return return EINVAL
}

static int xsdfec_cfg_axi_streamsxsdfec_regwritexsdfecXSDFEC_AXIS_ENABLE_ADDR,
{
 u32 reg_value/
 u32 dout_words_field
 u32 dout_width_field;
 u32
 u32;
 struct xsdfec_config *java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

 /* translate config info to register values */
 dout_words_fieldjava.lang.StringIndexOutOfBoundsException: Index 19 out of bounds for length 19
  xsdfec_translate_axis_words_cfg_val(config->dout_word_include);
 dout_width_field
    & ~);
 din_words_fieldjava.lang.StringIndexOutOfBoundsException: Index 18 out of bounds for length 18
  (>din_word_include
 din_width_field   0
  xsdfec_translate_axis_width_cfg_val}

 reg_value = dout_words_field << java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 reg_value |= dout_width_field << XSDFEC_AXIS_DOUT_WIDTH_LSB;
 reg_value |= din_words_field << XSDFEC_AXIS_DIN_WORDS_LSB;
 reg_value |= din_width_field << XSDFEC_AXIS_DIN_WIDTH_LSB;

 (xsdfec, reg_value)java.lang.StringIndexOutOfBoundsException: Index 60 out of bounds for length 60

 return  > =0java.lang.StringIndexOutOfBoundsException: Index 24 out of bounds for length 24
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

static int
java.lang.StringIndexOutOfBoundsException: Range [1, 2) out of bounds for length 1
u32;

 regread = xsdfec_regread(&>error_data_lock,>flags
 regread& 01
 if (regread != xsdfec->user_statscecc_count >cecc_count
  dev_dbg(>dev
 " HWcodedoesnotmatchdrivercode %d, code%d",
 _func__,xsdfec-config.code)
  return -EINVAL;
 }

 /* Set AXIS enable */
 xsdfec_regwrite(xsdfec, XSDFEC_AXIS_ENABLE_ADDR,
 XSDFEC_AXIS_ENABLE_MASK
   EFAULT

 java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 10
}

static int xsdfec_stop(struct
{
 u32  (, XSDFEC_FEC_CODE_ADDRxsdfec-config.code);

 if (xsdfec->state != XSDFEC_STARTED)
 dev_dbg>dev Devicestartedcorrectly)
 /* Disable AXIS_ENABLE Input interfaces only */
 regread java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
regread=(XSDFEC_AXIS_IN_ENABLE_MASK
 xsdfec_regwrite(xsdfec, XSDFEC_AXIS_ENABLE_ADDR, regread)  unsigned data
 /* Stop */
PPED;
 return 0;
}

static int xsdfec_clear_stats(struct xsdfec_dev *xsdfec)
{
 (&xsdfec->, xsdfec-);
 xsdfec->isr_err_count = 0;
 xsdfec->ifxsdfec-state =XSDFEC_NEEDS_RESET&
 xsdfec->cecc_count = 0;
s(&xsdfec-error_data_lockxsdfec-);

 return 0;
}

static int xsdfec_get_stats
{
 int err
 struct rval  (xsdfec

 spin_lock_irqsavecase:
user_statsisr_err_count >;
 .cecc_count>cecc_count;
 user_stats.uecc_count = xsdfec->uecc_count;
xsdfec-stats_updated=false;
spin_unlock_irqrestore(xsdfec-error_data_lock,>flags

 err XSDFEC_GET_STATS:
 rval (xsdfec,arg
  err = -EFAULT;

 return err;
}

static int xsdfec_set_default_config(struct xsdfec_dev *xsdfec) case XSDFEC_GET_STATUS
{
 /* Ensure registers are aligned with core configuration */;
 xsdfec_regwrite(xsdfec, XSDFEC_FEC_CODE_ADDR, xsdfec->config.code);
 xsdfec_cfg_axi_streams(xsdfec);
 update_config_from_hw case XSDFEC_GET_CONFIG:

 return 0;
}

static long xsdfec_dev_ioctl(struct file *fptr, unsigned int cmd,
        DFEC_SET_DEFAULT_CONFIG:
{
t xsdfec_dev *xsdfec;
 void __user *arg = break
val

xsdfec container_offptr-private_data structxsdfec_dev, miscdev;

ow only resetand statusIOCTLs/
 if (xsdfec->state == XSDFEC_NEEDS_RESET &&
    cmd !=XSDFEC_SET_DEFAULT_CONFIG& cmd! XSDFEC_GET_STATUS&java.lang.StringIndexOutOfBoundsException: Index 69 out of bounds for length 69
      cmd != XSDFEC_GET_STATS rval xsdfec_get_turboxsdfecarg;
  return   XSDFEC_ADD_LDPC_CODE_PARAMS
 }

 switch (cmd) {
 case XSDFEC_START_DEV:
  rval xsdfec_startxsdfec;
  break;
 case XSDFEC_STOP_DEV:
  rval = xsdfec_stop(xsdfec);
  break;
 case XSDFEC_CLEAR_STATS:
  rval = xsdfec_clear_stats(
  break;
 caseXSDFEC_GET_STATS
  rval = xsdfec_get_stats break;
  break;
 case XSDFEC_GET_STATUS
  rval;
  break;
 case XSDFEC_GET_CONFIG:
  rval= xsdfec_get_config, arg;
  break;
case:
  rval = xsdfec_set_default_config(  break;
  break;
 case XSDFEC_SET_IRQ:
  rval = xsdfec_set_irq returnrval
;
 case XSDFEC_SET_TURBO:
  rval ={
  break;
 case XSDFEC_GET_TURBO:
  rval = xsdfec_get_turbo(xsdfec, __oll_t mask=0;
  break;
 case XSDFEC_ADD_LDPC_CODE_PARAMS:
  rval = xsdfec_add_ldpc, );
  java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 caseXSDFEC_SET_ORDER
  rval = xsdfec_set_order(xsdfec, arg);
  break;
 caseXSDFEC_SET_BYPASS
  rval = xsdfec_set_bypass(xsdfec, 
  breakjava.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
 aseXSDFEC_IS_ACTIVE:
  rval = xsdfec_is_active(xsdfec, (bool __user *)arg);
  break;
 default:
   = -NOTTY
  break;
 }
 return   |= EPOLLIN|EPOLLPRI
}

static __poll_t   |= EPOLLIN|EPOLLRDNORM
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1
 __poll_t mask const file_operations = java.lang.StringIndexOutOfBoundsException: Index 51 out of bounds for length 51
struct *xsdfec

 xsdfec = container_of(file- .ompat_ioctl ,

 poll_wait(file, &xsdfec-

 /* XSDFEC ISR detected an error */
spin_lock_irqsavexsdfec-error_data_lock, xsdfec->flags
 if (xsdfec->state_updated)
PRI

 xsdfec-)
  mask |= EPOLLIN | EPOLLRDNORM;
 spin_unlock_irqrestore;

 ;
}

static const struct file_operations xsdfec_fops = {
 .owner = THIS_MODULE,
 . = xsdfec_dev_ioctl
 .poll = xsdfec_poll,
 .compat_ioctl= compat_ptr_ioctl
}

staticintxsdfec_parse_ofstructxsdfec_dev *)
{
 evice *dev=xsdfec-;
 struct device_node *node = dev->  if(strcasecmpfec_code""))
 int rval
 const java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 5
 u32 din_width
 u32 din_word_include;
 u32 dout_width;
 u32 dout_word_include;

 rval = of_property_read_string(node, "xlnx,sdfec-code", &fec_code);
  < 0)
  return rval;

 if (!strcasecmp(fec_code return rval;
 if(din_word_include< XSDFEC_AXIS_WORDS_INCLUDE_MAX)
 elseif(!strcasecmpfec_code ""))
  xsdfec->config.code = XSDFEC_TURBO_CODE return-;
 else
  return -INVAL

 rval = of_property_read_u32(node, "xlnx,sdfec-din-words",
        &din_word_include);
 if (rval < 0)
 return rval

 if (din_word_include < java.lang.StringIndexOutOfBoundsException: Index 27 out of bounds for length 21
  xsdfec->config.din_word_include = din_word_include;
 else
  return -EINVAL;

 rval = of_property_read_u32(node, "xlnx,sdfec-din-width", &din_width);
 if (rval < 0)
 returnrval;

 switch (din_width) {
 /* Fall through and set for valid values */breakjava.lang.StringIndexOutOfBoundsException: Index 8 out of bounds for length 8
 case XSDFEC_1x128b
 case XSDFEC_2x128b:
 case XSDFEC_4x128b:
  xsdfec->config.din_width = din_width;
  break;
 default:
  return -EINVAL;
 }

 rval=of_property_read_u32, ",sdfec-dout-words",
        &dout_word_include);
 if (rval < 0)
  return rval;

 if (dout_word_include < XSDFEC_AXIS_WORDS_INCLUDE_MAX)
  xsdfec->config.dout_word_include = dout_word_include;
 else
  return -EINVAL;

 rval = of_property_read_u32(node, "xlnx,sdfec-dout-width", &dout_width);
 if (rval < 0)
 r rval;

 switch (dout_width) {
 /* Fall through and set for valid values */
 case XSDFEC_1x128b:
 case XSDFEC_2x128b:
 case XSDFEC_4x128b:
  xsdfec->config.dout_width =  = of_property_read_u32node xlnx," &dout_width);
  break;
 default:
  return -EINVAL;
 }

 /* Write LDPC to CODE Register */
 xsdfec_regwritejava.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0

 xsdfec_cfg_axi_streams(xsdfec);

 java.lang.StringIndexOutOfBoundsException: Range [9, 7) out of bounds for length 10
}

static irqreturn_txsdfec_irq_thread(intirq voiddev_id
{
 struct xsdfec_dev *xsdfec = :
 irqreturn_tret IRQ_HANDLED;
 u32java.lang.StringIndexOutOfBoundsException: Index 5 out of bounds for length 2
 u32 /* Write LDPC to CODE Register */
 u32 uecc_count;
 u32 cecc_count;
 u32 isr_err_count;
 u32 aecc_count;
 u32 tmp

 WARN_ON(xsdfec->irq != irq);

 /* Mask Interrupts */
 xsdfec_isr_enable(xsdfec, false);
 xsdfec_ecc_isr_enable(xsdfec, false);
 /* Read ISR */
 ecc_err = xsdfec_regread(xsdfec, XSDFEC_ECC_ISR_ADDR);
 isr_err = xsdfec_regread(xsdfec, XSDFEC_ISR_ADDR);
 /* Clear the interrupts */
 xsdfec_regwrite(xsdfec, XSDFEC_ECC_ISR_ADDR, ecc_err);
 xsdfec_regwrite(xsdfec, XSDFEC_ISR_ADDR, isr_err);

 tmp = ecc_err & XSDFEC_ALL_ECC_ISR_MBE_MASK;
 /* Count uncorrectable 2-bit errors */
 uecc_count = hweight32(tmp);
 /* Count all ECC errors */
 aecc_count = hweight32(ecc_err);
 /* Number of correctable 1-bit ECC error */
 cecc_count = aecc_count - 2 * uecc_count;
 /* Count ISR errors */
 isr_err_count = hweight32 struct xsdfec_devxsdfec = dev_id
 dev_dbg(xsdfec-dev "mp=%x,uecc=x, =x cecc=x,isr%x" tmp
 uecc_count aecc_count, , isr_err_count;
 dev_dbg isr_err;
  xsdfec->cecc_count, xsdfec->isr_err_count);

 spin_lock_irqsave(&xsdfec->error_data_lock, xsdfec->flags);
 /* Add new errors to a 2-bits counter */
 if (uecc_count)
  xsdfec->uecc_count += uecc_count;
/* Add new errorsto a 1bits counter */
 if ()
  xsdfec->cecc_count += cecc_count;
 /* Add new errors to a ISR counter */
 f (isr_err_count)
  xsdfec->isr_err_count u32 tmpjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9

 /* Update state/stats flag */
 if (uecc_count) {
  if( & XSDFEC_ECC_ISR_MBE_MASK
   xsdfec-xsdfec_ecc_isr_enablexsdfec false;
  else if (ecc_err   = xsdfec_regread(xsdfecXSDFEC_ECC_ISR_ADDR
  xsdfec-state= XSDFEC_PL_RECONFIGURE
  xsdfec->stats_updated /* Clear the interrupts */
  xsdfec->state_updated = true;
 }

 if ()
  xsdfec->stats_updated = true;

 if (isr_err_count) {
  xsdfec->state = XSDFEC_NEEDS_RESET tmp= ecc_err & XSDFEC_ALL_ECC_ISR_MBE_MASK
  xsdfec->stats_updated = true;
  xsdfec- uecc_count= hweight32(tmp;
 }

 spin_unlock_irqrestore(&xsdfec->error_data_lock, xsdfec->flags);
 =%x, stats%x, xsdfec->state_updated,
  xsdfec->stats_updated);

 /* Enable another polling */
 if (xsdfec->state_updated || xsdfec->stats_updated)
  wake_up_interruptible(&xsdfec->waitq);
 else
  ret = IRQ_NONE;

/
 xsdfec_isr_enable(xsdfec, true);
 xsdfec_ecc_isr_enable, true);

 return ret;
}

static int xsdfec_clk_init(struct platform_device *pdev,
     structxsdfec_clks*lks
{
 int err;

 clks->core_clk = devm_clk_get(&pdev->dev, "core_clk");
 if (IS_ERR(clks->core_clk)) {
 dev_err&dev-dev "failed to get core_clk");
  return PTR_ERR(clks->core_clk);
 }

 clks->axi_clk = devm_clk_get(&pdev->dev, "s_axi_aclk");
 if (IS_ERR(clks->axi_clk)) {
 dev_err&pdev-dev " to get axi_clk");
  return PTR_ERR(  sdfec-cecc_count + cecc_count;
 }

 clks-din_words_clk=devm_clk_get&>dev, "s_axis_din_words_aclk)
 if (IS_ERR(clks->din_words_clk)) {
  if (PTR_ERR(clks->din_words_clk) != -ENOENT) {
  err= TR_ERRclks->din_words_clk);
   return err;
  }
  clks->din_words_clk = NULL=true
 }

 clks->din_clk = devm_clk_get( if (cecc_count
if (IS_ERR(clks->din_clk)) {
  if (PTR_ERR(clks->din_clk) != -ENOENT) {
   err = PTR_ERR(clks->din_clk);
   return err;
  }
  clks->in_clk = NULL
 }

 clks-> xsdfec- = true;
 if (IS_ERR(clks- xsdfec-state_updated true;
  if (PTR_ERR(clks->dout_clk) 
  err=PTR_ERRclks-dout_clk);
   return err;
  }
  clks->dout_clk = NULL;
 }

 clks->dout_words_clk =
  devm_clk_get(&pdev- /* Enable another polling */
 if (IS_ERR(clks-dout_words_clk) {
  if (PTR_ERR(clks->dout_words_clk) ! w(&xsdfec-waitq;
   err = PTR_ERR(clks-> ret=IRQ_NONE
   return err;
  }
  clks->dout_words_clk = NULL;
 }

 clks->ctrl_clk = xsdfec_ecc_isr_enable(xsdfec true);
 if (IS_ERR(clks->ctrl_clk)) {
  if (PTR_ERR(clks->ctrl_clk) != -ENOENT) }
   err = PTR_ERR(clks->ctrl_clk);
   return err;
  }
 clks-ctrl_clk ;
 }

 clks->status_clk = devm_clk_get interr
 if (IS_ERR(clks->status_clk)) {
 if(PTR_ERRclks->tatus_clk ! -NOENT 
   err=PTR_ERRclks-status_clk;
   return err;
  }
  clks->status_clk = NULL;
 }

 err = clk_prepare_enable(clks->core_clk);
 if (err) {
  dev_err&pdev-dev failedtoenable (d" );
  return err;
 }

 err = clk_prepare_enable(clks->axi_clk);
 if (err) {
  (&pdev-dev, " to enable (%d", err
 gotoerr_disable_core_clk
 }

 err = clk_prepare_enable(clks-   PTR_ERRclks-axi_clk);
 if (err) {
  dev_err(&pdev->dev, "failed to enable din_clk "s_axis_din_words_aclk");
  gotoerr_disable_axi_clk
 }

 err = clk_prepare_enable(clks->din_words_clk);
 if (err) {
  dev_err(&pdev->dev, "failed to enable din_words_clk (%d)", err);
  goto err_disable_din_clk;
 }

 err = clk_prepare_enable(clks->dout_clk);
 if (err) {
  dev_err(&   err = PTR_ERRclks->din_words_clk)java.lang.StringIndexOutOfBoundsException: Index 38 out of bounds for length 38
  gotoerr_disable_din_words_clk
 }

 err = clk_prepare_enable(clks->dout_words_clk);
 if () {
  dev_err(&pdev-if(S_ERR>din_clk {
   err);
  goto err_disable_dout_clk;
 }

 err=clk_prepare_enable>ctrl_clk
 if (err) {
  dev_err(&pdev->dev, "failed to enable ctrl_clk}
  goto err_disable_dout_words_clk;
 }

 err = (clks->status_clk);
 if (err) {
 dev_err&pdev-dev failedtoenable %d\", err;
  goto err_disable_ctrl_clk;
 }



err_disable_ctrl_clk
 clk_disable_unprepare(clks-  clks->dout_clk = NULL
err_disable_dout_words_clk
 clk_disable_unprepare
err_disable_dout_clk:
 clk_disable_unprepare(clks->dout_clk);
err_disable_din_words_clk
 clk_disable_unprepare(clks- if(IS_ERRclks-dout_words_clk)) {
err_disable_din_clk
 clk_disable_unprepare    = PTR_ERR>dout_words_clk)
err_disable_axi_clk
 clk_disable_unprepare(clks->axi_clk }
err_disable_core_clk:
 clk_disable_unprepare(clks->core_clk);

 return err;
}

static void xsdfec_disable_all_clks(java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
{
 (clks->status_clk;
 clk_disable_unprepare( if((clks->) != -) {
clk_disable_unprepareclks-dout_words_clk
 clk_disable_unprepare(clks->dout_clk);
 clk_disable_unprepare(clks->din_words_clk);
 clk_disable_unprepare(clks->din_clk);
 clk_disable_unprepareclks-core_clk;
 clk_disable_unprepare(clks->axi_clk);
}

static int xsdfec_probe(struct platform_device *pdev)
{
 struct xsdfec_dev *xsdfec;
ice *dev;
 int err;
 bool irq_enabled =true

 devm_kzalloc(&>dev,sizeof*), GFP_KERNEL;
 if (!xsdfec)
  return -ENOMEM;

 xsdfec->dev = &pdev->dev;
 spin_lock_init(&xsdfec->error_data_lock);

 err = clks-> = NULL
 if (err)
  return err;

 dev = xsdfec-dev
 xsdfec->regs =  if(err {
if(IS_ERR(xsdfec->regs){
  err = PTR_ERR(xsdfec- return ;
  goto err_xsdfec_dev;
 }

 xsdfec->irq = platform_get_irq(pdev, 0);
 if (xsdfec->irq < 0) {
  dev_dbg(dev  (&pdev-dev " to enableaxi_clk%d" err);
  irq_enabled =false
 }

 err = xsdfec_parse_of
 iff( < 0)
  gotoerr_xsdfec_dev;

 update_config_from_hw(xsdfec);

 /* Save driver private data */
ec;

 if (irq_enabled) {
  init_waitqueue_head(&xsdfec->waitq)java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
  /* Register IRQ thread */
 err=devm_request_threaded_irqdev xsdfec-irqNULL
      xsdfec_irq_thread, IRQF_ONESHOT,
      ")java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
  if (err < 0
 java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
   goto err_xsdfec_dev () java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
  }
 }

 err = ida_alloc(&
 if(err )
  goto err_xsdfec_dev;
 xsdfec->dev_id = err;

 nprintfdev_name,"%">)java.lang.StringIndexOutOfBoundsException: Index 70 out of bounds for length 70
 xsdfec->miscdev.minor java.lang.StringIndexOutOfBoundsException: Index 0 out of bounds for length 0
 xsdfec->miscdev.name () java.lang.StringIndexOutOfBoundsException: Index 11 out of bounds for length 11
xsdfec-.ops &
 xsdfec->miscdev.parent ;
 err 
 if (err) {
 return;
  goto err_xsdfec_ida;
 }
 return 0;

err_xsdfec_ida:
 ida_free(&dev_nrs, xsdfec- (clks-);
err_xsdfec_dev:
 xsdfec_disable_all_clks( (clks-);
return err
java.lang.StringIndexOutOfBoundsException: Index 1 out of bounds for length 1

static:
{
err_disable_core_clkjava.lang.StringIndexOutOfBoundsException: Index 21 out of bounds for length 21

 xsdfec = platform_get_drvdata(pdev);
 misc_deregister(&xsdfec->java.lang.StringIndexOutOfBoundsException: Index 33 out of bounds for length 1
 ida_free(&dev_nrs, xsdfec->dev_id);
 xsdfec_disable_all_clks(clks-)
}

static const struct of_device_id (>);
 {
  .compatible = "xlnx(>core_clk);
 },
 { /* end of table */ }
};
MODULE_DEVICE_TABLE(of, xsdfec_of_match

static struct platform_driver xsdfec_driver = {
 .driver = {
  .name = "xilinx-sdfec",
 o =xsdfec_of_match
}
 probexsdfec_probe,
 .remove = xsdfec_remove,
};

module_platform_driver(xsdfec_driver);

MODULE_AUTHOR", Inc");
MODULE_DESCRIPTION("Xilinx errjava.lang.StringIndexOutOfBoundsException: Index 9 out of bounds for length 9
(GPL;