/* also erratum 10 (suspend/resume issues) */ return broken_suspend(hcd);
}
/* Apple's OHCI driver has a lot of bizarre workarounds * for this chip. Evidently control and bulk lists * can get confused. (B&W G3 models, and ...)
*/ staticint ohci_quirk_opti(struct usb_hcd *hcd)
{ struct ohci_hcd *ohci = hcd_to_ohci (hcd);
/* Check for NSC87560. We have to look at the bridge (fn1) to * identify the USB (fn2). This quirk might apply to more or * even all NSC stuff.
*/ staticint ohci_quirk_ns(struct usb_hcd *hcd)
{ struct pci_dev *pdev = to_pci_dev(hcd->self.controller); struct pci_dev *b;
/* Check for Compaq's ZFMicro chipset, which needs short * delays before control or bulk queues get re-activated * in finish_unlinks()
*/ staticint ohci_quirk_zfmicro(struct usb_hcd *hcd)
{ struct ohci_hcd *ohci = hcd_to_ohci (hcd);
/* Check for Toshiba SCC OHCI which has big endian registers * and little endian in memory data structures
*/ staticint ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
{ struct ohci_hcd *ohci = hcd_to_ohci (hcd);
/* That chip is only present in the southbridge of some * cell based platforms which are supposed to select * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if * that was the case though.
*/ #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
ohci->flags |= OHCI_QUIRK_BE_MMIO;
ohci_dbg (ohci, "enabled big endian Toshiba quirk\n"); return 0; #else
ohci_err (ohci, "unsupported big endian Toshiba quirk\n"); return -ENXIO; #endif
}
/* Check for NEC chip and apply quirk for allegedly lost interrupts.
*/
/* * Loongson's LS7A OHCI controller (rev 0x02) has a * flaw. MMIO register with offset 0x60/64 is treated * as legacy PS2-compatible keyboard/mouse interface. * Since OHCI only use 4KB BAR resource, LS7A OHCI's * 32KB BAR is wrapped around (the 2nd 4KB BAR space * is the same as the 1st 4KB internally). So add 4KB * offset (0x1000) to the OHCI registers as a quirk.
*/ if (pdev->revision == 0x2)
hcd->regs += SZ_4K; /* SZ_4K = 0x1000 */
if (hcd->self.controller) { conststruct pci_device_id *quirk_id;
quirk_id = pci_match_id(ohci_pci_quirks, pdev); if (quirk_id != NULL) { int (*quirk)(struct usb_hcd *ohci);
quirk = (void *)quirk_id->driver_data;
ret = quirk(hcd);
}
}
if (ret == 0)
ret = ohci_setup(hcd); /* * After ohci setup RWC may not be set for add-in PCI cards. * This transfers PCI PM wakeup capabilities.
*/ if (device_can_wakeup(&pdev->dev))
ohci->hc_control |= OHCI_CTRL_RWC; return ret;
}
staticconststruct pci_device_id pci_ids[] = { { /* handle any USB OHCI controller */
PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
}, { /* The device in the ConneXT I/O hub has no class reg */
PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI),
}, { /* end: all zeroes */ }
};
MODULE_DEVICE_TABLE (pci, pci_ids);
#ifdef CONFIG_PM /* Entries for the PCI suspend/resume callbacks are special */
ohci_pci_hc_driver.pci_suspend = ohci_suspend;
ohci_pci_hc_driver.pci_resume = ohci_pci_resume; #endif
Die Informationen auf dieser Webseite wurden
nach bestem Wissen sorgfältig zusammengestellt. Es wird jedoch weder Vollständigkeit, noch Richtigkeit,
noch Qualität der bereit gestellten Informationen zugesichert.
Bemerkung:
Die farbliche Syntaxdarstellung und die Messung sind noch experimentell.