// SPDX-License-Identifier: GPL-2.0-or-later /* * ALSA SoC SPDIF Audio Layer * * Copyright 2015 Andrea Venturi <be17068@iperbole.bo.it> * Copyright 2015 Marcus Cooper <codekipper@gmail.com> * * Based on the Allwinner SDK driver, released under the GPL. #include <linux/clk.h>#include <linux/delay.h>#include <linux/device.h>#include <linux/kernel.h>#include <linux/init.h>#include <linux/regmap.h>#include <linux/of.h>#include <linux/ioport.h>#include <linux/module.h>#include <linux/platform_device.h>#include <linux/pm_runtime.h>#include <linux/reset.h>#include <linux/spinlock.h>#include <sound/asoundef.h>#include <sound/dmaengine_pcm.h>#include <sound/pcm_params.h>#include <sound/soc.h>#define SUN4I_SPDIF_CTL (0x00)#define SUN4I_SPDIF_CTL_MCLKDIV(v) ((v) << 4) /* v even */ #define SUN4I_SPDIF_CTL_MCLKOUTEN BIT(2)#define SUN4I_SPDIF_CTL_GEN BIT(1)#define SUN4I_SPDIF_CTL_RESET BIT(0)#define SUN4I_SPDIF_TXCFG (0x04)#define SUN4I_SPDIF_TXCFG_SINGLEMOD BIT(31)#define SUN4I_SPDIF_TXCFG_ASS BIT(17)#define SUN4I_SPDIF_TXCFG_NONAUDIO BIT(16)#define SUN4I_SPDIF_TXCFG_TXRATIO(v) ((v) << 4)#define SUN4I_SPDIF_TXCFG_TXRATIO_MASK GENMASK(8, 4)#define SUN4I_SPDIF_TXCFG_FMTRVD GENMASK(3, 2)#define SUN4I_SPDIF_TXCFG_FMT16BIT (0 << 2)#define SUN4I_SPDIF_TXCFG_FMT20BIT (1 << 2)#define SUN4I_SPDIF_TXCFG_FMT24BIT (2 << 2)#define SUN4I_SPDIF_TXCFG_CHSTMODE BIT(1)#define SUN4I_SPDIF_TXCFG_TXEN BIT(0)#define SUN4I_SPDIF_RXCFG (0x08)#define SUN4I_SPDIF_RXCFG_LOCKFLAG BIT(4)#define SUN4I_SPDIF_RXCFG_CHSTSRC BIT(3)#define SUN4I_SPDIF_RXCFG_CHSTCP BIT(1)#define SUN4I_SPDIF_RXCFG_RXEN BIT(0)#define SUN4I_SPDIF_TXFIFO (0x0C)#define SUN4I_SPDIF_RXFIFO (0x10)#define SUN4I_SPDIF_FCTL (0x14)#define SUN4I_SPDIF_FCTL_FIFOSRC BIT(31)#define SUN4I_SPDIF_FCTL_FTX BIT(17)#define SUN4I_SPDIF_FCTL_FRX BIT(16)#define SUN4I_SPDIF_FCTL_TXTL(v) ((v) << 8)#define SUN4I_SPDIF_FCTL_TXTL_MASK GENMASK(12, 8)#define SUN4I_SPDIF_FCTL_RXTL(v) ((v) << 3)#define SUN4I_SPDIF_FCTL_RXTL_MASK GENMASK(7, 3)#define SUN4I_SPDIF_FCTL_TXIM BIT(2)#define SUN4I_SPDIF_FCTL_RXOM(v) ((v) << 0)#define SUN4I_SPDIF_FCTL_RXOM_MASK GENMASK(1, 0)#define SUN50I_H6_SPDIF_FCTL (0x14)#define SUN50I_H6_SPDIF_FCTL_HUB_EN BIT(31)#define SUN50I_H6_SPDIF_FCTL_FTX BIT(30)#define SUN50I_H6_SPDIF_FCTL_FRX BIT(29)#define SUN50I_H6_SPDIF_FCTL_TXTL(v) ((v) << 12)#define SUN50I_H6_SPDIF_FCTL_TXTL_MASK GENMASK(19, 12)#define SUN50I_H6_SPDIF_FCTL_RXTL(v) ((v) << 4)#define SUN50I_H6_SPDIF_FCTL_RXTL_MASK GENMASK(10, 4)#define SUN50I_H6_SPDIF_FCTL_TXIM BIT(2)#define SUN50I_H6_SPDIF_FCTL_RXOM(v) ((v) << 0)#define SUN50I_H6_SPDIF_FCTL_RXOM_MASK GENMASK(1, 0)#define SUN4I_SPDIF_FSTA (0x18)#define SUN4I_SPDIF_FSTA_TXE BIT(14)#define SUN4I_SPDIF_FSTA_TXECNTSHT (8)#define SUN4I_SPDIF_FSTA_RXA BIT(6)#define SUN4I_SPDIF_FSTA_RXACNTSHT (0)#define SUN4I_SPDIF_INT (0x1C)#define SUN4I_SPDIF_INT_RXLOCKEN BIT(18)#define SUN4I_SPDIF_INT_RXUNLOCKEN BIT(17)#define SUN4I_SPDIF_INT_RXPARERREN BIT(16)#define SUN4I_SPDIF_INT_TXDRQEN BIT(7)#define SUN4I_SPDIF_INT_TXUIEN BIT(6)#define SUN4I_SPDIF_INT_TXOIEN BIT(5)#define SUN4I_SPDIF_INT_TXEIEN BIT(4)#define SUN4I_SPDIF_INT_RXDRQEN BIT(2)#define SUN4I_SPDIF_INT_RXOIEN BIT(1)#define SUN4I_SPDIF_INT_RXAIEN BIT(0)#define SUN4I_SPDIF_ISTA (0x20)#define SUN4I_SPDIF_ISTA_RXLOCKSTA BIT(18)#define SUN4I_SPDIF_ISTA_RXUNLOCKSTA BIT(17)#define SUN4I_SPDIF_ISTA_RXPARERRSTA BIT(16)#define SUN4I_SPDIF_ISTA_TXUSTA BIT(6)#define SUN4I_SPDIF_ISTA_TXOSTA BIT(5)#define SUN4I_SPDIF_ISTA_TXESTA BIT(4)#define SUN4I_SPDIF_ISTA_RXOSTA BIT(1)#define SUN4I_SPDIF_ISTA_RXASTA BIT(0)#define SUN8I_SPDIF_TXFIFO (0x20)#define SUN4I_SPDIF_TXCNT (0x24)#define SUN4I_SPDIF_RXCNT (0x28)#define SUN4I_SPDIF_TXCHSTA0 (0x2C)#define SUN4I_SPDIF_TXCHSTA0_CLK(v) ((v) << 28)#define SUN4I_SPDIF_TXCHSTA0_SAMFREQ(v) ((v) << 24)#define SUN4I_SPDIF_TXCHSTA0_SAMFREQ_MASK GENMASK(27, 24)#define SUN4I_SPDIF_TXCHSTA0_CHNUM(v) ((v) << 20)#define SUN4I_SPDIF_TXCHSTA0_CHNUM_MASK GENMASK(23, 20)#define SUN4I_SPDIF_TXCHSTA0_SRCNUM(v) ((v) << 16)#define SUN4I_SPDIF_TXCHSTA0_CATACOD(v) ((v) << 8)#define SUN4I_SPDIF_TXCHSTA0_MODE(v) ((v) << 6)#define SUN4I_SPDIF_TXCHSTA0_EMPHASIS(v) ((v) << 3)#define SUN4I_SPDIF_TXCHSTA0_CP BIT(2)#define SUN4I_SPDIF_TXCHSTA0_AUDIO BIT(1)#define SUN4I_SPDIF_TXCHSTA0_PRO BIT(0)#define SUN4I_SPDIF_TXCHSTA1 (0x30)#define SUN4I_SPDIF_TXCHSTA1_CGMSA(v) ((v) << 8)#define SUN4I_SPDIF_TXCHSTA1_ORISAMFREQ(v) ((v) << 4)#define SUN4I_SPDIF_TXCHSTA1_ORISAMFREQ_MASK GENMASK(7, 4)#define SUN4I_SPDIF_TXCHSTA1_SAMWORDLEN(v) ((v) << 1)#define SUN4I_SPDIF_TXCHSTA1_MAXWORDLEN BIT(0)#define SUN4I_SPDIF_RXCHSTA0 (0x34)#define SUN4I_SPDIF_RXCHSTA0_CLK(v) ((v) << 28)#define SUN4I_SPDIF_RXCHSTA0_SAMFREQ(v) ((v) << 24)#define SUN4I_SPDIF_RXCHSTA0_CHNUM(v) ((v) << 20)#define SUN4I_SPDIF_RXCHSTA0_SRCNUM(v) ((v) << 16)#define SUN4I_SPDIF_RXCHSTA0_CATACOD(v) ((v) << 8)#define SUN4I_SPDIF_RXCHSTA0_MODE(v) ((v) << 6)#define SUN4I_SPDIF_RXCHSTA0_EMPHASIS(v) ((v) << 3)#define SUN4I_SPDIF_RXCHSTA0_CP BIT(2)#define SUN4I_SPDIF_RXCHSTA0_AUDIO BIT(1)#define SUN4I_SPDIF_RXCHSTA0_PRO BIT(0)#define SUN4I_SPDIF_RXCHSTA1 (0x38)#define SUN4I_SPDIF_RXCHSTA1_CGMSA(v) ((v) << 8)#define SUN4I_SPDIF_RXCHSTA1_ORISAMFREQ(v) ((v) << 4)#define SUN4I_SPDIF_RXCHSTA1_SAMWORDLEN(v) ((v) << 1)#define SUN4I_SPDIF_RXCHSTA1_MAXWORDLEN BIT(0)/* Defines for Sampling Frequency */ #define SUN4I_SPDIF_SAMFREQ_44_1KHZ 0x0#define SUN4I_SPDIF_SAMFREQ_NOT_INDICATED 0x1#define SUN4I_SPDIF_SAMFREQ_48KHZ 0x2#define SUN4I_SPDIF_SAMFREQ_32KHZ 0x3#define SUN4I_SPDIF_SAMFREQ_22_05KHZ 0x4#define SUN4I_SPDIF_SAMFREQ_24KHZ 0x6#define SUN4I_SPDIF_SAMFREQ_88_2KHZ 0x8#define SUN4I_SPDIF_SAMFREQ_76_8KHZ 0x9#define SUN4I_SPDIF_SAMFREQ_96KHZ 0xa#define SUN4I_SPDIF_SAMFREQ_176_4KHZ 0xc#define SUN4I_SPDIF_SAMFREQ_192KHZ 0xe/** * struct sun4i_spdif_quirks - Differences between SoC variants. * * @reg_dac_txdata: TX FIFO offset for DMA config. * @has_reset: SoC needs reset deasserted. * @val_fctl_ftx: TX FIFO flush bitmask. struct sun4i_spdif_quirks {unsigned int reg_dac_txdata;bool has_reset;unsigned int val_fctl_ftx;unsigned int mclk_multiplier;struct sun4i_spdif_dev {struct platform_device *pdev;struct clk *spdif_clk;struct clk *apb_clk;struct reset_control *rst;struct snd_soc_dai_driver cpu_dai_drv;struct regmap *regmap;struct snd_dmaengine_dai_dma_data dma_params_tx;const struct sun4i_spdif_quirks *quirks;static void sun4i_spdif_configure(struct sun4i_spdif_dev *host)const struct sun4i_spdif_quirks *quirks = host->quirks;/* soft reset SPDIF */ /* flush TX FIFO */ /* Valid data at the MSB of TXFIFO Register */ /* clear TX counter */ static void sun4i_snd_txctrl_on(struct snd_pcm_substream *substream,struct sun4i_spdif_dev *host)if (substream->runtime->channels == 1)/* SPDIF TX ENABLE */ /* DRQ ENABLE */ /* Global enable */ static void sun4i_snd_txctrl_off(struct snd_pcm_substream *substream,struct sun4i_spdif_dev *host)/* SPDIF TX DISABLE */ /* DRQ DISABLE */ /* Global disable */ static int sun4i_spdif_startup(struct snd_pcm_substream *substream,struct snd_soc_dai *cpu_dai)struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)return -EINVAL;return 0;static int sun4i_spdif_hw_params(struct snd_pcm_substream *substream,struct snd_pcm_hw_params *params,struct snd_soc_dai *cpu_dai)int ret = 0;int fmt;unsigned long rate = params_rate(params);unsigned int mclk = 0;struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(cpu_dai);struct platform_device *pdev = host->pdev;/* Add the PCM and raw data select interface */ switch (params_channels(params)) {case 1: /* PCM mode */ case 2:break ;case 4: /* raw data mode */ break ;default :return -EINVAL;switch (params_format(params)) {case SNDRV_PCM_FORMAT_S16_LE:break ;case SNDRV_PCM_FORMAT_S20_3LE:break ;case SNDRV_PCM_FORMAT_S24_LE:case SNDRV_PCM_FORMAT_S32_LE:break ;default :return -EINVAL;switch (rate) {case 22050:case 44100:case 88200:case 176400:break ;case 24000:case 32000:case 48000:case 96000:case 192000:break ;default :return -EINVAL;if (ret < 0) {"Setting SPDIF clock rate for %d Hz failed!\n" , mclk);return ret;switch (rate) {case 22050:case 24000:break ;case 32000:break ;case 44100:case 48000:break ;case 88200:case 96000:break ;case 176400:case 192000:break ;default :return -EINVAL;/* set non audio and bit depth */ return 0;static int sun4i_spdif_trigger(struct snd_pcm_substream *substream, int cmd,struct snd_soc_dai *dai)int ret = 0;struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(dai);if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)return -EINVAL;switch (cmd) {case SNDRV_PCM_TRIGGER_START:case SNDRV_PCM_TRIGGER_RESUME:case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:break ;case SNDRV_PCM_TRIGGER_STOP:case SNDRV_PCM_TRIGGER_SUSPEND:case SNDRV_PCM_TRIGGER_PAUSE_PUSH:break ;default :break ;return ret;static int sun4i_spdif_info(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_info *uinfo)return 0;static int sun4i_spdif_get_status_mask(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)return 0;static int sun4i_spdif_get_status(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(cpu_dai);unsigned long flags;unsigned int reg;return 0;static int sun4i_spdif_set_status(struct snd_kcontrol *kcontrol,struct snd_ctl_elem_value *ucontrol)struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(cpu_dai);unsigned long flags;unsigned int reg;bool chg0, chg1;if (status[0] & IEC958_AES0_NONAUDIO)return chg0 || chg1;static struct snd_kcontrol_new sun4i_spdif_controls[] = {"" , PLAYBACK, MASK),"" , PLAYBACK, DEFAULT ),static int sun4i_spdif_soc_dai_probe(struct snd_soc_dai *dai)struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(dai);return 0;static const struct snd_soc_dai_ops sun4i_spdif_dai_ops = {static const struct regmap_config sun4i_spdif_regmap_config = {#define SUN4I_RATES SNDRV_PCM_RATE_8000_192000#define SUN4I_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \static struct snd_soc_dai_driver sun4i_spdif_dai = {"spdif" ,static const struct sun4i_spdif_quirks sun4i_a10_spdif_quirks = {static const struct sun4i_spdif_quirks sun6i_a31_spdif_quirks = {true ,static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = {true ,static const struct sun4i_spdif_quirks sun50i_h6_spdif_quirks = {true ,static const struct of_device_id sun4i_spdif_of_match[] = {"allwinner,sun4i-a10-spdif" ,"allwinner,sun6i-a31-spdif" ,"allwinner,sun8i-h3-spdif" ,"allwinner,sun50i-h6-spdif" ,"allwinner,sun50i-h616-spdif" ,/* Essentially the same as the H6, but without RX */ /* sentinel */ } static const struct snd_soc_component_driver sun4i_spdif_component = {"sun4i-spdif" ,static int sun4i_spdif_runtime_suspend(struct device *dev)struct sun4i_spdif_dev *host = dev_get_drvdata(dev);return 0;static int sun4i_spdif_runtime_resume(struct device *dev)struct sun4i_spdif_dev *host = dev_get_drvdata(dev);int ret;if (ret)return ret;if (ret)return ret;static int sun4i_spdif_probe(struct platform_device *pdev)struct sun4i_spdif_dev *host;struct resource *res;const struct sun4i_spdif_quirks *quirks;int ret;void __iomem *base;"Entered %s\n" , __func__);sizeof (*host), GFP_KERNEL);if (!host)return -ENOMEM;/* Initialize this copy of the CPU DAI driver structure */ sizeof (sun4i_spdif_dai));/* Get the addresses */ if (IS_ERR(base))return PTR_ERR(base);if (quirks == NULL) {"Failed to determine the quirks to use\n" );return -ENODEV;/* Clocks */ "apb" );if (IS_ERR(host->apb_clk)) {"failed to get a apb clock.\n" );return PTR_ERR(host->apb_clk);"spdif" );if (IS_ERR(host->spdif_clk)) {"failed to get a spdif clock.\n" );return PTR_ERR(host->spdif_clk);if (quirks->has_reset) {if (PTR_ERR(host->rst) == -EPROBE_DEFER) {"Failed to get reset: %d\n" , ret);return ret;if (!IS_ERR(host->rst))if (ret)return ret;if (!pm_runtime_enabled(&pdev->dev)) {if (ret)goto err_unregister;if (ret)goto err_suspend;return 0;if (!pm_runtime_status_suspended(&pdev->dev))return ret;static void sun4i_spdif_remove(struct platform_device *pdev)if (!pm_runtime_status_suspended(&pdev->dev))static const struct dev_pm_ops sun4i_spdif_pm = {static struct platform_driver sun4i_spdif_driver = {"sun4i-spdif" ,"Marcus Cooper " );"Andrea Venturi " );"Allwinner sun4i SPDIF SoC Interface" );"GPL" );"platform:sun4i-spdif" );
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