Quelle  uncore-io.json   Sprache: unbekannt

[
    {
        "BriefDescription": "IIO Clockticks",
        "Counter": "0,1,2,3",
        "EventCode": "0x01",
        "EventName": "UNC_IIO_CLOCKTICKS",
        "PerPkg": "1",
        "PortMask": "0x000",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIE Completion Buffer Inserts.  Counts once per 64 byte read issued from this PCIE device.",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.ALL_PARTS",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIE Completion Buffer Inserts.  Counts once per 64 byte read issued from this PCIE device.",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART0",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIE Completion Buffer Inserts.  Counts once per 64 byte read issued from this PCIE device.",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART1",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x002",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIE Completion Buffer Inserts.  Counts once per 64 byte read issued from this PCIE device.",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART2",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x004",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIE Completion Buffer Inserts.  Counts once per 64 byte read issued from this PCIE device.",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART3",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x008",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIE Completion Buffer Inserts.  Counts once per 64 byte read issued from this PCIE device.",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART4",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x010",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIE Completion Buffer Inserts.  Counts once per 64 byte read issued from this PCIE device.",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART5",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x020",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIE Completion Buffer Inserts.  Counts once per 64 byte read issued from this PCIE device.",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART6",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x040",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "PCIE Completion Buffer Inserts.  Counts once per 64 byte read issued from this PCIE device.",
        "Counter": "0,1,2,3",
        "EventCode": "0xC2",
        "EventName": "UNC_IIO_COMP_BUF_INSERTS.CMPD.PART7",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x080",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Count of allocations in the completion buffer",
        "Counter": "2,3",
        "EventCode": "0xD5",
        "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.ALL_PARTS",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0xff",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Count of allocations in the completion buffer",
        "Counter": "2,3",
        "EventCode": "0xD5",
        "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART0",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Count of allocations in the completion buffer",
        "Counter": "2,3",
        "EventCode": "0xD5",
        "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART1",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x002",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Count of allocations in the completion buffer",
        "Counter": "2,3",
        "EventCode": "0xD5",
        "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART2",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x004",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Count of allocations in the completion buffer",
        "Counter": "2,3",
        "EventCode": "0xD5",
        "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART3",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x008",
        "UMask": "0x8",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Count of allocations in the completion buffer",
        "Counter": "2,3",
        "EventCode": "0xD5",
        "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART4",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x010",
        "UMask": "0x10",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Count of allocations in the completion buffer",
        "Counter": "2,3",
        "EventCode": "0xD5",
        "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART5",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x020",
        "UMask": "0x20",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Count of allocations in the completion buffer",
        "Counter": "2,3",
        "EventCode": "0xD5",
        "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART6",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x040",
        "UMask": "0x40",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Count of allocations in the completion buffer",
        "Counter": "2,3",
        "EventCode": "0xD5",
        "EventName": "UNC_IIO_COMP_BUF_OCCUPANCY.CMPD.PART7",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x080",
        "UMask": "0x80",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.ALL_PARTS",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x002",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x004",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x008",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART4",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x010",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART5",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x020",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART6",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x040",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core reporting completion of Card read from Core DRAM",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART7",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x080",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.ALL_PARTS",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x002",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x004",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x008",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART4",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x010",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART5",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x020",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART6",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x040",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC0",
        "EventName": "UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART7",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x080",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x02",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x04",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x08",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x10",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x20",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x40",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x80",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x02",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x04",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x08",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x10",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x20",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x40",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Four byte data request of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x80",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x002",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x004",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x008",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART4",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x010",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART5",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x020",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART6",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x040",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Data requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x83",
        "EventName": "UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART7",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x080",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "IOTLB Hits to a 1G Page",
        "Counter": "0,1,2,3",
        "EventCode": "0x40",
        "EventName": "UNC_IIO_IOMMU0.1G_HITS",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x10",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "IOTLB Hits to a 2M Page",
        "Counter": "0,1,2,3",
        "EventCode": "0x40",
        "EventName": "UNC_IIO_IOMMU0.2M_HITS",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x8",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "IOTLB Hits to a 4K Page",
        "Counter": "0,1,2,3",
        "EventCode": "0x40",
        "EventName": "UNC_IIO_IOMMU0.4K_HITS",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Context cache hits",
        "Counter": "0,1,2,3",
        "EventCode": "0x40",
        "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_HITS",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x80",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Context cache lookups",
        "Counter": "0,1,2,3",
        "EventCode": "0x40",
        "EventName": "UNC_IIO_IOMMU0.CTXT_CACHE_LOOKUPS",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x40",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "IOTLB lookups first",
        "Counter": "0,1,2,3",
        "EventCode": "0x40",
        "EventName": "UNC_IIO_IOMMU0.FIRST_LOOKUPS",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "IOTLB Fills (same as IOTLB miss)",
        "Counter": "0,1,2,3",
        "EventCode": "0x40",
        "EventName": "UNC_IIO_IOMMU0.MISSES",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x20",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "IOMMU memory access (both low and high priority)",
        "Counter": "0,1,2,3",
        "EventCode": "0x41",
        "EventName": "UNC_IIO_IOMMU1.NUM_MEM_ACCESSES",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0xc0",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Second Level Page Walk Cache Hit to a 1G page",
        "Counter": "0,1,2,3",
        "EventCode": "0x41",
        "EventName": "UNC_IIO_IOMMU1.SLPWC_1G_HITS",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Second Level Page Walk Cache Hit to a 256T page",
        "Counter": "0,1,2,3",
        "EventCode": "0x41",
        "EventName": "UNC_IIO_IOMMU1.SLPWC_256T_HITS",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x10",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Second Level Page Walk Cache Hit to a 512G page",
        "Counter": "0,1,2,3",
        "EventCode": "0x41",
        "EventName": "UNC_IIO_IOMMU1.SLPWC_512G_HITS",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "UMask": "0x8",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "-",
        "Counter": "0,1,2,3",
        "EventCode": "0x8e",
        "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.ABORT",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0x80",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "-",
        "Counter": "0,1,2,3",
        "EventCode": "0x8e",
        "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.CONFINED_P2P",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0x40",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "-",
        "Counter": "0,1,2,3",
        "EventCode": "0x8e",
        "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.LOC_P2P",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0x20",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "-",
        "Counter": "0,1,2,3",
        "EventCode": "0x8e",
        "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MCAST",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "-",
        "Counter": "0,1,2,3",
        "EventCode": "0x8e",
        "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MEM",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0x8",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "-",
        "Counter": "0,1,2,3",
        "EventCode": "0x8e",
        "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.MSGB",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "-",
        "Counter": "0,1,2,3",
        "EventCode": "0x8e",
        "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Posted requests sent by the integrated IO (IIO) controller to the Ubox, useful for counting message signaled interrupts (MSI).",
        "Counter": "0,1,2,3",
        "EventCode": "0x8e",
        "EventName": "UNC_IIO_NUM_REQ_OF_CPU_BY_TGT.UBOX_POSTED",
        "FCMask": "0x01",
        "PerPkg": "1",
        "PortMask": "0x0FF",
        "PublicDescription": "-",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "All 9 bits of Page Walk Tracker Occupancy",
        "Counter": "0,1,2,3",
        "EventCode": "0x42",
        "EventName": "UNC_IIO_PWT_OCCUPANCY",
        "Experimental": "1",
        "PerPkg": "1",
        "PortMask": "0x000",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x002",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x004",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x008",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART4",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x010",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART5",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x020",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART6",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x040",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core reading from Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART7",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x080",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x002",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x004",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x008",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART4",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x010",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART5",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x020",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART6",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x040",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested by the CPU : Core writing to Cards MMIO space",
        "Counter": "2,3",
        "EventCode": "0xC1",
        "EventName": "UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART7",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x080",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x002",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x004",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x008",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART4",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x010",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART5",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x020",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART6",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x040",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card reading from DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART7",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x080",
        "UMask": "0x4",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x002",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x004",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x008",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART4",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x010",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART5",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x020",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART6",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x040",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to DRAM",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART7",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x080",
        "UMask": "0x1",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x001",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x002",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x004",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x008",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART4",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x010",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART5",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x020",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART6",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x040",
        "UMask": "0x2",
        "Unit": "IIO"
    },
    {
        "BriefDescription": "Number Transactions requested of the CPU : Card writing to another Card (same or different stack)",
        "Counter": "0,1",
        "EventCode": "0x84",
        "EventName": "UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART7",
        "Experimental": "1",
        "FCMask": "0x07",
        "PerPkg": "1",
        "PortMask": "0x080",
        "UMask": "0x2",
        "Unit": "IIO"
    }
]